| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257639000 | At least one layer of silicon oxynitride | 10 |
| 20100006984 | SEMICONDUCTOR DEVICE - A semiconductor device includes a substrate; a layered body formed on the substrate and including a multilayer interconnection structure, the layered body including multiple interlayer insulating films stacked in layers, the interlayer insulating films being lower in dielectric constant than a SiO | 01-14-2010 |
| 20100244207 | MULTIPLE THICKNESS AND/OR COMPOSITION HIGH-K GATE DIELECTRICS AND METHODS OF MAKING THEREOF - Disclosed are methods of making an integrated circuit with multiple thickness and/or multiple composition high-K gate dielectric layers and integrated circuits containing multiple thickness and/or multiple composition high-K gate dielectrics. The methods involve forming a layer of high-K atoms over a conventional gate dielectric and heating the layer of high-K atoms to form a high-K gate dielectric layer. Methods of suppressing gate leakage current while mitigating mobility degradation are also described. | 09-30-2010 |
| 20110073998 | Adhesion Promotion Layer For A Semiconductor Device - Embodiments of semiconductor devices are provided. In one embodiment, the semiconductor device includes a substrate, an etch stop layer formed on the substrate, an adhesion promotion layer formed directly on the etch stop layer, and a dielectric layer formed directly on the adhesion promotion layer. The etch stop layer may include silicon, carbon, and nitrogen. The dielectric layer may include silicon, oxygen, and carbon. The adhesion promotion layer may include carbon, oxygen, and nitrogen. An example of an adhesion promotion layer includes polyimide. | 03-31-2011 |
| 20110254141 | PHYSICAL STRUCTURE FOR USE IN A PHYSICAL UNCLONABLE - The invention relates to a semiconductor device comprising a physical structure ( | 10-20-2011 |
| 20140103498 | SELECTIVE WET ETCHING OF HAFNIUM ALUMINUM OXIDE FILMS - Methods and etchant compositions for wet etching to selectively remove a hafnium aluminum oxide (HfAlO | 04-17-2014 |
| 20140117511 | Passivation Layer and Method of Making a Passivation Layer - A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen. | 05-01-2014 |
| 20150028458 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device is provided that includes a diffusion barrier layer between a compound semiconductor layer and a dielectric layer, as well as a method of fabricating the semiconductor device, such that the semiconductor device includes a compound semiconductor layer; a dielectric layer; and a diffusion barrier layer including an oxynitride formed between the compound semiconductor layer and the dielectric layer. | 01-29-2015 |
| 20150115418 | DEVICES AND METHODS OF FORMING FINS AT TIGHT FIN PITCHES - Devices and methods for forming semiconductor devices with fins at tight fin pitches are provided. One method includes, for instance: obtaining an intermediate semiconductor device; growing an epi layer over the substrate; forming a doped layer below the epi layer; depositing a first oxide layer on the epi layer; applying a dielectric material on the first oxide layer; and depositing a lithography stack on the dielectric material. One intermediate semiconductor device includes, for instance: a substrate with at least one n-well region and at least one p-well region; a doped layer over the substrate; an epi layer over the doped layer; a first oxide layer over the epi layer; a dielectric layer over the first oxide layer; and a lithography stack over the dielectric layer. | 04-30-2015 |
| 20160172239 | ULTRA-THIN DIELECTRIC DIFFUSION BARRIER AND ETCH STOP LAYER FOR ADVANCED INTERCONNECT APPLICATIONS | 06-16-2016 |
| 20160172315 | PECVD PROTECTIVE LAYERS FOR SEMICONDUCTOR DEVICES | 06-16-2016 |
