| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257614000 | Group II-VI compound (e.g., CdTe, Hg x Cd 1-x Te) | 6 |
| 20100276785 | DOPING OF SEMICONDUCTOR LAYER FOR IMPROVED EFFICIENCY OF SEMICONDUCTOR STRUCTURES - A system and method for variable doping within a semiconductor structure for improved efficiency is described. One embodiment includes a semiconductor structure comprising a first semiconductor layer comprising a first semiconductor material, and a second semiconductor layer comprising a second semiconductor material, wherein the second semiconductor material is an oppositely-typed semiconductor material from the first semiconductor material, and wherein the second semiconductor layer comprises a first region adjacent to the first semiconductor layer, wherein the first region comprises low-doped second semiconductor material, and a second region adjacent to the first region, wherein the second region comprises highly-doped second semiconductor material to increase a built-in potential of the semiconductor structure. | 11-04-2010 |
| 20100301454 | LATTICE MATCHED MULTI-JUNCTION PHOTOVOLTAIC AND OPTOELECTRONIC DEVICES - The present invention provides semiconductor structures comprising a substrate and at least three III-V and/or II-VI multi junction building blocks, each comprising a p-n junction having at least two alloy layers, formed over the substrate, provided at least one multi-junction building block comprises II-VI alloy layers. Further described are methods for preparing semiconductor structures utilizing a sacrificial or etch-stop ternary III-V alloy layer over an III-V substrate. | 12-02-2010 |
| 20110024876 | CREATION OF THIN GROUP II-VI MONOCRYSTALLINE LAYERS BY ION CUTTING TECHNIQUES - Expungement ions, preferably including hydrogen ions, are implanted into a face of a first, preferably silicon, substrate such that there will be a maximum concentration of the expungement ions at a predetermined depth from the face. Subsequently a monocrystalline Group II-VI semiconductor layer, or two or more such layers, is/are grown on the face, as by means of molecular beam epitaxy. After this a second, preselected substrate is attached to an upper face of the Group II-VI layer(s). Next, the implanted expungement ions are used to expunge most of the first substrate from a remnant thereof, from the grown II-VI layer, and from the second substrate. In another embodiment, a group II-VI layer is grown on a first substrate silicon and an ionic implantation is conducted such that a maximum concentration of expungement ions occurs either in the silicon substrate at a predetermined depth from its interface with the II-VI layer or in the first Group II-VI semiconductor layer at a predetermined depth from the top face of the Group II-VI semiconductor layer. Thereafter all of the first substrate is expunged from the rest of the workpiece. Thin monocrystalline Group II-VI semiconductor structures may thus be mounted to substrates of the fabricator's choice; these substrates may be semiconductors, integrated circuits, MEMS structures, polymeric, metal or glass, may be flexible and may be curved. | 02-03-2011 |
| 20110024877 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF - A structure including a substrate, an intermediate layer provided and formed directly onto the substrate, a transition region, and a group II-VI bulk crystal material provided and formed as an extension of the transition region. The transition region acts to change the structure from the underlying substrate to that of the bulk crystal. In a method of manufacture, a similar technique can be used for growing the transition region and the bulk crystal layer. | 02-03-2011 |
| 20110180903 | SEMICONDUCTOR SUBSTRATE, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - There is provided a semiconductor wafer having a base wafer, an insulating layer, and a Si | 07-28-2011 |
| 20110233729 | CDTE SEMICONDUCTOR SUBSTRATE FOR EPITAXIAL GROWTH AND SUBSTRATE CONTAINER - Provided is a CdTe-based semiconductor substrate for epitaxial growth, which is capable of growing good-quality epitaxial crystals without urging a substrate user to implement etching treatment before the epitaxial growth. | 09-29-2011 |
