| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257488000 | Field relief electrode | 53 |
| 20080315343 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first insulating layer; a semiconductor layer provided on the first insulating layer; a first semiconductor region selectively provided in the semiconductor layer; a second semiconductor region selectively provided in the semiconductor layer and spaced from the first semiconductor region; a first main electrode provided in contact with the first semiconductor region; a second main electrode provided in contact with the second semiconductor region; a second insulating layer provided on the semiconductor layer; a first conductive material provided in the second insulating layer above a portion of the semiconductor layer located between the first semiconductor region and the second semiconductor region; and a second conductive material provided in a trench provided in a portion of the semiconductor layer opposed to the first conductive material, being in contact with the first conductive material, and reaching the first insulating layer. | 12-25-2008 |
| 20090152667 | Semiconductor with active component and method for manufacture - A semiconductor with active component and method for manufacture. One embodiment provides a semiconductor component arrangement having an active semiconductor component and a semiconductor body having a first semiconductor zone, a third semiconductor zone, and also a drift zone arranged between the first semiconductor zone and the third semiconductor zone. A patterned fourth semiconductor zone doped complementarily to the drift zone is arranged in the drift zone. A potential control structure is provided, which is connected to the patterned fourth semiconductor zone. The potential control structure is designed to connect the patterned fourth semiconductor zone, in the off state of the semiconductor component, to an electrical potential lying between the electrical potential of the first semiconductor zone and the electrical potential of the third semiconductor zone. | 06-18-2009 |
| 20090189240 | SEMICONDUCTOR DEVICE WITH AT LEAST ONE FIELD PLATE - A semiconductor component with at least one field plate. One embodiment provides the field plate to make contact with the semiconductor body at a connection contact. The semiconductor body has in the region of the connection contact a doping concentration that is less than 5·10 | 07-30-2009 |
| 20090294891 | SEMICONDUCTOR DEVICE - A semiconductor layer of a vertical diode is divided into a center region and a surrounding region. An anode electrode contacts a surface of the center region in the semiconductor layer. An insulation layer contacts a surface of the surrounding region in the semiconductor layer. Ring-shaped FLR regions are formed in the surface of the surrounding region in the semiconductor layer. The innermost FLR region extends from an inside to an outside of a boundary between the anode electrode and the insulation layer and extends along the boundary. A shoulder portion is formed in the surface of the semiconductor layer in a manner such that a portion that contacts the insulation layer is higher than a portion that contacts the anode electrode. Flows of holes directed toward the anode electrode pass through a plurality of positions in the shoulder portion. | 12-03-2009 |
| 20120043638 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first insulating layer; a semiconductor layer provided on the first insulating layer; a first semiconductor region selectively provided in the semiconductor layer; a second semiconductor region selectively provided in the semiconductor layer and spaced from the first semiconductor region; a first main electrode provided in contact with the first semiconductor region; a second main electrode provided in contact with the second semiconductor region; a second insulating layer provided on the semiconductor layer; a first conductive material provided in the second insulating layer above a portion of the semiconductor layer located between the first semiconductor region and the second semiconductor region; and a second conductive material provided in a trench provided in a portion of the semiconductor layer opposed to the first conductive material, being in contact with the first conductive material, and reaching the first insulating layer. | 02-23-2012 |
| 20120193748 | TRENCH-BASED POWER SEMICONDUCTOR DEVICES WITH INCREASED BREAKDOWN VOLTAGE CHARACTERISTICS - Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed. | 08-02-2012 |
| 20120193749 | SEMICONDUCTOR DEVICE - In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region. | 08-02-2012 |
| 20120267749 | SEMICONDUCTOR DEVICE HAVING FUSE ELEMENTS AND GUARD RING SURROUNDING THE FUSE ELEMENTS - The semiconductor memory device has a fuse area in which fuse elements for registering addresses of defective memory cells are arranged. A guard ring is formed around the fuse area and is covered by a passivation film. The passivation film above the fuse area has an opening. The guard ring has a first ring in a first layer, a second ring in a second layer and a third ring in a third layer. These rings are connected by a first connecting ring and a second connecting ring. The first ring is positioned at an inward part of the second ring to provide an area unoccupied by the first ring beneath the second ring. | 10-25-2012 |
| 20120306044 | Edge termination configurations for high voltage semiconductor power devices - This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area wherein the edge termination area comprises a wide trench filled with a field-crowding reduction filler and a buried field plate buried under a top surface of the semiconductor substrate and laterally extended over a top portion of the field crowding field to move a peak electric field laterally away from the active cell area. In a specific embodiment, the field-crowding reduction filler comprises a silicon oxide filled in the wide trench. | 12-06-2012 |
| 20130161780 | METHOD OF FABRICATING A GAN P-I-N DIODE USING IMPLANTATION - A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region | 06-27-2013 |
| 20130168799 | SEMICONDUCTOR DEVICE HAVING GROOVE-SHAPED VIA-HOLE - The semiconductor device has insulating films | 07-04-2013 |
| 20130200481 | SEMICONDUCTOR DEVICE HAVING GROOVE-SHAPED VIA-HOLE - The semiconductor device has insulating films | 08-08-2013 |
| 20130341751 | SEMICONDUCTOR DEVICE - A semiconductor device includes a superjunction structure. The influence of external charge on device performance is suppressed using a shield electrode, field plate electrodes, and cover electrodes in various configurations. Optional embodiments include placing an interconnection film between certain electrodes and the upper surface of the superjunction structure. Cover electrodes may also be connected to various potentials to limit the effects of external charge on device performance. | 12-26-2013 |
| 20140070356 | Method for Protecting a Semiconductor Device Against Degradation and a Method for Manufacturing a Semiconductor Device Protected Against Hot Charge Carriers - A method for protecting a semiconductor device against degradation of its electrical characteristics is provided. The method includes providing a semiconductor device having a first semiconductor region and a charged dielectric layer which form a dielectric-semiconductor interface. The majority charge carriers of the first semiconductor region are of a first charge type. The charged dielectric layer includes fixed charges of the first charge type. The charge carrier density per area of the fixed charges is configured such that the charged dielectric layer is shielded against entrapment of hot majority charge carriers generated in the first semiconductor region. Further, a semiconductor device which is protected against hot charge carriers and a method for forming a semiconductor device are provided. | 03-13-2014 |
| 20140077329 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A breakdown voltage structure portion includes a field plate with an annular polysilicon field plate and a metal field plate. In the breakdown voltage structure portion, a plurality of annular guard rings are provided in a surface layer of the semiconductor substrate. The polysilicon field plates are separately arranged on the inner circumferential side and the outer circumferential side of the guard ring. Polysilicon bridges that connect the polysilicon field plates on the inner and outer circumferential sides are provided on at least one guard ring among the plurality of guard rings at a predetermined interval so as to be arranged over the entire circumference of the guard ring. The metal field plate is provided on the guard ring in a corner portion of the breakdown voltage structure portion and at least one guard ring in a straight portion of the breakdown voltage structure portion. | 03-20-2014 |
| 20140284755 | SEMICONDUCTOR DEVICES - The semiconductor device includes a first semiconductor layer of the first conductive type, a second semiconductor layer having the cubic crystalline structure formed on the first semiconductor layer, an electrode formed on the second semiconductor layer, and a reactive region formed between the second semiconductor layer and the electrode. The second semiconductor layer includes an upper surface that is tilted from the (100) plane. The reactive region includes at least one element constituting the second semiconductor layer, at least one element constituting the electrode, and forming a protuberance extending toward the second semiconductor layer. | 09-25-2014 |
| 20140284756 | SEMICONDUCTOR DEVICE - A semiconductor device includes a superjunction structure. The influence of external charge on device performance is suppressed using a shield electrode, field plate electrodes, and cover electrodes in various configurations. Optional embodiments include placing an interconnection film between certain electrodes and the upper surface of the superjunction structure. Cover electrodes may also be connected to various potentials to limit the effects of external charge on device performance. | 09-25-2014 |
| 20140339669 | Semiconductor Device with a Field Plate Trench Having a Thick Bottom Dielectric - Disclosed is a power device, such as a power MOSFET, and methods for fabricating same. The device includes a field plate trench. The device further includes first and second trench dielectrics inside the field plate trench. The device also includes a field plate situated over the first trench dielectric and within the second trench dielectric. A combined thickness of the first and second trench dielectrics at a bottom of the field plate trench is greater than a sidewall thickness of the second trench dielectric. | 11-20-2014 |
| 20140339670 | Semiconductor Device with a Thick Bottom Field Plate Trench Having a Single Dielectric and Angled Sidewalls - Disclosed is a power device, such as a power MOSFET device and a method for fabricating same. The device includes a field plate trench. The field plate trench has a predetermined width and a predetermined sidewall angle. The device further includes a single trench dielectric on sidewalls of the field plate trench and at a bottom of the field plate trench. The single trench dielectric has a bottom thickness that is greater than a sidewall thickness. The device also includes a field plate situated within the single trench dielectric. | 11-20-2014 |
| 20140339671 | METHOD TO FORM STEPPED DIELECTRIC FOR FIELD PLATE FORMATION - A semiconductor device is formed with a stepped field plate over at least three sequential regions in which a total dielectric thickness under the stepped field plate is at least 10 percent thicker in each region compared to the preceding region. The total dielectric thickness in each region is uniform. The stepped field plate is formed over at least two dielectric layers, of which at least all but one dielectric layer is patterned so that at least a portion of a patterned dielectric layer is removed in one or more regions of the stepped field plate. | 11-20-2014 |
| 20140374871 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device which can suppress the influence of the external electric charge and can be efficiently manufactured is provided. The semiconductor device is provided with an active region in which a semiconductor element is disposed and a termination region between the active region and an edge surface of the semiconductor substrate. An insulating layer is disposed on at least a part of an upper surface of the termination region. A plurality of floating electrodes is disposed at an interval in the insulating layer in a direction from the active region toward the edge surface of the semiconductor substrate, and a width of the plurality of floating electrodes in a thickness direction of the semiconductor substrate is greater than a width of the plurality of floating electrodes in the direction from the active region toward the edge surface of the semiconductor substrate. | 12-25-2014 |
| 20150041946 | Edge Termination Structure with Trench Isolation Regions - A semiconductor device includes a semiconductor body and an edge termination structure. The edge termination structure comprises a first oxide layer, a second oxide layer, a semiconductor mesa region between the first oxide layer and the second oxide layer, and a doped field region comprising a first section in the semiconductor mesa region, and a second section in a region below the semiconductor mesa region. The second section overlaps the first and the second oxide layers in the region below the semiconductor mesa region. | 02-12-2015 |
| 20150091126 | SEMICONDUCTOR DEVICE - A field limiting regions are arranged in the upper surface of a semiconductor region in the peripheral region and connected to upper portions of at least some of columnar regions. An insulating film is provided on the semiconductor region in the peripheral region and covering a field limiting region. A coupling plate electrode is provided above a pair of the field limiting regions adjacent to each other in a direction from a boundary between the element region and the peripheral region to an outer edge of the peripheral region. The joint field regions are in contact with one of the pair of field limiting regions on a boundary side in an opening formed in the insulating film, and reaching the other one of the pair of the field limiting regions on an outer edge side with the insulating film interposed therebetween. | 04-02-2015 |
| 20150102452 | SEMICONDUCTOR DEVICE - A semiconductor device according to the present invention includes, in a termination region, a p− type breakdown voltage holding region that is an impurity region formed in a predetermined depth direction from a substrate surface of an n− type substrate, a first insulating film formed on the n− type substrate so as to cover at least the p− type breakdown voltage holding region, a first field plate formed on the first insulating film, a second insulating film formed so as to cover the first field plate and the first insulating film, and a second field plate formed on the second insulating film. The first insulating film is thicker in a corner portion than in an X-direction straight portion and a Y-direction straight portion. | 04-16-2015 |
| 20150295025 | ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION - An electronic device can include an electronic component and a termination region adjacent to the electronic component region. In an embodiment, the termination region can include an insulating region that extends a depth into a semiconductor layer, wherein the depth is less than 50% of the thickness of the semiconductor layer. In another embodiment, the termination region can include a first insulating region that extends a first depth into the semiconductor layer, and a second insulating region that extends a second depth into the semiconductor layer, wherein the second depth is less than the first depth. In another aspect, a process of forming an electronic device can include patterning a semiconductor layer to define a trench within termination region while another trench is being formed for an electronic component within an electronic component region. | 10-15-2015 |
| 20150333132 | TERMINATION STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A termination structure of a semiconductor device is provided. The semiconductor device includes an active area and a termination area adjacent to the active area, in which the termination area has the termination structure. The termination structure includes a substrate, an epitaxy layer, a dielectric layer, a conductive material layer and a conductive layer. The epitaxy layer is disposed on the substrate and has a voltage-sustaining region. The voltage-sustaining region has trenches parallel to each other. The dielectric layer is disposed in the trenches and on a portion of the epitaxy layer. The conductive material layer is disposed on the dielectric layer in the trenches. The conductive layer covers the trenches, and is in contact with the conductive material layer and a portion of the epitaxy layer, and is electrically connected between the active area and the termination area. A method for manufacturing the termination structure is also provided. | 11-19-2015 |
| 20150333133 | SEMICONDUCTIVE DEVICE AND ASSOCIATED METHOD OF MANUFACTURE - The disclosure relates to a semiconductive device comprising a body having: a first surface and an opposing second surface; a first semiconductive layer adjacent to the first surface; an active region comprising: a plurality of active trenches in the first surface, the plurality of active trenches extending from the first surface into the first semiconductive layer and having an active trench width, and a plurality of active cells, each active cell provided in the first semiconductive layer adjacent to an active trench, the active cells having an active cell width; and a termination region at a periphery of the first surface comprising: at least one termination trench, the at least one termination trench extending from the first surface into the first semiconductive layer, wherein the termination region has a width that is greater than the active trench width; and a number of termination trench separators having a width that is less than the active cell width, wherein the active trenches and the at least one termination trench each comprise a first insulator layer adjacent to the first semiconductive layer of the body, and wherein conductive material is disposed on the first insulating layer within each of the active trenches. | 11-19-2015 |
| 20160013279 | FIELD PLATE STRUCTURE FOR POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 01-14-2016 |
| 20160043185 | SEMICONDUCTOR COMPONENT AND METHOD - In accordance with an embodiment, a method for manufacturing a semiconductor component includes providing a semiconductor material having a surface and forming a passivation layer on the semiconductor material Portions of the passivation layer are removed and portions of the semiconductor material exposed by removing the portions of the passivation layer are also removed. A layer of dielectric material is formed on the passivation layer and the exposed portions of the semiconductor material and first and second cavities are formed in the layer of dielectric material. The first cavity exposes a first portion of the semiconductor material and has at least one step shaped sidewall and the second cavity exposes a second portion of the semiconductor material. A first electrode is formed in the first cavity and a second electrode is formed in the second cavity. | 02-11-2016 |
| 20160049463 | Semiconductor Device with a Shielding Structure - A semiconductor device has a semiconductor body including opposing bottom and top sides, a surface surrounding the semiconductor body, an active semiconductor region formed in the semiconductor body, an edge region surrounding the active semiconductor region, a first semiconductor zone of a first conduction type formed in the edge region, an edge termination structure formed in the edge region at the top side, and a shielding structure arranged on that side of the edge termination structure facing away from the bottom side. The shielding structure has a number of N1≧2 first segments and a number of N2≧1 second segments. Each of the first segments is electrically connected to each of the other first segments and to each of the second segments, and each of the second segments has an electric resistivity higher than an electric resistivity of each of the first segments. | 02-18-2016 |
| 20160064477 | Semiconductor Device and a Method for Manufacturing a Semiconductor Device - A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region. Further it comprises a plurality of needle-shaped cell trenches within the cell region reaching from a surface of the semiconductor substrate structure into the substrate structure and an edge termination trench within the edge termination region surrounding the cell region at the surface of the semiconductor substrate structure. | 03-03-2016 |
| 20160141375 | Field Plates on Two Opposed Surfaces of Double-Base Bidirectional Bipolar Transistor: Devices, Methods, and Systems - Dual-base two-sided bipolar power transistors which use an insulated field plate to separate the emitter/collector diffusions from the nearest base contact diffusion. This provides a surprising improvement in turn-off performance, and in breakdown voltage. | 05-19-2016 |
| 20160172451 | SEMICONDUCTOR ARRANGEMENT | 06-16-2016 |
| 20160380063 | Method for Producing a Semiconductor Component with Insulated Semiconductor Mesas in a Semiconductor Body - A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer. | 12-29-2016 |
| 20170236818 | SEMICONDUCTOR DEVICE | 08-17-2017 |
| 257489000 | Resistive | 2 |
| 20120119318 | SEMICONDUCTOR DEVICE WITH LATERAL ELEMENT - In a semiconductor device in which a first electrode and a second electrode are disposed on a surface of a first conductivity-type semiconductor layer of a semiconductor substrate and a lateral element is formed to cause an electric current between the first electrode and the second electrode, a scroll-shaped resistive field plate is disposed on the semiconductor layer across an insulation film. The resistive field plate extends toward the second electrode while surrounding a periphery of the first electrode in a scroll shape. A resistance value of a total resistance of the resistive field plate is in a range between 90 kΩ and 90 MΩ. | 05-17-2012 |
| 20140231952 | PRODUCTION OF HIGH-PERFORMANCE PASSIVE DEVICES USING EXISTING OPERATIONS OF A SEMICONDUCTOR PROCESS - In one general aspect, a semiconductor processing method can include forming an N-type silicon region disposed within a P-type silicon substrate. The method can also include forming a field oxide (FOX) layer in the P-type silicon substrate where the FOX layer includes an opening exposing at least a portion of the N-type silicon region. The method can further include forming a reduced surface field (RESURF) oxide (ROX) layer having a first portion disposed on the exposed N-type silicon region and a second portion disposed on the FOX layer where the ROX layer includes a first dielectric layer in contact with the exposed N-type silicon region and a second dielectric layer disposed on the first dielectric layer. The method can further include forming a doped polysilicon layer having a first portion disposed on the first portion of the ROX layer and a second portion disposed on the second portion of the ROX layer. | 08-21-2014 |
| 257490000 | Combined with floating pn junction guard region | 16 |
| 20090072340 | EDGE TERMINATION FOR HIGH VOLTAGE SEMICONDUCTOR DEVICE - High voltage semiconductor devices with high-voltage termination structures are constructed on lightly doped substrates. Lightly doped p-type substrates are particularly prone to depletion and inversion from positive charges, degrading the ability of associated termination structures to block high voltages. To improve the efficiency and stability of termination structures, second termination regions of the same dopant type as the substrate, more heavily doped than the substrate but more lightly doped than first termination regions, are positioned adjoining the first termination regions. The second termination regions raise the field threshold voltage where the surface is vulnerable and render the termination structure substantially insensitive to positive charges at the surface. The use of higher dopant concentration in the gap region without causing premature avalanche is facilitated by only creating second termination regions for regions lacking field plate protection. | 03-19-2009 |
| 20100001362 | EDGE TERMINATION FOR SEMICONDUCTOR DEVICE - A semiconductor device has active region ( | 01-07-2010 |
| 20100193894 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor chip, and a guard ring made of an electrically conductive material and arranged between electrodes on the semiconductor chip and side edges of the semiconductor chip, the guard ring being divided by isolating sections on the semiconductor chip. | 08-05-2010 |
| 20100289110 | SEMICONDUCTOR DEVICE - A semiconductor device using one or more guard rings includes a p-type guard ring region surrounding a pn junction region, an insulating film covering the p-type guard ring region, one or more conductive films electrically connected with the p-type guard ring region through one or more contact holes made in the insulating film, and a semi-insulating film covering the insulating film and the conductive films. Thus, a desired breakdown voltage characteristic can be ensured even if a foreign matter or the like adheres to a surface of the conductive films. | 11-18-2010 |
| 20110204469 | SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - A semiconductor device is provided with a peripheral region that has a narrow width and exhibits good electric field relaxation and high robustness against induced charges. The device has an active region for main current flow and a peripheral region surrounding the active region on a principal surface of a semiconductor substrate of a first conductivity type. The peripheral region has a guard ring of a second conductivity type composed of straight sections and curved sections connecting the straight sections formed in a region of the principal surface surrounding the active region, and a pair of polysilicon field plates in a ring shape formed separately on inner and outer circumferential sides of the guard ring. The surface of the guard ring and the pair of polysilicon field plates of the inner circumferential side and the outer circumferential side are electrically connected with a metal film in the curved section. | 08-25-2011 |
| 20120112307 | BIPOLAR TRANSISTOR WITH GUARD REGION - A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation. | 05-10-2012 |
| 20130020671 | Termination of high voltage (HV) devices with new configurations and methods - This invention discloses a semiconductor power device disposed in a semiconductor substrate comprising a heavily doped region formed on a lightly doped region and having an active cell area and an edge termination area. The edge termination area comprises a plurality of termination trenches formed in the heavily doped region with the termination trenches lined with a dielectric layer and filled with a conductive material therein. The edge termination further includes a plurality of buried guard rings formed as doped regions in the lightly doped region of the semiconductor substrate immediately adjacent to the termination trenches. | 01-24-2013 |
| 20130105933 | SEMICONDUCTOR APPARATUS | 05-02-2013 |
| 20130175656 | ISOLATED ZENER DIODE - Disclosed is a Zener diode having a scalable reverse-bias breakdown voltage (V | 07-11-2013 |
| 20130341752 | TWO-DIMENSIONAL GUARD STRUCTURE AND A RADIATION DETECTOR WITH THE SAME - A semiconductor device comprises a piece of semiconductor material. On a surface of said piece of semiconductor material, a number of electrodes exist and are configured to assume different electric potentials. A guard structure comprises a two-dimensional array of conductive patches, at least some of which are left to assume an electric potential under the influence of electric potentials existing at said electrodes. | 12-26-2013 |
| 20140145291 | POWER SEMICONDUCTOR DEVICE - Disclosed herein is a power semiconductor device. The power semiconductor device includes a second conductive type first junction termination extension (JTE) layer that is formed so as to be in contact with one side of the second conductive type well layer, a second conductive type second JTE layer that is formed on the same line as the second conductive type first JTE layer, and is formed so as to be spaced apart from the second conductive type first JTE layer in a length direction of the substrate, and a poly silicon layer that is formed so as to be in contact with the second conductive type well layer and an upper portion of the second conductive type first JTE layer. | 05-29-2014 |
| 20140167204 | SEMICONDUCTOR DIODE ASSEMBLY - TSV devices with p-n junctions that are planar have superior performance in breakdown and current handling. Junction diode assembly formed in enclosed trenches occupies less chip area compared with junction-isolation diode assembly in the known art. Diode assembly fabricated with trenches formed after the junction formation reduces fabrication cost and masking steps increase process flexibility and enable asymmetrical TSV and uni-directional TSV functions. | 06-19-2014 |
| 20140353793 | GUARDING RING STRUCTURE OF A HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF - The present invention provides a guarding ring structure of a semiconductor high voltage device and the manufacturing method thereof The guarding ring structure comprises a first N type monocrystalline silicon substrate ( | 12-04-2014 |
| 20150054118 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate, and a field plate portion formed on a front surface of a non-cell region. The non-cell region includes a plurality of FLR layers. The FLR layers extend in a first direction along a circumference of the cell region. The field plate portion includes: an insulating film; a plurality of first conducting layers each disposed along a corresponding FLR layer; and a plurality of second conducting layers. The second conducting layers are disposed on part of their corresponding FLR layers in an intermittent manner along the corresponding FLR layers. Each of the second conducting layers includes a front surface portion, a first contact portion, and a second contact portion. Any of the first contact portions and the second contact portions are not provided at positions adjacent to the first contact portion and the second contact portion in the second direction. | 02-26-2015 |
| 20150115391 | Semiconductor Device Having a Locally Reinforced Metallization Structure and Method for Manufacturing Thereof - A method for forming a semiconductor device includes providing a semiconductor substrate having a first area and a second area. A first metal layer structure is formed which includes at least a first metal portion in the first area and a second metal portion in the second area. A plating mask is formed on the first metal layer structure to cover the second metal portion, and a second metal layer structure is plated on and in ohmic contact with the first metal portion of the first metal layer structure. | 04-30-2015 |
| 20150364541 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Provided is a semiconductor device in which movable ions in an insulation layer on a main surface are reduced and dielectric strength is enhanced. A semiconductor device has a plurality of FLRs, an insulation layer, and a semiconductor layer. The plurality of FLRs surrounds, in a plan view of a substrate, an active region in which an element is formed. The insulation layer is provided on the main surface of the semiconductor device and covers the plurality of FLRs. The semiconductor layer is provided in the insulation layer and surrounds the active region in parallel to the FLRs. The semiconductor layer contains impurities at a surface density lower than a surface density that satisfies a RESURF condition. In the plan view, the semiconductor layer overlaps with a part of the region (an inter-ring region) between adjacent FLRs and does not overlap with rest of the inter-ring region. | 12-17-2015 |
