| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257031000 | Josephson | 59 |
| 20090008632 | SUPERCONDUCTING SHIELDING FOR USE WITH AN INTEGRATED CIRCUIT FOR QUANTUM COMPUTING - An integrated circuit for quantum computing may include a superconducting shield to limit magnetic field interactions. | 01-08-2009 |
| 20090014714 | CONTROL SYSTEM ARCHITECTURE FOR QUBITS - A control system architecture for quantum computing includes an array of qubits, which is divided into a plurality of sub-arrays based on a first direction and a second direction, the second direction intersecting the first direction, a plurality of control lines each coupled to a corresponding sub-array of qubits in the first directions a plurality of enable/unenable lines each coupled to a corresponding sub-array of qubits in the second direction, a controls signal source that generates a control signal, wherein the control lines are used to apply the control signal commonly to one or more sub-arrays of qubits in the first direction, an enable/unenable signal source that generates a enable signal, wherein the enable/unenable lines are used to apply the enable signal independently to the corresponding sub-array of qubits in the second direction to set a bias point of each qubit of the corresponding sub-array of qubits in the second direction between a first position, in which the qubit is unenabled and not responsive to the control signal, and a second position, in which the qubit is enabled and responsive to the control signal. | 01-15-2009 |
| 20090078931 | SYSTEMS, METHODS, AND APPARATUS FOR QUBIT STATE READOUT - A superconducting readout system includes a computation qubit; a measurement device to measure a state of the computation qubit; and a latch qubit that mediates communicative coupling between the computation qubit and the measurement device. The latch qubit includes a qubit loop that includes at least two superconducting inductors coupled in series with each other; a compound Josephson junction that interrupts the qubit loop that includes at least two Josephson junctions coupled in series with each other in the compound Josephson junction and coupled in parallel with each other with respect to the qubit loop; and a first clock signal input structure to couple clock signals to the compound Josephson junction. | 03-26-2009 |
| 20090078932 | SYSTEMS, DEVICES, AND METHODS FOR CONTROLLABLY COUPLING QUBITS - A coupling system may include first and second magnetic flux inductors communicatively coupled to a Josephson junction of an rf SQUID. The coupling system may allow transverse coupling between qubits. A superconducting processor may include at least one of the coupling systems and two or more qubits. A method may include providing first, second and third coupling structure to control the coupling system. | 03-26-2009 |
| 20090121215 | SYSTEMS, DEVICES, AND METHODS FOR ANALOG PROCESSING - A system employs a plurality of physical qubits, each having a respective bias operable to up to six differentiable inputs to solve a Quadratic Unconstrained Binary Optimization problem. Some physical qubit couplers are operated as intra-logical qubit couplers to ferromagnetically couple respective pairs of the physical qubits as a logical qubit, where each logical qubit represents a variable from the Quadratic Unconstrained Binary Optimization problem. The logical qubits may include two or more physical qubits | 05-14-2009 |
| 20090173936 | QUANTUM PROCESSOR - Multiple substrates that carry quantum devices are coupled to provide quantum mechanical communicators therebetween, for example, using superconducting interconnects, vias, solder and/or magnetic flux. Such may advantageously reduce a footprint of a device such as a quantum processor. | 07-09-2009 |
| 20090261319 | Josephson quantum computing device and integrated circuit using such devices - A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device ( | 10-22-2009 |
| 20090315021 | DOUBLE-MASKING TECHNIQUE FOR INCREASING FABRICATION YIELD IN SUPERCONDUCTING ELECTRONICS - An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed. | 12-24-2009 |
| 20090321720 | SYSTEMS AND DEVICES FOR QUANTUM PROCESSOR ARCHITECTURES - A quantum processor may employ a heterogeneous qubit-coupling architecture to reduce the average number of intermediate coupling steps that separate any two qubits in the quantum processor, while limiting the overall susceptibility to noise of the qubits. The architecture may effectively realize a small-world network where the average qubit has a low connectivity (thereby allowing it to operate substantially quantum mechanically) but each qubit is within a relatively low number of intermediate coupling steps from any other qubit. To realize such, some of the qubits may have a relatively high connectivity, and may thus operate substantially classically. | 12-31-2009 |
| 20100006825 | SUPERCONDUCTING JUNCTION ELEMENT AND SUPERCONDUCTING JUNCTION CIRCUIT - A superconducting junction element has a lower electrode formed by a superconductor layer, a barrier layer provided on a portion of a surface of the lower electrode, an upper electrode formed by a superconductor and covering the barrier layer, and a superconducting junction formed by the lower electrode, the barrier layer and the upper electrode. A critical current density of the superconducting junction is controlled based on an area of the lower electrode. | 01-14-2010 |
| 20100133514 | SUPERCONDUCTING SHIELDING FOR USE WITH AN INTEGRATED CIRCUIT FOR QUANTUM COMPUTING - An integrated circuit for quantum computing may include a superconducting shield to limit magnetic field interactions. | 06-03-2010 |
| 20100171098 | PRESSURE DETECTION APPARATUS, JOSEPHSON DEVICE, AND SUPERCONDUCTING QUANTUM INTERFERENCE DEVICE THAT INCLUDE SUPERCONDUCTOR THIN FILM THAT UNDERGOES TRANSITION FROM SUPERCONDUCTOR TO INSULATOR BY PRESSURE - A pressure detection apparatus ( | 07-08-2010 |
| 20110057169 | SYSTEMS, METHODS AND APPARATUS FOR ACTIVE COMPENSATION OF QUANTUM PROCESSOR ELEMENTS - Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface. | 03-10-2011 |
| 20110062423 | TUNABLE TERAHERTZ RADIATION SOURCE - Terahertz radiation source and method of producing terahertz radiation, said source comprising a junction stack, said junction stack comprising a crystalline material comprising a plurality of self-synchronized intrinsic Josephson junctions; an electrically conductive material in contact with two opposing sides of said crystalline material; and a substrate layer disposed upon at least a portion of both the crystalline material and the electrically-conductive material, wherein the crystalline material has a c-axis which is parallel to the substrate layer, and wherein the source emits at least 1 mW of power. | 03-17-2011 |
| 20110089405 | SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS - Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector. | 04-21-2011 |
| 20110114920 | SYSTEM AND METHOD OF QUANTUM COMPUTING USING THREE-STATE REPRESENTATION OF A QUBIT - A method (and structure) of quantum computing. Two independent magnitudes of a three-state physical (quantum) system are set to simultaneously store two real, independent numbers as a qubit. The three-state physical (quantum) system has a first energy level, a second energy level, and a third energy level capable of being degenerate with respect to one another, thereby forming basis states for the qubit. | 05-19-2011 |
| 20110156008 | METHOD FOR IMPLEMENTING THE PI/8 GATE IN A GENUS=1 ISING SYSTEM - Disclosed herein is a protocol that enables the π/8-gate in chiral topological superconductors in which superconducting stiffness λ has been suppressed. The protocol enables a topologically protected π/8-gate in any pure Ising system that can be fabricated into genus=1 surface. By adding the π/8-gate to previously known techniques, a design for universal topologically protected quantum computation which may be implemented using rather conventional materials may be obtained. | 06-30-2011 |
| 20110175061 | SYSTEMS AND METHODS FOR SUPERCONDUCTING INTEGRATED CIRCUITS - A superconducting integrated circuit may include a magnetic flux transformer having an inner inductive coupling element and an outer inductive coupling element that surrounds the inner inductive coupling element along at least a portion of a length thereof. The magnetic flux transformer may have a coaxial-like geometry such that a mutual inductance between the first inductive coupling element and the second inductive coupling element is sub-linearly proportional to a distance that separates the first inner inductive coupling element from the first outer inductive coupling element. At least one of the first inductive coupling element and the second inductive coupling element may be coupled to a superconducting programmable device, such as a superconducting qubit. | 07-21-2011 |
| 20110175062 | MICROWAVE READOUT FOR FLUX-BIASED QUBITS - A method for determining whether a quantum system comprising a superconducting qubit is occupying a first basis state or a second basis state once a measurement is performed is provided. The method, comprising: applying a signal having a frequency through a transmission line coupled to the superconducting qubit characterized by two distinct, separate, and stable states of differing resonance frequencies each corresponding to the occupation of the first or second basis state prior to measurement; and measuring at least one of an output power or phase at an output port of the transmission line, wherein the measured output power or phase is indicative of whether the superconducting qubit is occupying the first basis state or the second basis state. | 07-21-2011 |
| 20120012818 | JOSEPHSON DEVICE, METHOD OF FORMING JOSEPHSON DEVICE AND SUPERCONDUCTOR CIRCUIT - A Josephson device includes a first superconducting electrode layer, a barrier layer, and a second superconducting electrode layer that are successively stacked. The first and second superconducting electrode layers are made of an oxide superconductor material having (RE) | 01-19-2012 |
| 20120112168 | Coherent Quantum Information Transfer Between Topological And Conventional Qubits - Computing bus devices that enable quantum information to be coherently transferred between topological and conventional qubits are disclosed. A concrete realization of such a topological quantum bus acting between a topological qubit in a Majorana wire network and a conventional semiconductor double quantum dot qubit is described, The disclosed device measures the joint (fermion) parity of the two different qubits by using the Aharonov-Casher effect in conjunction. with an ancillary superconducting flux qubit that facilitates the measurement. Such a parity measurement, together with the ability to apply Hadamard gates to the two qubits, allows for the production of states in which the topological and conventional qubits are maximally entangled, and for teleporting quantum states between the topological and conventional quantum systems. | 05-10-2012 |
| 20120187378 | Coherent Quantum Information Transfer Between Conventional Qubits - Computing bus devices that enable quantum information to be coherently transferred between conventional qubit pairs are disclosed. A concrete realization of such a quantum bus acting between conventional semiconductor double quantum dot qubits is described. The disclosed device measures the joint (fermion) parity of the two qubits by using the Aharonov-Casher effect in conjunction with an ancillary superconducting flux qubit that facilitates the measurement. Such a parity measurement, together with the ability to apply Hadamard gates to the two cubits, allows for the production of states in which the qubits are maximally entangled, and for teleporting quantum states between the quantum systems. | 07-26-2012 |
| 20120319085 | ARRAY OF QUANTUM SYSTEMS IN A CAVITY FOR QUANTUM COMPUTING - A device includes a volume bounded by electromagnetically conducting walls, an aperture in a bounding wall of the electromagnetically conducting walls, a plurality of quantum systems disposed within the volume and an electromagnetic field source coupled to the volume via the aperture. | 12-20-2012 |
| 20120326130 | JOSEPHSON QUANTUM COMPUTING DEVICE AND INTEGRATED CIRCUIT USING SUCH DEVICES - A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device ( | 12-27-2012 |
| 20130087766 | SCALABLE QUANTUM COMPUTER ARCHITECTURE WITH COUPLED DONOR-QUANTUM DOT QUBITS - A quantum bit computing architecture includes a plurality of single spin memory donor atoms embedded in a semiconductor layer, a plurality of quantum dots arranged with the semiconductor layer and aligned with the donor atoms, wherein a first voltage applied across at least one pair of the aligned quantum dot and donor atom controls a donor-quantum dot coupling. A method of performing quantum computing in a scalable architecture quantum computing apparatus includes arranging a pattern of single spin memory donor atoms in a semiconductor layer, forming a plurality of quantum dots arranged with the semiconductor layer and aligned with the donor atoms, applying a first voltage across at least one aligned pair of a quantum dot and donor atom to control a donor-quantum dot coupling, and applying a second voltage between one or more quantum dots to control a Heisenberg exchange J coupling between quantum dots and to cause transport of a single spin polarized electron between quantum dots. | 04-11-2013 |
| 20130119351 | QUANTUM BITS AND METHOD OF FORMING THE SAME - Methods are provided of forming a Josephson junction (JJ) quantum bit (qubit). In one embodiment, the method comprises forming a JJ trilayer on a substrate. The JJ trilayer is comprised of a dielectric layer sandwiched between a bottom superconductor material layer and a top superconductor material layer. The method further comprises performing a thermal hardening process on the JJ trilayer to control diffusion of the dielectric layer into the bottom superconductor material layer and the top superconductor material layer, and etching openings in the JJ trilayer to form one or more JJ qubits. | 05-16-2013 |
| 20130299783 | Multi-Band Topological Nanowires - A topological qubit wire hosts Majorana zero-energy modes and includes a superconductor, which may be an s-wave superconductor, and a quasi-1D nanowire, which may be a semi-conductor. The Majorana zero-energy modes are localized at ends of the quasi-1D nanowire, which may be sized and shaped to provide occupancy of a few transverse modes in a first direction and occupancy of a few transverse modes in a second direction. In some instances, the occupancy in the first direction may be greater than or equal to 3, and the occupancy in the second direction may be 1. | 11-14-2013 |
| 20130313526 | SYSTEMS, METHODS AND APPARATUS FOR ACTIVE COMPENSATION OF QUANTUM PROCESSOR ELEMENTS - Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface. | 11-28-2013 |
| 20140054552 | DOUBLE-MASKING TECHNIQUE FOR INCREASING FABRICATION YIELD IN SUPERCONDUCTING ELECTRONICS - An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed. | 02-27-2014 |
| 20140097405 | SYSTEMS AND DEVICES FOR QUANTUM PROCESSOR ARCHITECTURES - Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Each unit cell is positioned proximally adjacent at least one other unit cell. Within each unit cell, at least one qubit is longitudinally shifted with respect to at least one other qubit such that the longitudinally-shifted qubit crosses at least one qubit in a proximally adjacent unit cell. Communicative coupling between qubits is realized through respective intra-cell and inter-cell coupling devices. The longitudinal shifting of qubits and resultant crossing of qubits in proximally adjacent unit cells enables quantum processor architectures that can be better suited to solve certain problems. | 04-10-2014 |
| 20140124739 | SELF-ASSEMBLED QUANTUM COMPUTERS AND METHODS OF PRODUCING THE SAME - One aspect of the invention provides a self-assembled quantum computer including a plurality of quantum dots coupled by binding domains. Another aspect of the invention provides a method of self-assembling a quantum computer. The method includes: providing a plurality of quantum dots, each of the quantum dots coupled to between one and six binding domains; and facilitating coupling of the quantum dots through the binding domains, thereby self-assembling a quantum computer. | 05-08-2014 |
| 20140175380 | SUPERCONDUCTING SINGLE FLUX QUANTUM INTEGRATED CIRCUIT DEVICE - The present invention relates to a superconducting single flux quantum integrated circuit device, and eliminates the return current from a bias current and the effect the bias current itself has on SFQ logic circuits in a chip. A bias power source line for supplying a DC bias current for the superconducting single flux quantum integrated circuit in a chip and a bias drawing power source line for drawing said DC bias current to the outside of the chip are provided, the end of the bias drawing power source line is connected to the ground plane of the chip via a thin-film resistor having a plurality of resistance values of 0.1 milliohm to I milliohm near the superconducting single flux quantum integrated circuit laid out in the chip, and the DC bias current is drawn from a connection point with the ground plane. | 06-26-2014 |
| 20140246652 | PLANAR QUBITS HAVING INCREASED COHERENCE TIMES - An interdigitated capacitor includes a substrate and a pair of comb-like electrodes both formed on the semiconductor substrate and horizontally arranged thereon, each of the pair of comb-like electrodes including finger electrodes having a curved profile. | 09-04-2014 |
| 20140264283 | FREQUENCY ARRANGEMENT FOR SURFACE CODE ON A SUPERCONDUCTING LATTICE - A device lattice arrangement including a plurality of devices, a plurality of physical connections for the plurality of devices, wherein each of the plurality of devices are coupled to at least two of the plurality of physical connections, a plurality of identity labels associated with individual devices of the plurality of devices and an arrangement of identity labels such that pairs of devices of the plurality of devices connected by some number of the plurality of connections have different identity labels. | 09-18-2014 |
| 20140264284 | FREQUENCY SEPARATION BETWEEN QUBIT AND CHIP MODE TO REDUCE PURCELL LOSS - A system, method, and chip to control Purcell loss are described. The chip includes qubits formed on a first surface of a substrate. The method includes determining frequencies of the qubits, and controlling a separation between the frequencies of the qubits and chip mode frequencies of the chip. | 09-18-2014 |
| 20140264285 | MULTIPLE-QUBIT WAVE-ACTIVATED CONTROLLED GATE - A device includes a housing, at least two qubits disposed in the housing and a resonator disposed in the housing and coupled to the at least two qubits, wherein the at least two qubits are maintained at a fixed frequency and are statically coupled to one another via the resonator, wherein energy levels |03> and |12> are closely aligned, wherein a tuned microwave signal applied to the qubit activates a two-qubit phase interaction. | 09-18-2014 |
| 20140264286 | SUSPENDED SUPERCONDUCTING QUBITS - A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer. | 09-18-2014 |
| 20140264287 | REMOVAL OF SPURIOUS MICROWAVE MODES VIA FLIP-CHIP CROSSOVER - A coplanar waveguide device includes a coplanar waveguide structure disposed on a substrate, at least one qubit coupled to the coplanar waveguide structure and an add-on chip having a metallized trench, and disposed over the substrate. | 09-18-2014 |
| 20140264288 | METHOD AND SYSTEM THAT IMPLEMENT A V-GATE QUANTUM CIRCUIT - The current application is directed to methods and quantum circuits that prepare qubits in specified non-stabilizer quantum states that can, in turn, be used for a variety of different purposes, including in a quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate that imparts a specified, arbitrary rotation to the state-vector representation of the state of an input qubit. In certain implementations, the methods and systems consume multiple magic-state qubits in order to carry out probabilistic rotation operators to prepare qubits with state vectors having specified rotation angles with respect to a rotation axis. These qubits are used as resources input to various quantum circuits, including the quantum-circuit implementation of an arbitrary single-qubit unitary quantum gate, including a V gate. | 09-18-2014 |
| 20150060771 | ATOMISTIC QUANTUM DOTS - A quantum device is provided that includes controllably quantum mechanically coupled dangling bonds extending from a surface of a semiconductor material. Each of the controllably quantum mechanically coupled dangling bonds has a separation of at least one atom of the semiconductor material. At least one electrode is provided for selectively modifying an electronic state of the controllably quantum mechanically coupled dangling bonds. By providing at least one additional electron within the controllably quantum mechanically coupled dangling bonds with the proviso that there exists at least one unoccupied dangling bond for each one additional electron present, the inventive device is operable at least to 293 degrees Kelvin and is largely immune to stray electrostatic perturbations. Room temperature operable quantum cellular automata and qubits are constructed thereform. | 03-05-2015 |
| 20150097159 | QUANTUM COMPUTING DEVICE SPIN TRANSFER TORQUE MAGNETIC MEMORY - A quantum computing device magnetic memory is described. The quantum computing device magnetic memory is coupled with a quantum processor including at least one quantum device corresponding to at least one qubit. The quantum computing device magnetic memory includes magnetic storage cells coupled with the quantum device(s) and bit lines coupled to the magnetic storage cells. Each of the magnetic storage cells includes at least one magnetic junction. The magnetic junction(s) include a reference layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the reference layer and the free layer. The magnetic junction(s) are configured to allow the free layer to be switched between stable magnetic states. The magnetic junction(s) are configured such that the free layer has a nonzero initial writing spin transfer torque in an absence of thermal fluctuations. | 04-09-2015 |
| 20150325774 | FREQUENCY SEPARATION BETWEEN QUBIT AND CHIP MODE TO REDUCE PURCELL LOSS - A system, method, and chip to control Purcell loss are described. The chip includes qubits formed on a first surface of a substrate. The method includes determining frequencies of the qubits, and controlling a separation between the frequencies of the qubits and chip mode frequencies of the chip. | 11-12-2015 |
| 20150340584 | SUSPENDED SUPERCONDUCTING QUBITS - A qubit system includes a substrate layer, a qubit circuit suspended above the substrate layer and fine structure disposed between the qubit circuit and the substrate layer. | 11-26-2015 |
| 20150357550 | SUPERCONDUCTING DEVICE WITH AT LEAST ONE ENCLOSURE - Some embodiments are directed to a device including multiple substrates comprising one or more troughs. The substrates are disposed such that the one or more troughs form at least one enclosure. At least one superconducting layer covers at least a portion of the at least one enclosure. Other embodiments are directed to a method for manufacturing a superconducting device. The method includes acts of forming at least one trough in at least a first substrate; covering at least a portion of the first substrate with a superconducting material; covering at least a portion of a second substrate with the superconducting material; and bonding the first substrate and the second substrate to form at least one enclosure comprising the at least one trough and the superconducting material. | 12-10-2015 |
| 20150380631 | Electronic Circuitry Having Superconducting Tunnel Junctions with Functional Electromagnetic-Responsive Tunneling Regions - A device includes at least one superconducting tunnel junction having a junction region comprising a junction barrier material responsive to electromagnetic fields within the MHz to THz range. The junction may be contained within a bi-SQUID loop having two main junctions and a center junction. The junction barrier material for the main junctions may have different electromagnetic-responsive properties than the junction barrier material for the center junction. The junction barrier material may include type-I multiferroics, type-II multiferroics, a composite multiferroic including layers of magnets and ferroelectrics, or piezoelectric materials. An array of connected bi-SQUID loops may be formed, where the main junctions of each bi-SQUID loop in each row are connected. The electromagnetic-responsive properties of the junction barrier material for center junctions of each bi-SQUID loop may vary by each array column or row. The center/main junctions of each bi-SQUID loop may be connected to an input signal line. | 12-31-2015 |
| 20160093790 | DIAMOND SUBSTRATES FOR SUPERCONDUCTING QUANTUM CIRCUITS - A mechanism relates to a superconducting quantum system. A diamond substrate layer is included. A superconducting quantum device is disposed on the diamond substrate layer. The superconducting quantum device includes a superconducting quantum circuit formed on top a surface of the diamond substrate layer. | 03-31-2016 |
| 20160125310 | APPARATUS AND METHOD FOR QUANTUM PROCESSING - The present disclosure provides a quantum processor realised in a semiconductor material and method to operate the quantum processor to implement adiabatic quantum computation. The quantum processor comprises a plurality of qubit elements disposed in a two-dimensional matrix arrangement. The qubits are implemented using the nuclear or electron spin of phosphorus donor atoms. Further, the processor comprises a control structure with a plurality of control members, each arranged to control a plurality of qubits disposed along a line or a column of the matrix. The control structure is controllable to perform adiabatic quantum error corrected computation. | 05-05-2016 |
| 20160125311 | APPARATUS AND METHOD FOR QUANTUM PROCESSING - The present disclosure provides a quantum processor realised in a semiconductor material and method to operate the quantum processor to implement error corrected quantum computation. The quantum processor comprises a plurality of qubit elements disposed in a two-dimensional matrix arrangement. The qubits are implemented using the nuclear or electron spin of phosphorus donor atoms. Further, the processor comprises a control structure with a plurality of control members, each arranged to control a plurality of qubits disposed along a line or a column of the matrix. The control structure is controllable to perform topological quantum error corrected computation. | 05-05-2016 |
| 20160133819 | Fluorine Containing Low Loss Dielectric Layers for Superconducting Circuits - Provided are superconducting circuits and methods of forming such circuits. A circuit may include a silicon containing low loss dielectric (LLD) layer formed by fluorine passivation of dangling bonds of silicon atoms in the layer. The LLD layer may be formed from silicon nitride or silicon oxide. For uniform passivation (e.g., uniform distribution of fluorine within the LLD layer), fluorine may be introduced while forming the LLD layer. For example, a fluorine containing precursor may be supplied into a deposition chamber together with a silicon containing precursor. Alternatively, the LLD layer may be formed as a stack of many thin sublayers, and each sublayer may be subjected to individual fluorine passivation. For example, low power plasma treatment or annealing in a fluorine containing environment may be used for this purpose. The concentration of fluorine in the LLD layer may be between about 0.5% atomic and 5% atomic. | 05-12-2016 |
| 20160148112 | MULTI-QUBIT COUPLING STRUCTURE - A quantum qubit coupling structure is provided. The quantum qubit coupling structure includes a plurality of qubits and a variable capacitor electrically connected between the plurality of qubits to vary coupling constants of the plurality of qubits. | 05-26-2016 |
| 20160204330 | REMOVAL OF SPURIOUS MICROWAVE MODES VIA FLIP-CHIP CROSSOVER | 07-14-2016 |
| 20160380026 | PLANAR QUBITS HAVING INCREASED COHERENCE TIMES - An interdigitated capacitor includes a substrate and a pair of comb-like electrodes both formed on the semiconductor substrate and horizontally arranged thereon, each of the pair of comb-like electrodes including finger electrodes having a curved profile. | 12-29-2016 |
| 20190147359 | COUPLING ARCHITECTURES FOR SUPERCONDUCTING FLUX QUBITS | 05-16-2019 |
| 20220140221 | TECHNOLOGIES FOR TUNING SUPERCONDUCTING JOSEPHSON JUNCTIONS - Technologies for tuning a resistance of tunnel junctions such as Josephson junctions are disclosed. In the illustrative embodiment, a Josephson junction is heated to 85 Celsius, and an electric field is applied to the Josephson junction. The heat and the electric field cause the resistance of the Josephson junction to increase. Monitoring the Josephson junction during the application of the electric field allows for the resistance of the Josephson junction to be adjusted to a particular value. | 05-05-2022 |
| 257032000 | Particular electrode material | 2 |
| 20090267054 | Apparatus, method and system for reconfigurable circuitry - The present invention relates to reconfigurable circuitry, and more particularly to the reconfiguration of the characteristics of materials used in the formation of electronic circuitry as the result of applied external influences. Exemplary embodiments of the present invention provide an apparatuses, methods, electronic devices and computer program products that include a nanoscale material layer, and a programmable element in close proximity to at least a first section of the nanoscale material layer. The programmable element is configured to produce interference with an electron wave in at least the first section of the nanoscale material layer. | 10-29-2009 |
| 20160104073 | Radiation Suppression of Superconducting Quantum Bits Using a Conductive Plane - This invention relates to a quantum computing device and the means for fabrication thereof. One side of the device includes a circuit containing at least one qubit patterned in a film of superconducting material. The other side of the device includes a conductive plane, also formed from a film of superconducting material. The proximity of the conductive plane suppresses radiative decay of the qubit, while readout is achieved by coupling the qubit to a resonator. | 04-14-2016 |
| 257034000 | Weak link (e.g., narrowed portion of superconductive line) | 1 |
| 20150069331 | REPRODUCIBLE STEP-EDGE JOSEPHSON JUNCTION - An electronic component comprising a Josephson junction and a method for producing the same are proposed. The component comprises a substrate having at least one step edge in the surface thereof and a layer made of a high-temperature superconducting material disposed thereon, wherein this layer, at the step edge, has a grain boundary that forms the one or two weak links of the Josephson junction. On both sides of the step edge, the a and/or b crystal axes in the plane of the high-temperature superconducting layer are oriented perpendicularly to the grain boundary to within a deviation of no more than 10°, as a result of a texturing of the substrate and/or at least one buffer layer disposed between the substrate and the high-temperature superconducting layer. This can be technologically implemented, for example, by growing on the HTS layer by way of graphoepitaxy. By orienting the same crystal axis in each case perpendicularly to the step edge on both sides of the step edge, a maximal supercurrent can flow across the grain boundary induced by the step edge, and consequently across the Josephson junction. | 03-12-2015 |
| 257035000 | Particular barrier material | 2 |
| 20090057652 | Multilayer structure with zirconium-oxide tunnel barriers and applications of same - A multilayer structure with zirconium-oxide tunnel barriers. In one embodiment, the multilayer structure includes a first niobium (Nb) layer, a second niobium (Nb) layer, and a plurality of zirconium-oxide tunnel barriers sandwiched between the first niobium (Nb) layer and the second niobium (Nb) layer, wherein the plurality of zirconium-oxide tunnel barriers is formed with N layers of zirconium-oxide, N being an integer greater than 1, and M layers of zirconium, M being an integer no less than N, such that between any two neighboring layers of zirconium-oxide, a layer of zirconium is sandwiched therebetween. | 03-05-2009 |
| 20180025775 | MEMORY CELL HAVING A MAGNETIC JOSEPHSON JUNCTION DEVICE WITH A DOPED MAGNETIC LAYER | 01-25-2018 |
