| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 029847000 | With selective destruction of conductive paths | 42 |
| 20080263860 | Method for manufacturing printed circuit board having embedded component - A method for manufacturing a printed circuit board having an embedded component is disclosed. The method includes: forming at least one contact bump and at least one electrode bump on one side of a base substrate; mounting the component such that the electrode bump is in correspondence with a contact terminal of the component; stacking an insulation layer, in which an opening is formed in correspondence to the component, on the one side of the base substrate, such that the contact bump penetrates the insulation layer; filling a filler in the opening; and stacking a metal layer on the insulation layer. Using the method, the reliability of circuit connections between the component and the circuit patterns can be improved, and the manufacturing process can be reduced in embedding the component in the printed circuit board. | 10-30-2008 |
| 20080289177 | CIRCUIT BOARD, SEMICONDUCTOR PACKAGE HAVING THE BOARD, AND METHODS OF FABRICATING THE CIRCUIT BOARD AND THE SEMICONDUCTOR PACKAGE - Provided are a circuit board, a semiconductor package including the circuit board, a method of fabricating the circuit board, and a method of fabricating the semiconductor package. The method of fabricating the circuit board includes: forming at least one pair of rows of first bonding pads arranged on a base substrate in a first direction, and a first central plating line formed between the rows of first bonding pads to commonly connect with the rows of first bonding pads; forming an electroplating layer on the first bonding pads; and exposing the base substrate by removing the first central plating line. | 11-27-2008 |
| 20090019692 | METHOD OF CUTTING SIGNAL WIRE PRESERVED ON CIRCUIT BOARD AND CIRCUIT LAYOUT THEREOF - A method of cutting signal wire preserved on circuit board applicable to a circuit layout is provided to reduce signal return loss induced by the preserved wires. The circuit layout has a plurality of preserved wires and a common contact electrically connected to the preserved wires. The cutting method is performed by cutting off one of the preserved wires and disconnecting a break part of the wire from the common contact. | 01-22-2009 |
| 20090025217 | Producing method of wired circuit board - A producing method of a wired circuit board includes preparing a metal supporting board, forming a metal foil on the metal supporting board, forming an insulating layer on the metal foil to expose an unneeded portion of the metal foil, etching the unneeded portion using the insulating layer as an etching resist, and forming a plurality of wires on the insulating layer. | 01-29-2009 |
| 20090056120 | BIOSENSOR AND METHOD OF MAKING - An electrochemical biosensor with electrode elements that possess smooth, high-quality edges. These smooth edges define gaps between electrodes, electrode traces and contact pads. Due to the remarkable edge smoothness achieved with the present invention, the gaps can be quite small, which provides marked advantages in terms of test accuracy, speed and the number of different functionalities that can be packed into a single biosensor. Further, the present invention provides a novel biosensor production method in which entire electrode patterns for the inventive biosensors can be formed all at one, in nanoseconds—without regard to the complexity of the electrode patterns or the amount of conductive material that must be ablated to form them. | 03-05-2009 |
| 20090133254 | Components with posts and pads - A packaged microelectronic element includes connection component incorporating a dielectric layer ( | 05-28-2009 |
| 20090144972 | CIRCUIT BOARD AND PROCESS FOR FABRICATING THE SAME - A process for fabricating a circuit board is provided. In the process, first, a circuit substrate including an insulation layer and at least a pad contacting the insulation layer is provided. Next, a barrier material layer is formed on the circuit substrate. The barrier material layer completely covers the insulation layer and the pad. Then, at least one conductive bump is formed on the barrier material layer. The conductive bump is opposite to the pad, and the material of the barrier material layer is different from the material of the conductive bump. Next, a portion of the barrier material layer is removed by using the conductive bump as a mask, so as to expose the surface of the insulation layer and to form a barrier connected between the conductive bump and the pad. | 06-11-2009 |
| 20090165296 | PATTERNS OF CONDUCTIVE OBJECTS ON A SUBSTRATE AND METHOD OF PRODUCING THEREOF - According to embodiments of the present invention, a method for manufacturing a pattern of conductive elements on a substrate is provided. The method includes coating an aluminum foil laminated onto the substrate with an electrically conductive material, applying an etch-resist material on selective areas pre-designed to carry the conductive objects, chemically etching to remove the aluminum and the electrically conductive material from areas not covered by the etch-resist material that are complementary to the selective areas and removing the etch-resist material. | 07-02-2009 |
| 20090249621 | METHOD FOR MAKING A MINIATURIZED DEVICE IN VOLUME - The invention concerns a method for making a miniaturized device in volume comprising at least one component and its connection integrated in a support matrix. Said matrix is formed by a deposition technique of the direct writing type, which consists in selectively depositing successive layers of material in fluid form. | 10-08-2009 |
| 20100000087 | MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD OF THE MULTILAYER PRINTED WIRING BOARD - This invention provides a multilayer printed wiring board in which electric connectivity and functionality are obtained by improving reliability and particularly, reliability to the drop test can be improved. No corrosion resistant layer is formed on a solder pad | 01-07-2010 |
| 20100005654 | Planarization Methods - Planarization methods for maintaining planar surfaces in the fabrication of such devices as BAW devices and capacitors on a planar or planarized substrate are described. In accordance with the method, a metal layer is deposited and patterned, and an oxide layer is deposited using a high density plasma chemical vapor deposition (HDP CVD) process to a thickness equal to the thickness of the metal layer. The HDP CVD process provides an oxide layer on the patterned metal tapering upward from the edge of the patterned metal layer. Then, after masking and etching the oxide layer from the patterned metal layer, the patterned metal layer and surrounding oxide layer form a substantially planar layer, interrupted by small remaining oxide protrusions at the edges of the patterned layer. These small remaining oxide protrusions may be too small to significantly disturb the flatness of a further oxide or other layer or they may be further mitigated by the application of another HDP CVD oxide film. | 01-14-2010 |
| 20100043223 | Stripline Flex Circuit - The invention removes copper from the concave side of a flex circuit around a bendable region and replaces it with a conductive epoxy to allow it to be formed to tighter bend radii than would otherwise be possible. After the flex circuit is shaped in a tight radius and attached to a mechanical structure, the conductive epoxy is cured to act as functional replacement of the removed copper. | 02-25-2010 |
| 20100101084 | SAME LAYER MICROELECTRONIC CIRCUIT PATTERNING USING HYBRID LASER PROJECTION PATTERNING (LPP) AND SEMI-ADDITIVE PATTERNING(SAP) - In some embodiments, same layer microelectronic circuit patterning using hybrid laser projection patterning (LPP) and semi-additive patterning (SAP) is presented. In this regard, a method is introduced including patterning a first density region of a laminated substrate surface using LPP, patterning a second density region of the laminated substrate surface using SAP, and plating the first and second density regions of the laminated substrate surface, wherein features spanning the first and second density regions are directly coupled. Other embodiments are also disclosed and claimed. | 04-29-2010 |
| 20110030209 | METHOD FOR FABRICATING THIN TOUCH SENSOR PANELS - A method for fabricating thin DITO or SITO touch sensor panels with a thickness less than a minimum thickness tolerance of existing manufacturing equipment. In one embodiment, a sandwich of two thin glass sheets is formed such that the combined thickness of the glass sheets does not drop below the minimum thickness tolerance of existing manufacturing equipment when thin film process is performed on the surfaces of the sandwich during fabrication. The sandwich may eventually be separated to form two thin SITO/DITO panels. In another embodiment, the fabrication process involves laminating two patterned thick substrates, each having at least the minimum thickness tolerance of existing manufacturing equipment. One or both of the sides of the laminated substrates are then thinned so that when the substrates are separated, each is a thin DITO/SITO panel having a thickness less than the minimum thickness tolerance of existing manufacturing equipment. | 02-10-2011 |
| 20110162203 | MULTI-LAYER GROUND PLANE STRUCTURES FOR INTEGRATED LEAD SUSPENSIONS - Multi-layer ground plane structures and methods of manufacture for integrated lead suspension flexures. A flexure in accordance with one embodiment of the invention includes an insulating layer, a plurality of traces on the insulating layer and a stainless steel base layer on the side of the insulating layer opposite the traces. The stainless steel base layer includes one or more void portions with voids in the base layer opposite the insulating layer from the traces and one or more backed portions with the base layer backing the traces. A plurality of patterned and transversely-spaced first conductive ground planes are located opposite the insulating layer from the traces at the void portions and backed portions of the stainless steel base layer. A continuous gold second conductive ground plane is located opposite the insulating layer and the first ground planes from the side of the insulating layer adjacent to the traces at the void portions and backed portions of the stainless steel base layer. The gold ground plane can be used as an etch stop during formation of the voids in the base layer. | 07-07-2011 |
| 20110209343 | THREE-AXIS ACCELEROMETERS AND FABRICATION METHODS - Disclosed are MEMS accelerometers and methods for fabricating same. An exemplary accelerometer comprises a substrate, and a proof mass that is a portion of the substrate and which is separated from the substrate surrounding it by a gap. An electrically-conductive anchor is coupled to the proof mass, and a plurality of electrically-conductive suspension anus that are separated from the proof mass extend from the anchor and are coupled to the substrate surrounding the proof mass. A plurality of sense and actuation electrodes are separated from the proof mass by gaps and are coupled to processing electronics. Capacitive sensing is used to derive electrical signals caused by forces exerted on the proof mass, and the electrical signals are processed by the processing electronics to produce x-, y- and z-direction acceleration data. Electrostatic actuation is used to induce movements of the mass for force balance operation, or self-test and self-calibration. The fabrication methods use deep reactive ion etch bulk micromachining and surface micromachining to form the proof mass, suspension arms and electrodes. The anchor, suspension arms and electrodes are made in the same process steps from the same electrically conductive material, which is different from the substrate material. | 09-01-2011 |
| 20110302778 | COMPOSITIONS AND METHODS FOR CREATING ELECTRONIC CIRCUITRY - The present invention is directed to non-lithographic patterning by laser (or similar-type energy beam) ablation, where the ablation system ultimately results in circuitry features that are relative free from debris induced over-plating defects (debris relating to the ablation process) and fully additive plating induced over-plating defects. Compositions of the invention include a circuit board precursor having an insulating substrate and a cover layer. The insulating substrate is made from a dielectric material and also a metal oxide activatable filler. The cover layer can be sacrificial or non-sacrificial and is used to remediate unwanted debris arising from the ablation process. | 12-15-2011 |
| 20120005894 | Method of manufacturing multilayered printed circuit board - A method of manufacturing a multilayered circuit board, including: providing a double-sided copper clad laminate including via holes formed therethrough and openings for forming circuit patterns, formed by patterning copper foil formed on one side thereof; filling the via holes and the openings with conductive paste; removing the copper foil from the double-sided copper clad laminate to form a first circuit layer including circuit patterns on one side thereof and to form a second circuit layer including connecting pads for attaching solder balls thereto on the other side thereof; forming a build-up layer on the first circuit layer, the build-up layer including a plurality of insulating layers and a plurality of circuit layers; and forming a solder resist layer on an outermost layer of the build-up layer. | 01-12-2012 |
| 20120060366 | METHOD FOR DETERMINING WIRING PATHWAY OF WIRING BOARD AND METHOD FOR DETERMINING WIRING PATHWAY OF SEMICONDUCTOR DEVICE - In an embodiment of the invention, a wiring pathway determining method includes: tracing continuously a first wiring forming grid to extend an additional wiring line from a starting point to one first already-selected intersection selected from plural first intersections; computing a first via allocatable region where an additional via can be allocated on a first wiring layer and a second via allocatable region where the additional via can be allocated on a second wiring layer based on positions of an already-designed wiring line and an already-designed via; allocating the additional via, in which a first already-selected intersection is included in an arbitrary position in a region of a lower surface, such that the lower surface is included in the first via allocatable region and such that an upper surface is included in a second via allocatable region; and tracing continuously a second wiring forming grid to extend the additional wiring line from the additional via to an ending point. | 03-15-2012 |
| 20120096710 | CONDUCTIVE SUBSTRATE STRUCTURE WITH CONDUCTIVE CHANNELS FORMED BY USING A TWO-SIDED CUT APPROACH AND A METHOD FOR MANUFACTURING THE SAME - A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers. | 04-26-2012 |
| 20120102732 | METHOD OF MANUFACTURING MULTILAYER WIRING SUBSTRATE - A method of manufacturing a multilayer wiring substrate is provided. A foil of a metal-foil-clad resin insulation material is brought into contact with a foil of a metal-foil-clad support substrate. A peripheral edge portion of the resin insulation material exposed as a result of removal of a peripheral edge portion of the foil is adhered to the foil of the support substrate. A plurality of conductor layers and a plurality of resin insulation layers are laminated so as to obtain a laminate structure having a wiring laminate portion, which is to become the multilayer wiring substrate. The laminate structure is cut along a boundary between the wiring laminate portion and a surrounding portion, and the surrounding portion is removed. The wiring laminate portion is separated from the support substrate along the boundary between the two foils. | 05-03-2012 |
| 20120110843 | PRINTED ELECTRONIC CIRCUIT BOARDS AND OTHER ARTICLES HAVING PATTERNED CONDUCTIVE IMAGES - The present invention provides an article of manufacture using an electrophotographic printer to produce printed electronic circuits by printing a second conductive powder layer and a first thermoplastic layer in registration. The second conductive powder layer is permanently fixed to the first layer before removing conductive powder from portions of the substrate other than that coated with the thermoplastic patterned image. | 05-10-2012 |
| 20120151764 | METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD - A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the resists, and forming a wiring having a pad and a conductive circuit thinner than the pad by removing the metal film exposed through the removing of the plating resist, a solder-resist layer on the surface of the board and wiring, in the layer an opening exposing the pad and a portion of the circuit contiguous to the pad, a solder film on the pad and portion of the circuit exposed through the opening, and a solder bump on the pad by solder reflow. | 06-21-2012 |
| 20120180313 | MANUFACTURING METHOD FOR PRINTED WIRING BOARD - A manufacturing method for a printed wiring board includes forming an electroless plated film on an interlayer resin insulation layer, forming on the electroless plated film a plating resist with an opening to expose a portion of the electroless plated film, forming an electrolytic plated film on the portion of the electroless plated film exposed through the opening, removing the plating resist using a resist-removing solution containing an amine, reducing a thickness of a portion of the electroless plated film existing between adjacent portions of the electrolytic plated film by using the resist-removing solution, and forming a conductive pattern by removing the portion of the electroless plated film existing between the adjacent portions of the electrolytic plated film by using an etchant. | 07-19-2012 |
| 20120192416 | Flexible Circuit Electrode Array - A flexible circuit electrode array with more than one layer of metal traces comprising: a polymer base layer; more than one layer of metal traces, separated by polymer layers, deposited on said polymer base layer, including electrodes suitable to stimulate neural tissue; and a polymer top layer deposited on said polymer base layer and said metal traces. Polymer materials are useful as electrode array bodies for neural stimulation. They are particularly useful for retinal stimulation to create artificial vision, cochlear stimulation to create artificial hearing, or cortical stimulation many purposes. The pressure applied against the retina, or other neural tissue, by an electrode array is critical. Too little pressure causes increased electrical resistance, along with electric field dispersion. Too much pressure may block blood flow. | 08-02-2012 |
| 20120204421 | TEST POINT DESIGN FOR A HIGH SPEED BUS - A test point design comprising: a circuit board comprising a plurality of layers including a power plane and a ground plane, the circuit board further comprises a differential pair of signal lines including a first signal line and a second signal line; and a pair of test point pads including a first test point pad connected to the first signal line and a second test point pad connected to the second signal line, wherein a first portion of the power plane and a first portion of the ground plane below the first test point pad are removed and a second portion of the power plane and a second portion of the ground plane below the second test point pad are removed. | 08-16-2012 |
| 20120227260 | RADIATION DETECTOR USING GAS AMPLIFICATION AND METHOD FOR MANUFACTURING THE SAME - A radiation detector using gas amplification includes: a first electrode pattern which is formed on a first surface of an insulating member and has a plurality of circular openings; and a second electrode pattern which is formed on a second surface of the insulating member opposite to the first surface thereof and has convex portions of which respective forefronts are exposed to centers of the openings of the first electrode pattern; wherein a predetermined electric potential is set between the first electrode pattern and the second electrode pattern; wherein edges of the first electrode pattern exposing to the openings are shaped in respective continuous first curved surfaces by covering the edges thereof with a first solder material. | 09-13-2012 |
| 20130097856 | METHOD OF FABRICATING A WIRING BOARD - A method of fabricating a wiring board includes forming a surface plating layer on a support member, and forming an external connecting pad on the surface plating layer formed on the support member such that an area of the external connecting pad formed on the surface plating layer is smaller than an area of the surface plating layer. The method also includes forming an insulating layer and a wiring layer on a surface of the support member where the external connecting pad is formed, and removing the support member. | 04-25-2013 |
| 20130212877 | MANUFACTURING METHOD OF CIRCUIT BOARD - A manufacturing method of a circuit board is provided. Providing a substrate, where a first laser resistant structure is disposed on a first dielectric layer and at the periphery of a pre-removing area, a second dielectric layer covers the first laser resistant structure, a circuit layer is disposed on the second dielectric layer, a second laser resistant structure is disposed on the second dielectric layer and at the periphery of the pre-removing area, a third dielectric layer covers the circuit layer and the second laser resistant structure. There are gaps between the second laser resistant structure and the circuit layer, and the vertical projection of the gaps on the first dielectric layer overlaps the first laser resistant structure. A laser machining process is performed to etch the third dielectric layer at the periphery of the pre-removing area. The portion of the third dielectric layer within the pre-removing area is removed. | 08-22-2013 |
| 20130305530 | WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board having an insulation layer, and a buildup structure formed on the insulation layer and including insulation layers. The insulation layer and the buildup structure form a board structure in which a cavity portion having an opening on a surface of the buildup structure on the opposite side of the insulation layer is formed. The cavity portion is extending through one or more of the insulation layers in the buildup structure and has a groove portion formed on the bottom surface of the cavity portion along a wall surface of the cavity portion. The board structure composed of the insulation layer and the buildup structure has a pad formed on the bottom surface of the cavity portion in a position farther from the wall surface of the cavity portion than the groove portion. | 11-21-2013 |
| 20140082937 | METHOD OF MANUFACTURING RIGID FLEXIBLE PRINTED CIRCUIT BOARD - Disclosed herein is a method of manufacturing a rigid flexible printed circuit board, including: preparing a flexible substrate having an inner layer circuit pattern formed on one surface or both surfaces thereof and divided into a rigid region and a flexible region; forming a protective layer in the flexible region of the flexible substrate; forming a coverlay so as to expose the protective layer on one surface of the flexible substrate; stacking a rigid insulating layer in the rigid region and stacking a metal layer in the protective layer and the rigid insulating layer; forming an outer layer circuit layer by patterning the metal layer and removing the metal layer in the flexible region; and removing the protective layer. | 03-27-2014 |
| 20140115888 | METHOD OF MANUFACTURING A CHIP SUPPORT BOARD STRUCTURE - A method of manufacturing a chip support board structure which includes the steps of forming a metal substrate structure, forming a photo resist pattern, etching the metal substrate structure to form a paddle, removing the photo resist pattern, pressing an insulation layer against the paddle, polishing the insulation layer, forming a circuit layer and forming a solder resist is disclosed. The metal substrate structure is formed by sandwiching a block layer with two metal substrate layers, multilayer. The metal substrate structure is etched under control to an effective depth such that each paddle thus formed has the same shape and depth. Therefore, the method of the present invention can be widely applied to the general mass production processes to effectively solve the problems in the prior arts due to depth differences, such offset, position mismatch and peeling off in the chip support board. | 05-01-2014 |
| 20140182126 | METHOD FOR MANUFACTURING WIRING BOARD - A method for manufacturing a wiring board according to the present invention includes the steps of preparing a supporting substrate having a product forming region and a marginal region; preparing a separable metal foil whose area is larger than that of the product forming region and is smaller than that of the supporting substrate; fixing the separable metal foil to the supporting substrate by burying into the supporting substrate; forming a build-up section on the buried separable metal foil; integrally cutting out the supporting substrate, the separable metal foil and the build-up section; obtaining a laminated body for wiring board composed of the second metal foil and the build-up section by separating the first metal foil and the second metal foil; and forming the wiring conductor layer by removing a part of the second metal foil. | 07-03-2014 |
| 20140259658 | METHOD OF CUTTING CONDUCTIVE PATTERNS - A method includes patterning a layer over a substrate with a first metal pattern; using a cut mask in a first position relative to the substrate to perform a first cut patterning for removing material from a first region within the first pattern; and using the same cut mask to perform a second cut patterning while in a second position relative to the same layer over the substrate, for removing material from a second region in a second metal pattern of the same layer over the substrate. | 09-18-2014 |
| 20140331493 | METHOD OF FABRICATING A PACKAGE SUBSTRATE - A method of fabricating a package substrate includes: preparing a base substrate; forming a metal material layer surrounding an entire surface of the base substrate; forming sacrificial patterns on partial regions of the base substrate on which the metal material layer is formed; forming pads contacting lateral surfaces of the sacrificial patterns; forming a gold plating layer on upper surfaces of the pads; and removing the sacrificial patterns and removing portions of the metal material layer to form a conductive layer that remains on partial regions so as to contact lower surfaces of the pads. | 11-13-2014 |
| 20140331494 | Method for the Production of a Circuit Board involving the Removal of a Subregion thereof, and Use of such a Method - The invention relates to a method for producing a circuit board ( | 11-13-2014 |
| 20140373350 | Method for the Production of a Circuit Board Involving the Removal of a Subregion thereof, and Use of such a Method - The invention relates to a method for producing a circuit board involving the removal of a subregion thereof. In said method, at least two layers or plies of the circuit board ( | 12-25-2014 |
| 20150033557 | SYSTEM AND METHOD FOR PRODUCING A CONDUCTIVE PATH ON A SUBSTRATE - A method of producing a conductive path on a substrate including depositing on the substrate a layer of material having a thickness in the range of 0.1 to 5 microns, including metal particles having a diameter in the range of 10 to 100 nanometers, employing a patterning laser beam to selectably sinter regions of the layer of material, thereby causing the metal particles to together define a conductor at sintered regions and employing an ablating laser beam, below a threshold at which the sintered regions would be ablated, to ablate portions of the layer of material other than at the sintered regions. | 02-05-2015 |
| 20150040392 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME - A PCB includes a base layer, a wiring pattern formed on a surface of the base layer, and a protecting layer formed on the wiring pattern. The protecting layer is formed by printing and solidifying an ink on the wiring pattern. The ink includes a cycloaliphatic epoxy resin, a phenoxyl resin solution, a solvent, a hardener, and an antifoaming agent. | 02-12-2015 |
| 20150351220 | MAKING Z-FOLD MICRO-WIRE SUBSTRATE STRUCTURE - A method of making a folded micro-wire substrate structure includes providing a flexible substrate and first, second, and third portions. One or more electrical conductors are formed on or in the flexible substrate. The flexible substrate is folded with a first fold between the first and second portions so that the first portion is located adjacent to the second portion in a perpendicular direction. The flexible substrate is folded with at least a second fold between the second and third portions so that the second side is between the second portion and the third portion in the perpendicular direction. The folded flexible substrate is secured to form the folded micro-wire substrate structure. | 12-03-2015 |
| 20150366068 | TOUCH PANEL AND ITS MANUFACTURING METHOD - The present disclosure relates to the field of touch technology, and provides a touch panel and its manufacturing method. In the touch panel, a transparent conductive layer is partitioned by a height difference structure into first electrodes, an array of second electrode components and filling blocks. The array of second electrode components is connected serially by an array of conductive bridging lines so as to form several columns of second electrodes. A layout process for the transparent conductive layer will be omitted, and as a result, it is able to reduce the process steps and the production cost. In addition, the transparent conductive layer covers the entire base substrate, and as a result, it is able to improve the evenness of the transmittance and reflectance of the entire touch panel, thereby to improve the evenness of the image display. | 12-17-2015 |
| 20160192503 | METHOD FOR PRODUCING CERAMIC CIRCUIT BOARD - A method for producing a ceramic circuit board comprising the steps of bonding a metal sheet to a ceramic substrate via a brazing material containing Ag to form a bonded body; etching the bonded metal sheet to form a circuit pattern; and removing an unnecessary brazing material from the substrate provided with the circuit pattern, by etching with an acidic solution comprising carboxylic acid and/or carboxylate and hydrogen peroxide. | 06-30-2016 |
