PEREGRINE SEMICONDUCTOR CORPORATION Patent applications |
Patent application number | Title | Published |
20150280655 | Hot Carrier Injection Compensation - Methods and devices are described for compensating an effect of aging due to, for example, hot carrier injection, or other device degradation mechanisms affecting a current flow, in an RF amplifier. In one case a replica circuit is used to sense the aging of the RF amplifier and adjust a biasing of the RF amplifier accordingly. | 10-01-2015 |
20150249479 | RF Switch with Integrated Tuning - Methods and devices are described for reducing receiver complexity in an RF front-end stage. In one exemplary implementation, a switch is used to connect a plurality of receive paths to a single input amplifier of a transceiver unit used the RF front-end stage. In another exemplary implementation, the switch has a tunable network which can be tuned with respect to various frequencies of operation of the receive path and associated RF signal. | 09-03-2015 |
20150243548 | Control of FET Back-Channel Interface Characteristics - A method and structure for control of FET back-channel interface characteristics of an integrated circuit by implanting of selected implantation species at or near a device interface accessible during manufacture of the integrated circuit using layer transfer technology, without adversely affecting the structure or characteristics of a principal front-side FET. | 08-27-2015 |
20150236798 | Methods for Increasing RF Throughput Via Usage of Tunable Filters - Methods and devices are described for increasing RF throughput in a multiple RF paths RF transmit/receive system with a plurality RF transmit/receive systems. In one case a tunable notch filter is used to reduce channel interference between the plurality of RF transmit/receive systems. | 08-20-2015 |
20150236748 | Devices and Methods for Duplexer Loss Reduction - Methods and devices are described for reducing transmit RF signal loss in a bi-directional RF transmit/receive system with a duplexer circuit. In one case a filter in a transmit path is used such as to reduce amplified noise in a receive frequency band. | 08-20-2015 |
20150235971 | Integrated Tunable Filter Architecture - An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated. | 08-20-2015 |
20150222260 | Reduced Generation of Second Harmonics of FETs - A structure and method for reducing second-order harmonic distortion in FET devices used in applications that are sensitive to such distortion, such as switching RF signals. The asymmetry of the drain-to-body capacitance Cdb and source-to-body capacitance Csb of a FET device are equalized by adding offsetting capacitance or a compensating voltage source. | 08-06-2015 |
20150162949 | Independent Control of Branch FETs for RF Performance Improvement - A FET-based RF switch architecture and method that provides for independent control of FETs within component branches of a switching circuit. With independent control of branch FETs, every RF FET in an inactive branch that is in an “open” (capacitive) state can be shunted to RF ground and thus mitigate impedance mismatch effects. Providing a sufficiently low impedance to RF ground diminishes such negative effects and reduces the sensitivity of the switch circuit to non-matched impedances. | 06-11-2015 |
20150137913 | Segmented Attenuator with Glitch Reduction - A method and circuit for significantly reducing the switching transients of a digital step attenuator (DSA) by employing a segmented architecture that combines thermometer and binary coded stages. This approach reduces the number of attenuator stages switching at the same time and thus minimizes any glitch amplitude. Embodiments of a segmented DSA may be realized with “pi” and “bridged-T” attenuators, as well as with simple tuned L-pad attenuators combined in a resistor ladder network. | 05-21-2015 |
20150137890 | Devices and Methods for Improving Yield of Scalable Periphery Amplifiers - Device and methods for improving consistency of operation and therefore yield of sealable periphery amplifiers is described, Amplifier size of the scalable periphery architecture can be adjusted to obtain part-to-part consistency of operating performance as per a defined/desired set of criteria. Amplifier segments of the scalable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers. | 05-21-2015 |
20150137889 | Devices and Methods for Increasing Reliability of Scalable Periphery Amplifiers - Devices and methods for improving reliability of sealable periphery amplifiers is described. Amplifier segments of the sealable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers. | 05-21-2015 |
20150137845 | Methods and Devices for Testing Segmented Electronic Assemblies - Methods and devices are disclosed for testing an electronic assembly comprising a number of segments. In one embodiment, a scalable periphery amplifier may comprise a number of amplifier segments. In one embodiment a method of testing the amplifier segments in a scalable periphery architecture is described. One or more of the amplifier segments can be independently turned on and/or turned off to achieve desired impedance characteristics of the overall amplifier to test the scalable periphery amplifier. In another embodiment, the electronic assembly comprises digitally tunable capacitors. | 05-21-2015 |
20150097624 | Load Compensation in RF Amplifiers - Methods and systems for reducing parasitic loading on a power supply output in RF amplifier arrangements used in multiband and/or multitude RF circuits are presented. Such RF circuits can comprise a plurality of RF amplifiers of which only one is activated for a given desired transmission mode and/or band. | 04-09-2015 |
20150097620 | Resonant Pre-Driver for Switching Amplifier - An arrangement and a method for improving the efficiency of a multistage switching amplifier using a resonant circuit element is presented. The multistage amplifier comprises a pre-diver amplifier, a final stage amplifier and a series L-C arrangement coupled between the pre-driver amplifier and the final stage amplifier. The series L-C arrangement forms a parallel L-C resonant circuit with a gate to source capacitor of an input transistor of the final stage amplifier. An oscillation of energy takes place between the gate to source capacitor of the input transistor of the final stage amplifier and the series L-C arrangement. This oscillation of energy provides the final stage amplifier with driving current and improves efficiency of the overall multistage amplifier arrangement. | 04-09-2015 |
20150091776 | Antenna Transmit Receive Switch - An antenna switch is presented. The antenna switch can connect an antenna to either transmit circuitry or receive circuitry, depending on control signals applied to the antenna switch while presenting different impedances to a connected circuitry. | 04-02-2015 |
20150091657 | Methods and Devices for Thermal Control in Power Amplifier Circuits - Methods of turning on and/or turning off amplifier segments in a scalable periphery amplifier architecture are described in the present disclosure. The turning on and/or turning off the amplifier segments according to the various embodiments of the present can reduce spectral splatter in adjacent channels. In some embodiments, amplifier performance and efficiency can be improved by dissipating heat more uniformly. | 04-02-2015 |
20150091656 | Methods and Devices for Impedance Matching in Power Amplifier Circuits - Methods of turning on and/or turning off amplifier segments in a scalable periphery amplifier architecture are described in the present disclosure. The turning on and/or turning off the amplifier segments according to the various embodiments of the present can reduce spectral splatter in adjacent channels. In some embodiments, amplifier performance and efficiency can be improved by dissipating heat more uniformly. | 04-02-2015 |
20150091650 | Amplifier with Variable Feedback Impedance - A variable feedback impedance is presented capable of providing high linearity (e.g. as represented by 1P2 and 1P3) and high linear range (e.g. as represented by P1dB) when used in a feedback path of an RF amplifier in the presence of high voltage amplitudes. | 04-02-2015 |
20150048896 | System and Method for Tuning an RF Circuit - A tuning system connected to a tunable RF circuit is described. The tuning system obtains an output of a sensing circuit and processes the output in the control circuit in order to tune one or more passive components in the tunable RF circuit. A related method is also described. | 02-19-2015 |
20150042406 | Peak-to-Average Ratio Detector - An amplifier circuit with a peak-to-average ratio detector is described. Detection of the peak-to-average ratio value can be used to tune one or more parameters that affect linearity of one or more amplifiers in the amplifier circuit to improve amplifier performance. | 02-12-2015 |
20150035593 | Input Power Detecting Arrangement and Method - An amplifier circuit with an input power detector and a related method are described. With the input power detector and related control network, the arrangement enables and/or disables a number of unit cells in power amplifiers. | 02-05-2015 |
20150028953 | Scalable Periphery for Digital Power Control - A scalable periphery digital power control arrangement is presented. The scalable periphery digital power control arrangement comprises a plurality of PMOS transistors connected in parallel, where the plurality of transistors is operatively coupled to a voltage source. The plurality of PMOS transistors that is operatively coupled to the voltage source can operate as a controlled current source. Current flow from the voltage source can be controlled by a logic circuit, which sends a logic signal to enable or disable each individual PMOS transistor of the plurality of PMOS transistors connected in parallel. As more PMOS transistors are enabled, the current flow through the scalable periphery digital power control arrangement to the amplifier can increase. | 01-29-2015 |
20150028945 | Methods and Devices for Improving Power Amplifier Efficiency - Devices and methods to reduce adjacent channel power of an amplifier are described. The adjacent channel power can be reduced by considering the third harmonic output from the amplifier, and minimizing such third harmonic amplitude by implementing a phase shifter feedback circuit to the amplifier. The phase shifter feedback circuit can shift the phase of the feedback signal in order to reduce the third harmonic amplitude, which in turn reduces the adjacent channel power. | 01-29-2015 |
20150015321 | Circuit and Method for Controlling Charge Injection in Radio Frequency Switches - A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated. | 01-15-2015 |
20140361827 | High Voltage Ring Pump with Inverter Stages and Voltage Boosting Stages - A multi-stage device for boosting an input voltage is discussed. Each stage of the device comprises a stage of a ring oscillator and a charge pump. An oscillating signal, generated by the ring oscillator within the device, drives the charge pump in each stage of the device. The charge pumps of the stages are serially connected. A final stage of the multi-stage device is adapted to provide voltage to a load circuit. The multi-stage device is applicable for generation of different bias voltages from one or more source voltages. | 12-11-2014 |
20140340173 | Method, System, and Apparatus for Resonator Circuits and Modulating Resonators - Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed. | 11-20-2014 |
20140312958 | Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements When Connected Between Terminals - Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack. | 10-23-2014 |
20140312957 | Devices and Methods for Improving Voltage Handling and/or Bi-Directionality of Stacks of Elements When Connected Between Terminals - Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals are described. Such devices and method include use of symmetrical compensation capacitances, symmetrical series capacitors, or symmetrical sizing of the elements of the stack. | 10-23-2014 |
20140312422 | Method and Apparatus for use in Improving Linearity of MOSFETs using an Accumulated Charge Sink-Harmonic Wrinkle Reduction - A method and apparatus for use in improving linearity sensitivity of MOSFET devices having an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to address degradation in second- and third-order intermodulation harmonic distortion at a desired range of operating voltage in devices employing an accumulated charge sink. | 10-23-2014 |
20140306767 | Integrated RF Front End with Stacked Transistor Switch - A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits. | 10-16-2014 |
20140292398 | Systems and Methods for Generation of Internal Chip Supply Bias from High Voltage Control Line Inputs - Systems and methods for generating internal chip supply bias from high voltage control line inputs are presented. One of a plurality of the high voltage control lines is selected and accordingly internal path switching circuitry is enabled to pass the selected high voltage control line while protecting the associated components from over-stress. | 10-02-2014 |
20140292086 | Dual Supply Override - A monolithically integrated circuit with one or more supply overrides without need of an override control pin to the IC is presented. The internal circuitry to control such an override is presented and various override conditions are also presented. | 10-02-2014 |
20140266460 | Scalable Periphery Tunable Matching Power Amplifier - A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes. | 09-18-2014 |
20140266455 | VARIABLE IMPEDANCE MATCH AND VARIABLE HARMONIC TERMINATIONS FOR DIFFERENT MODES AND FREQUENCY BANDS - An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network. | 09-18-2014 |
20140266433 | Systems and Methods for Optimizing Amplifier Operations - Methods and systems for optimizing amplifier operations are described. The described methods and systems particularly describe a feed-forward control circuit that may also be used as a feed-back control circuit in certain applications. The feed-forward control circuit provides a control signal that may be used to configure an amplifier in a variety of ways. | 09-18-2014 |
20140266383 | Self-Activating Adjustable Power Limiter - A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE | 09-18-2014 |
20140264625 | Merged Active Devices on a Common Substrate - Merged active devices on a common substrate are presented. Methods for operating and fabricating such merged active devices are also presented. | 09-18-2014 |
20140184337 | Control Systems and Methods for Power Amplifiers Operating in Envelope Tracking Mode - Control systems and methods for power amplifiers operating in envelope tracking mode are presented. A set of corresponding functions and modules are described and various possible system configurations using such functions and modules are presented. | 07-03-2014 |
20140184336 | Amplifier Dynamic Bias Adjustment for Envelope Tracking - An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | 07-03-2014 |
20140184335 | Amplifiers Operating in Envelope Tracking Mode or Non-Envelope Tracking Mode - Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode. | 07-03-2014 |
20140184334 | Optimization Methods for Amplifier with Variable Supply Power - Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region). | 07-03-2014 |
20140179374 | Switch Circuit and Method of Switching Radio Frequency Signals - An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. | 06-26-2014 |
20140179249 | INTEGRATED RF FRONT END WITH STACKED TRANSISTOR SWITCH - A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits. | 06-26-2014 |
20140171010 | Semiconductor Devices with Switchable Ground-Body Connection - Semiconductor devices with switchable connection between body and a ground node are presented. Methods for operating and fabricating such semiconductor devices are also presented. | 06-19-2014 |
20140167834 | Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge - A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body. | 06-19-2014 |
20140165385 | Tuning Capacitance to Enhance FET Stack Voltage Withstand - An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero. | 06-19-2014 |
20140151704 | Method, System, and Apparatus for Preparing Substrates and Bonding Semiconductor Layers to Substrates - Embodiments of preparing substrates for subsequent bonding with semiconductor layer are described herein. A substrate may be prepared with one or more chemicals or a sacrificial layer to limit or remove substrate contaminants and reduce substrate surface damage. Other embodiments may be described and claimed. | 06-05-2014 |
20140055194 | Low Noise Charge Pump Method and Apparatus - A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures. | 02-27-2014 |
20140044216 | Method, System, and Apparatus for RF Switching Amplifier - Embodiments of RF switching amplifiers are described generally herein. Other embodiments may be described and claimed. | 02-13-2014 |
20140022016 | Amplifiers and Related Biasing Methods and Devices - Biasing methods and devices for amplifiers are described. The described methods generate bias voltages proportional to the amplifier output voltage to control stress voltages across transistors used within the amplifier. | 01-23-2014 |
20130241624 | Dual Path Level Shifter - Dual path level shifter methods and devices are described. The described level shifter devices can comprise voltage-to-current and current-to-voltage converters. | 09-19-2013 |
20110002080 | METHOD AND APPARATUS FOR USE IN DIGITALLY TUNING A CAPACITOR IN AN INTEGRATED CIRCUIT DEVICE - A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an FW+ terminal and the second terminal comprises an RF terminal. In accordance with some embodiments, the DTCs comprises a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second FW terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB. | 01-06-2011 |
20080230837 | RADIATION-HARDENED SILICON-ON-INSULATOR CMOS DEVICE, AND METHOD OF MAKING THE SAME - A silicon-on-insulator metal oxide semiconductor device comprising ultrathin silicon-on-sapphire substrate; at least one P-channel MOS transistor formed in the ultrathin silicon layer; and N-type impurity implanted within the ultrathin silicon layer and the sapphire substrate such that peak N-type impurity concentration in the sapphire layer is greater than peak impurity concentration in the ultrathin silicon layer. | 09-25-2008 |