Nordic Semiconductor ASA Patent applications |
Patent application number | Title | Published |
20160128126 | DIGITAL RADIO COMMUNICATION - A method of digital radio communication between a first device ( | 05-05-2016 |
20160128117 | DIGITAL RADIO COMMUNICATION - A method of digital radio communication between a first device ( | 05-05-2016 |
20160072652 | DIGITAL RADIO TRANSMISSIONS - A digital radio receiver adapted to receive radio signals modulated using continuous phase frequency shift keying, CPFSK. The receiver comprises means for receiving a radio signal ( | 03-10-2016 |
20150349919 | RADIO DATA PACKETS - Radio transmission apparatus is configured to transmit binary message data in variable-length radio data packets. Each data packet comprises (i) a variable-length data unit and (ii) an error-detecting code for the data unit. The length of the error-detecting code varies between data packets according to a property of each data packet, such as the length of the data unit of the data packet, or a field in the data packet that specifies the length of the error-detecting code. | 12-03-2015 |
20150339179 | CONTROL OF MICROPROCESSORS - A microprocessor comprises a timer capable of resetting the device and a plurality of hardware registers ( | 11-26-2015 |
20150338452 | MICROCONTROLLER ANALYSIS TOOLS - A device for analyzing the behaviour of a microcontroller comprising a microcontroller integrated circuit ( | 11-26-2015 |
20150304647 | stereoscopic viewing apparatus and display synchronization - A stereoscopic viewing apparatus ( | 10-22-2015 |
20150295682 | STREAMED RADIO COMMUNICATION WITH ARQ AND SELECTIVE RETRANSMISSION OF PACKETS IN BURSTS - A system for streaming data packets, comprises a source device ( | 10-15-2015 |
20150207515 | Low-Power Oscillator - An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency. | 07-23-2015 |
20150193357 | CONTROL OF SEMICONDUCTOR DEVICES - A microcontroller device comprises at least one processor ( | 07-09-2015 |
20150186113 | DATA TRANSFER BETWEEN CLOCK DOMAINS - An arrangement for transferring a data signal (data_a) from a first clock domain ( | 07-02-2015 |
20150177776 | DATA TRANSFER BETWEEN CLOCK DOMAINS | 06-25-2015 |
20150163023 | RADIO FREQUENCY COMMUNICATION - A method of characterising a radio frequency traffic channel comprising a transmitter and a receiver is disclosed. The method comprises:
| 06-11-2015 |
20150139373 | DATA TRANSFER BETWEEN CLOCK DOMAINS - An arrangement for transferring a data signal from a first clock domain (bus_slow) to a second clock domain (bus_fast) in a digital system. The first clock domain (bus_slow) has a first clock (ck slow) with a frequency less than a frequency of a second clock (ck fast) in the second clock domain (bus_fast). The arrangement is configured to transfer the data signal from the first clock domain (bus_slow) to the second clock domain (bus_fast), detect whether a predetermined transition occurs in the first clock (ck slow) within a predetermined period of time, using detecting means ( | 05-21-2015 |
20150109978 | RADIO COMMUNICATION SYSTEM - A radio communication system comprises a radio transmitter ( | 04-23-2015 |
20150079907 | WIRELESS DATA COMMUNICATION BETWEEN A MASTER DEVICE AND A SLAVE DEVICE - A method of wireless communication between a master device and a slave device is disclosed. The method comprises:
| 03-19-2015 |
20150035571 | WAVEFORM GENERATION - A predetermined waveform is generated using a lower frequency clock signal ( | 02-05-2015 |
20150022382 | INPUT DECODER - An interface controller (2) is operated to give one of a plurality of predetermined outputs. An input signal (211) is received and a duration of said input signal is compared with a first and/or second threshold duration. A first output is generated if said input signal duration is shorter than said first threshold duration. A second output is generated if said input signal duration is longer than said first threshold duration but shorter than said second threshold duration. A third output is generated if said input signal duration is longer than said second threshold duration. | 01-22-2015 |
20150022252 | DIGITAL CIRCUITS - A digital circuit portion comprises a flip-flop ( | 01-22-2015 |
20140334573 | DIGITAL RADIOS - A digital radio receiver comprises:
| 11-13-2014 |
20140304439 | PERIPHERAL COMMUNICATION - Peripherals ( | 10-09-2014 |
20140294042 | SEMICONDUCTOR TEMPERATURE SENSORS - A temperature sensing device for an integrated circuit comprises an oscillator ( | 10-02-2014 |
20140191891 | ANALOGUE-TO-DIGITAL CONVERTER - An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input. | 07-10-2014 |
20140180662 | RADIO FREQUENCY COMMUNICATION SIMULATION - A computer software tool comprises a simulated radio frequency transmitter device ( | 06-26-2014 |
20140176202 | INTEGRATED POWER-ON-RESET CIRCUIT - An integrated power-on reset circuit comprises a resistor and a capacitor, wherein the resistor is arranged to pass a current by quantum tunneling in order to charge the capacitor. | 06-26-2014 |
20140143461 | SERIAL INTERFACE - A serial interface comprises a clock line, a request line, a ready line, a master-to-slave data line, and a slave-to-master data line. A master device transmits a clock signal to a slave device over the clock line. In a first transaction, the master device sends a master transmission request signal to the slave device over the request line; in response, the slave device sends a slave transmission accept signal over the ready line, which causes the master device to transmit binary data to the slave device over the master-to-slave data line. In a second transaction, the slave device sends a slave transmission request signal over the ready line; in response, the master device sends a master transmission accept signal over the request line, which causes the slave device to transmit binary data to the master device over the slave-to-master data line. In at least one of the transactions, the master and slave devices transmit binary data at the same time as each other. | 05-22-2014 |
20140120971 | SYNCHRONISED RADIO TRANSCEIVERS - Synchronised radio transceivers Disclosed are a method of and apparatus for controlling a first radio transceiver ( | 05-01-2014 |
20140049327 | LOW-POWER OSCILLATOR - An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency. | 02-20-2014 |
20140006692 | MEMORY PROTECTION | 01-02-2014 |