INFINEON TECHNOLOGIES AG Patent applications |
Patent application number | Title | Published |
20160141410 | SEMICONDUCTOR COMPONENT WITH DYNAMIC BEHAVIOR - One embodiment provides a semiconductor component including a semiconductor body having a first side and a second side and a drift zone; a first semiconductor zone doped complementarily to the drift zone and adjacent to the drift zone in a direction of the first side; a second semiconductor zone of the same conduction type as the drift zone adjacent to the drift zone in a direction of the second side; at least two trenches arranged in the semiconductor body and extending into the semiconductor body and arranged at a distance from one another; and a field electrode arranged in the at least two trenches adjacent to the drift zone. The at least two trenches are arranged at a distance from the second semiconductor zone in the vertical direction, a distance between the trenches and the second semiconductor zone is greater than 1.5 times the mutual distance between the trenches, and a doping concentration of the drift zone in a section between the trenches and the second semiconductor zone differs by at most 35% from a minimum doping concentration in a section between the trenches. | 05-19-2016 |
20160126212 | CHIP ASSEMBLAGE, PRESS PACK CELL AND METHOD FOR OPERATING A PRESS PACK CELL - One aspect of the invention relates to a chip assemblage. The latter comprises a number of semiconductor chips, each of which has a semiconductor body having an underside, and also a top side, which is spaced apart from the underside in a vertical direction. A top main electrode is arranged on the top side and a bottom main electrode is arranged on the underside. Moreover, each of the semiconductor chips has a control electrode, by means of which an electric current between the top main electrode and the bottom main electrode can be controlled. The semiconductor chips are connected to one another by a dielectric embedding compound to form a solid assemblage. The chip assemblage additionally comprises a common control terminal, and a common reference potential terminal. The common control terminal is electrically conductively connected to each of the control electrodes via a control electrode interconnection structure, and the common reference potential terminal is electrically conductively connected to each of the first main electrodes via a main electrode interconnection structure. Moreover, a dedicated, electrically conductive top compensation lamina is present for each of the semiconductor chips, said top compensation lamina being arranged on that side of the top main electrode which faces away from the semiconductor body and being cohesively and electrically conductively connected to the top main electrode. | 05-05-2016 |
20160126211 | SEMICONDUCTOR ARRANGEMENT, METHOD FOR PRODUCING A SEMICONDUCTOR CHIP - A semiconductor assembly is described. In accordance with one example of the invention, the semiconductor assembly comprises a semiconductor body, a top main electrode arranged on a top side, a bottom main electrode arranged on an underside, and a control electrode arranged on the top side. The semiconductor assembly further includes a spring element for the pressure contacting of the control electrode with a pressure force generated by the spring element. | 05-05-2016 |
20160126197 | SEMICONDUCTOR DEVICE HAVING A STRESS-COMPENSATED CHIP ELECTRODE - A semiconductor device includes a semiconductor chip having a first main surface and a second main surface. A chip electrode is disposed on the first main surface. The chip electrode includes a first metal layer and wherein the first metal layer is arranged between the semiconductor chip and the second metal layer. | 05-05-2016 |
20160118976 | Methods and Circuits for Improved Reliability of Power Devices Operating under Repetitive Thermal Stress - Thermo-migration induced stress in power devices can be mitigated by deactivating a subset of power device components (e.g., transistors, etc.) when the power device experiences a high stress condition. Deactivating the subset of power device components serves to bifurcate the active area of the power switching device into smaller active regions, which advantageously changes the temperature gradients in the active area/regions. In some embodiments, a control circuit dynamically deactivates different subsets of power device components to shift the thermo-migration induced stress points to different portions of the active region over the lifetime of the power switching device. | 04-28-2016 |
20160112072 | System and Method for a Radio Frequency Filter - In accordance with an embodiment, a circuit includes a plurality of filter circuits having a first port, a second port and a third port, where a second port of a first of the plurality of filter circuits is coupled to a first port of a second of the plurality of filter circuits, and each of the plurality of filter circuits includes a first passive filter, a second passive filter, a first coupler and a combining network. The first coupler includes an input port coupled to the first port, an isolated port coupled to the second port, a first phase shifted port coupled to the first passive filter and a second phase shifted port coupled to the second passive filter, and the combining network includes a first input coupled to the first passive filter, a second input coupled to the second passive filter, and an output coupled to the third port. | 04-21-2016 |
20160111508 | SEMICONDUCTOR DEVICE HAVING A TRENCH GATE AND METHOD FOR MANUFACTURING - A semiconductor device having a trench gate and method for manufacturing is disclosed. One embodiment includes a first semiconductor area and a second semiconductor area, a semiconductor body area between the first semiconductor area and the second semiconductor area, and a gate arranged in a trench and separated from the semiconductor body by an insulation layer, wherein the trench has a top trench portion which extends from the semiconductor surface at least to a depth which is greater than a depth of the first semiconductor area, wherein the trench further has a bottom trench portion extending subsequent to the top trench portion at least up to the second semiconductor area, and wherein the top trench portion has a first lateral dimension and the bottom trench portion has a second lateral dimension which is greater than the first lateral dimension. | 04-21-2016 |
20160111415 | Insulated Gate Bipolar Transistor Comprising Negative Temperature Coefficient Thermistor - An embodiment of an IGBT comprises an emitter terminal at a first surface of a semiconductor body. The IGBT further comprises a collector terminal at a second surface of the semiconductor body. A first zone of a first conductivity type is in the semiconductor body between the first and second surfaces. A collector injection structure adjoins the second surface, the collector injection structure being of a second conductivity type and comprising a first part and a second part at a first lateral distance from each other. The IGBT further comprises a negative temperature coefficient thermistor adjoining the first zone in an area between the first and second parts. | 04-21-2016 |
20160104797 | Semiconductor Device and Method of Manufacturing a Semiconductor Device - A semiconductor device comprises a gate electrode in a trench in a semiconductor body. The gate electrode comprises a plurality of gate segments disposed along an extension direction of the trench, the gate segments being connected to neighboring gate segments by means of connection elements. A distance between adjacent gate segments is equal to or smaller than 0.5*L, wherein L denotes a length of each of the gate segments, the length being measured along the extension direction of the trench. | 04-14-2016 |
20160104622 | Method for Manufacturing a Semiconductor Wafer, and Semiconductor Device Having a Low Concentration of Interstitial Oxygen - A method for manufacturing a substrate wafer | 04-14-2016 |
20160084887 | CURRENT SENSOR DEVICE HAVING A SENSE RESISTOR IN A RE-DISTRIBUTION LAYER - The electronic device for sensing a current comprises a semiconductor chip comprising a main face, an electronic circuit integrated in the semiconductor chip, a redistribution metallization layer disposed above the main face of the semiconductor chip, a current path formed in the redistribution metallization layer, the current path forming a resistor that is connected at two resistance defining end points to the electronic circuit for sensing a current flowing through the current path, and external contact elements connected with the redistribution metallization layer for feeding a current to be sensed into the current path. | 03-24-2016 |
20160076911 | SYSTEM THAT OBTAINS A SWITCHING POINT WITH THE ENCODER IN A STATIC POSITION - A system including an encoder, multiple sensing elements and control logic. The encoder has a pole pitch and is configured to rotate in a direction of rotation. The multiple sensing elements are situated along the direction of rotation and span at least half the length of the pole pitch. The control logic is configured to receive signals from the multiple sensing elements based on the encoder in a static position and obtain a switching point based on the signals. | 03-17-2016 |
20160016787 | SENSOR MODULE AND SEMICONDUCTOR CHIP - A sensor module and semiconductor chip. One embodiment provides a carrier. A semiconductor chip includes a first recess and a second recess and a main surface of the semiconductor chip. The semiconductor chip is mounted to the carrier such that the first recess forms a first cavity with the carrier and the second recess forms a second cavity with the carrier. The first cavity is in fluid connection with the second cavity. | 01-21-2016 |
20150362841 | Method and Apparatus for Exposing a Structure on a Substrate - A method for exposing a structure on a substrate includes positioning of an invariable reticle and a programmable reticle in a light path between a light source and a layer on a substrate to be exposed to light and exposing the layer on the substrate by light from the light source passing the invariable reticle and the programmable reticle. | 12-17-2015 |
20150355293 | SENSOR SYSTEM - A spinning current Hall sensor configured to provide a sequence of input signals in response to a bias current being applied to a sequence of terminals of Hall sensing elements of the Hall sensor, the terminals of the Halls sensing elements configured to be interconnected in a sequence of configurations between a bias current supply and ground, with the bias current supply being connected to and applying the bias current to a different one of the terminals of each configuration. A chopping circuit demodulates the sequence of input signals to provide a corresponding sequence of demodulated positive and negative signals, with a residual offset calibration signal for the spinning current Hall sensor being based on the sequence of demodulated positive and negative signals. | 12-10-2015 |
20150349770 | System and Method for a Radio Frequency Switch - In accordance with an embodiment, a circuit includes a plurality of switching networks coupled between a corresponding plurality of RF ports and a common RF port, and a control circuit. Each of the plurality of switching networks includes a first switch coupled between its corresponding RF port and the common RF port, and at least one of the plurality of switching networks includes a selectable network coupled between the first switch and the common RF port, such that the selectable network provides a DC path in a first state and a series capacitance in a second state. | 12-03-2015 |
20150349636 | System and Method for Switched Power Supply Current Sampling - According to an embodiment, a method of operating a switching power supply includes applying a periodic switching signal to a first switch that is coupled to an output node, detecting an offset delay between applying the periodic switching signal and a change in voltage of the output node, calculating a corrected midpoint of a half phase of the periodic switching signal based on the offset delay, generating a sampling pulse based on the corrected midpoint, and sampling a current at the output node according to the sampling pulse. | 12-03-2015 |
20150348921 | Processing of Thick Metal Pads - In an embodiment of the present invention, a method of forming a semiconductor device includes providing a semiconductor substrate including a first chip region and a second chip region. A first contact pad is formed over the first chip region and a second contact pad is formed over the second chip region. The first and the second contact pads are at least as thick as the semiconductor substrate. The method further includes dicing through the semiconductor substrate between the first and the second contact pads. The dicing is performed from a side of the semiconductor substrate including the first contact pad and the second contact pad. A conductive liner is formed over the first and the second contact pads and sidewalls of the semiconductor substrate exposed by the dicing. | 12-03-2015 |
20150348864 | Connectable Package Extender for Semiconductor Device Package - A semiconductor packaging system includes a semiconductor device package having a semiconductor chip with two or more terminals and a protective structure encapsulating and electrically insulating the semiconductor chip. Two or more electrical conductors that are each electrically connected to one of the terminals extend to an outer surface of the protective structure. A first surface feature is on an exterior surface of the semiconductor device package. The system further includes a connectable package extender having a second surface feature configured to interlock with the first surface feature when the first surface feature is mated with the second surface feature so as to secure the package extender to the semiconductor device package. An extension portion adjoins and extends away from the exterior surface of the semiconductor device package when the package extender is secured to the semiconductor device package. | 12-03-2015 |
20150348824 | SEMICONDUCTOR WAFER AND METHOD FOR PROCESSING A SEMICONDUCTOR WAFER - According to various embodiments, a semiconductor wafer may include: a semiconductor body including an integrated circuit structure; and at least one tetrahedral amorphous carbon layer formed at least one of over or in the integrated circuit structure, the at least one tetrahedral amorphous carbon layer may include a substance amount fraction of sp | 12-03-2015 |
20150346744 | Method and Apparatus for Compensating PVT Variations - A method and device for compensating PVT (process, voltage temperature) variations are disclosed. In some embodiments an integrated circuit includes a buffer circuit and a PVT (process, temperature, voltage) compensation circuit configured to compensate a PVT variation of the buffer circuit, wherein the PVT compensation circuit includes adders and subtractors. | 12-03-2015 |
20150346703 | STATE OBSERVERS - State observers and systems using wave digital filter models are discussed. | 12-03-2015 |
20150344730 | PRIMER COMPOSITION, METHOD OF FORMING A PRIMER LAYER ON A SEMICONDUCTOR DEVICE, AND METHOD OF ENCAPSULATING A SEMICONDUCTOR DEVICE - A primer composition is provided. The primer composition includes at least one bi- or multi-functional benzoxazine compound; and at least one compound including a functional group having affinity for a metallic surface, and a cross-linkable group. A method of forming a primer layer on a semiconductor device, and a method of encapsulating a semiconductor device are also provided. | 12-03-2015 |
20150344294 | LEAD FRAME BASED MEMS SENSOR STRUCTURE - A sensor structure is disclosed. The sensor structure may include a lead frame for supporting a MEMS sensor, a recess in a surface of the lead frame, and a MEMS sensor coupled to the surface of the lead frame and arranged over the recess to form a chamber. Alternatively, the lead frame may have a perforation formed through it and the MEMS sensor may be coupled to the surface of the lead frame and arranged over an opening of the perforation. | 12-03-2015 |
20150342073 | Electronic module and method of manufacturing the same - An electronic module is provided, comprising an electronic chip arranged in the electronic module and comprising an input terminal and an output terminal; a first current path electrically connected to the input terminal; a second current path electrically connected to the output terminal; and an insulation arranged between the first current path and the second current path, wherein the first current path and the second current path extend in the same direction and arranged in close proximity to each other. | 11-26-2015 |
20150341726 | METHOD FOR MANUFACTURING AN OPENING STRUCTURE AND OPENING STRUCTURE - A method for manufacturing an opening structure is provided. The method may include: forming a patterned mask over a first side of a carrier; forming material over the first side of the carrier covering at least a portion of the carrier; forming a first opening in the carrier from a second side of the carrier opposite the first side of the carrier to at least partially expose a surface of the patterned mask; and forming a second opening in the material from the second side of the carrier using the patterned mask as a mask. | 11-26-2015 |
20150340888 | BATTERY MANAGEMENT SYSTEM - A device comprises a control entity configured to monitor an operation parameter of at least one battery cell of a battery. The device further comprises an interface coupled with a power line of the battery and configured to transceive control data via at least one of load modulation or load demodulation of a power line signal of the power line. | 11-26-2015 |
20150340307 | Molded chip package and method of manufacturing the same - A method of manufacturing a molded chip package is provided which comprises arranging an electronic chip on a supporting structure; forming an isolation layer at least on portions of the electronic chip; and molding an encapsulation which covers the electronic chip and the supporting structure at least partially by using a molding material comprising a matrix material and a conductive filler material. | 11-26-2015 |
20150340277 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device in accordance with various embodiments may include: forming an opening in a first region of a semiconductor substrate, the opening having at least one sidewall and a bottom; implanting dopant atoms into the at least one sidewall and the bottom of the opening; configuring at least a portion of a second region of the semiconductor substrate laterally adjacent to the first region as at least one of an amorphous or polycrystalline region; and forming an interconnect over at least one of the first and second regions of the semiconductor substrate. | 11-26-2015 |
20150340234 | METHOD FOR PROCESSING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization material over a semiconductor body; performing a heating process so as to form at least one region in the semiconductor body including a eutectic of the first metallization material and material of the semiconductor body; and depositing a second metallization material over the semiconductor body so as to contact the semiconductor body via the at least one region in the semiconductor body. | 11-26-2015 |
20150340148 | INDUCTOR AND METHOD OF FORMING AN INDUCTOR - An inductor for a semiconductor device is provided, which may include: a plurality of structured metallization layers, wherein the plurality of structured metallization layers includes at least a first metallization layer, a second metallization layer disposed over the first metallization layer, a third metallization layer disposed over the second metallization layer, and a fourth metallization layer disposed over the third metallization layer; wherein a portion of the first metallization layer and a portion of the fourth metallization layer form a first coil; wherein a portion of the second metallization layer and a portion of the third metallization layer form a second coil; and wherein the second coil is arranged within the inner space defined by the first coil. | 11-26-2015 |
20150338285 | System and Method for a Capacitive Thermometer - Various embodiments disclosed herein include a capacitive thermometer including a deflectable membrane and a sense electrode. The deflectable membrane is configured to adjust a capacitive value based on a temperature of the deflectable membrane. | 11-26-2015 |
20150338282 | REMOTE TEMPERATURE SENSING - In one example, a method includes determining, by a device, a plurality of voltage values that each correspond to a respective voltage drop across a remote p-n junction while the remote p-n junction is biased at different respective current levels, wherein each of the plurality of voltage values is a function of at least: one of the different respective current levels, a temperature of the remote p-n junction, and a series resistance between the device and the remote p-n junction. In this example, the method also includes, determining, by the device, an intermediate value based on a difference between at least three voltage values of the plurality of voltage values, wherein the intermediate value is not a function of the series resistance, and determining the temperature of the remote p-n junction based on the intermediate value such that the temperature is not a function of the series resistance. | 11-26-2015 |
20150334800 | STANDBY POWER FOR LED DRIVERS - Methods, devices, and circuits are disclosed regulating a first parameter of one or more LEDs. The methods, devices, and circuits may further be disclosed switching, in response to an indication of a dimmer interface, from regulating the first parameter of the one or more LEDs to regulating a second parameter below a light generation threshold of the one or more LEDs, and switching from regulating the first parameter to regulating the second parameter causes the one or more LEDs to enter a non-light generation mode. | 11-19-2015 |
20150331810 | RANDOMIZED MEMORY ACCESS - An embodiment relates to a device for a memory access, the device comprising a first component for conducting operations on the memory and a second component for accessing the memory in a randomized manner, wherein the first component conducts at least a portion of the operations via the second component. | 11-19-2015 |
20150326336 | SYSTEM HAVING PLASTIC WAVEGUIDES - The present disclosure relates to a system having a plurality of electronic devices interconnected by way of dielectric waveguides. In some embodiments, the system has a plurality of electronic devices respectively including a data element and a multiplexing element. The data element has a plurality of electronic device terminals that output and receive data. The multiplexing element provides the data output from the plurality of electronic device terminals to a transceiver element, which generates a wireless signal that transmits the data in a manner that distinctly identifies data from different electronic device terminals. A plurality of dielectric waveguides are disposed at locations between the plurality of electronic devices. The plurality of dielectric waveguides convey the wireless signal between the plurality of electronic devices. By interconnecting electronic devices using dielectric waveguides, disadvantages associates with metal interconnect wires can be mitigated. | 11-12-2015 |
20150326155 | METHOD FOR REDUCING PERFORMANCE DEGRADATION DUE TO REDUNDANTCALCULATION IN HIGH INTEGRITY APPLICATIONS - The present disclosure relates to a method of advanced motor control that reduces the resource demands (e.g., run-time) used to meet safety requirements by running a reduced portion of feedback control loop processes twice. In some embodiments, the method performs a plurality of processes within a feedback control loop of a motor control process configured to control operation of a motor. Performance of a first portion of the plurality of processes, which is less than the plurality of processes, is repeated within the feedback control loop. Performance of a second portion of the plurality of processes is not repeated within the feedback control loop. By repeating performance of first portion of the plurality of processes that is less than the plurality of processes, the method is able to improve performance of a motor by reducing run-time of the motor control process. | 11-12-2015 |
20150325535 | Method for Processing a Semiconductor Workpiece and Semiconductor Workpiece - A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization layer over a semiconductor workpiece; patterning the first metallization layer; and depositing a second metallization layer over the patterned first metallization layer, wherein depositing the second metallization layer includes an electroless deposition process including immersing the patterned first metallization layer in a metal electrolyte. | 11-12-2015 |
20150325503 | Method of singularizing packages and leadframe - A method of singularizing a matrix array of packages is provided, wherein the method comprises providing a matrix array of packages, wherein the matrix array is formed on a leadframe; cutting predefined leads of the leadframe by a punching process; and singularizing the packages of the matrix array of packages by a sawing process. | 11-12-2015 |
20150324599 | PROCESSING DATA IN A DEVICE - According to an example, a device for processing data is suggested, said device comprising a first component, wherein the first software component is arranged for receiving the data; a security processor for receiving said data and a first signature, wherein the security processor is arranged for determining based on the first signature whether the data are valid; for determining a second signature for the data; and for conveying the second signature to the first component. | 11-12-2015 |
20150316586 | SYSTEMS AND METHODS FOR HIGH VOLTAGE BRIDGE BIAS GENERATION AND LOW VOLTAGE READOUT CIRCUITRY - A multi voltage sensor system includes one or more charge pumps, a sensor bridge and readout circuitry. The one or more charge pumps are configured to provide a high voltage. The sensor bridge is biased by the high voltage and is configured to provide sensor values. The readout circuitry includes only low voltage components. The readout circuitry is configured to receive the sensor values. | 11-05-2015 |
20150312053 | BUS ARCHITECTURE AND ACCESS METHOD FOR PLASTIC WAVEGUIDE - The present disclosure relates to a system that uses a switch to convey wireless signals between a plurality of electronic devices interconnected by dielectric waveguides. In some embodiments, the system includes a plurality of electronic devices respectively having a transceiver element that generates a wireless signal that transmits a data packet. A switch receives the wireless signal from a first one of the plurality of electronic devices and re-transmits the wireless signal to a second one of the plurality of electronic devices. A plurality of dielectric waveguides convey the wireless signal between the plurality of electronic devices and the switch. Respective dielectric waveguides have a dielectric material disposed at a location between one of the plurality of electronic devices and the switch. Using the switch to convey wireless signals between the plurality of electronic devices provides a system that has a low wireless signal attenuation and reduced number of transceivers. | 10-29-2015 |
20150311922 | System and Method for a Radio Frequency Integrated Circuit - In accordance with an embodiment, a radio frequency integrated circuit (RFIC) includes an adjustable capacitance coupled to an input terminal of the RFIC, and a first single-pole multiple-throw (SPMT) radio frequency (RF) switch having an input coupled to the adjustable capacitance and a plurality of output nodes coupled to a corresponding plurality of second output terminals of the RFIC. | 10-29-2015 |
20150311883 | System and Method for a Switchable Capacitance - In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each have a capacitance circuit having a capacitance between a first terminal and a second terminal of the capacitance circuit, and a semiconductor switching circuit including a first terminal coupled to the first terminal of the capacitance circuit, a plurality of series connected radio-frequency (RF) switch cells having a load path and a common node. Each of the plurality of series connected RF switch cells has a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the common node. The switchable capacitance circuit also includes a resistance circuit having a first end coupled to the common node and a second end coupled to a control node. | 10-29-2015 |
20150311202 | SEMICONDUCTOR CHIP - According to one embodiment, a chip has a circuit with at least one p channel field effect transistor (FET); at least one n channel FET; a first and a second power supply terminal; wherein the n channel FET, if supplied with the upper supply potential at its gate, supplies the lower supply potential to the gate of the p channel FET; and the p channel FET, if supplied with the lower supply potential at its gate, supplies the upper supply potential to the gate of the n channel FET; wherein the logic state of the gate of the p channel FET and of the n channel FET can only be changed by at least one of the first and second supply voltage to the circuit; and a connection coupled to the gate of the p channel FET or the n channel FET and a further component of the semiconductor chip. | 10-29-2015 |
20150309523 | CIRCUIT AND METHOD FOR PROVIDING A REFERENCE VOLTAGE - According one embodiment, a circuit is described comprising a first reference voltage generating circuit comprising an output to provide a first reference voltage and a second reference voltage generating circuit comprising an input receiving a value representative of the first reference voltage, the second reference voltage generating circuit being configured to generate a second reference voltage based on the received value. | 10-29-2015 |
20150309128 | MAGNETIC FIELD SENSOR DEVICE - Magnetic field sensor devices and associated methods are disclosed. In some implementations, a second magnetic field sensor is provided, for example between bridge parts of a first magnetic field sensor. | 10-29-2015 |
20150309091 | MILLIMETER-WAVE TRANSMITTER ON A CHIP, METHOD OF CALIBRATION THEREOF AND MILLIMETER-WAVE POWER SENSOR ON A CHIP - The present invention relates to a millimeter-wave transmitter on a chip comprising at least one transmit path coupleable to an oscillator, and an on-chip power sensor to measure at least a portion of a transmit power transmitted over the at least one transmit path. The present invention further relates to a method of calibrating a millimeter-wave transmitter on a chip and an on-chip power sensor coupleable to at least one transmit path of a millimeter-wave transmitter. The embodiments of the present invention provide a direct measure of transmit power provided within an individual one of the transmit paths of the millimeter-wave transmitter. | 10-29-2015 |
20150303927 | CHIP AND METHOD FOR MANUFACTURING A CHIP - According to one embodiment, a chip is described comprising a plurality of supply lines delimiting a plurality of cell areas and a gate comprising a first transistor and a second transistor, wherein the first transistor is located in a first cell area of the plurality of cell areas and the second transistor is located in a second cell area of the plurality of cell areas such that a supply line of the plurality of supply lines lies between the first cell area and the second cell area. | 10-22-2015 |
20150303254 | SEMICONDUCTOR STRUCTURE AND A METHOD FOR PROCESSING A CARRIER - According to various embodiments, a semiconductor structure may include: a first source/drain region and a second source/drain region; a body region disposed between the first source/drain region and the second source/drain region, the body region including a core region and at least one edge region at least partially surrounding the core region; a dielectric region next to the body region and configured to limit a current flow through the body region in a width direction of the body region, wherein the at least one edge region is arranged between the core region and the dielectric region; and a gate structure configured to control the body region; wherein the gate structure is configured to provide a first threshold voltage for the core region of the body region and a second threshold voltage for the at least one edge region of the body region, wherein the first threshold voltage is less than or equal to the second threshold voltage. | 10-22-2015 |
20150303135 | Method for Fabricating a Semiconductor Package and Semiconductor Package - A method for fabricating semiconductor packages includes providing a first substrate having an aperture, providing a first semiconductor chip, connecting the first semiconductor chip to the first substrate, filling the aperture with a first insulating material and encapsulating the semiconductor chip with a second insulating material to create a first encapsulation body. | 10-22-2015 |
20150301552 | CABLE QUALITY DETECTION AND POWER CONSUMER DEVICES - In one embodiment, a method includes receiving power at a power consumer device coupled to a power provider device by a cable. The received power is supplied at a first current at an input of the power consumer device and is supplied to a load in the power consumer device. The method includes measuring a rate of change of the voltage at the input of the power consumer device, and determining whether the rate of change of the voltage at the input of the power consumer device is less than a first target rate of change of voltage. The current received at the input of the power consumer device is reduced to a second current lower than the first current if the rate of change of the voltage at the input of the power consumer device is greater than the first target rate of change of voltage. | 10-22-2015 |
20150295594 | Multiple Input and Multiple Output Switch Network - According to an embodiment, a circuit package includes a programmable switch component having a plurality of input terminals arranged on the programmable switch component, a plurality of output terminals arranged on the programmable switch component and configured to be coupled to a plurality of amplifiers, and a plurality of switches. Each switch of the plurality of switches is coupled between an input terminal of the plurality of input terminals and an output terminal of the plurality of output terminals. Each switch of the plurality of switches includes a radio frequency (RF) switch and is configured to pass an RF signal when closed. Each input terminal of the plurality of input terminals is coupled to two switches of the plurality of switches. | 10-15-2015 |
20150295528 | ALTERNATOR CONTROLLER AND SYSTEM AND METHOD FOR COMMUNICATING WITH AN ALTERNATOR CONTROLLER - According to various examples, alternator controllers, systems for communicating with an alternator controller and methods for communicating with an alternator regulator are described herein. As an example, the alternator controller includes an input terminal configured to be coupled to a coil of a stator of an alternator and an interface circuit coupled to the input terminal and configured to convert a multi-valued signal at the input terminal, into parallel signals. According to another example, a system for communicating with an alternator controller is described herein. This example includes a device and an alternator controller. The device includes an encoder. The alternator controller includes a decoder and at least one phase terminal. The encoder and the decoder are coupled via the at least one phase terminal of the alternator controller. | 10-15-2015 |
20150294943 | METHOD FOR MANUFACTURING A DIGITAL CIRCUIT AND DIGITAL CIRCUIT - A method for manufacturing a digital circuit is described comprising forming two field effect transistors, connecting the field effect transistors such that an output signal of the digital circuit in response to a predetermined input signal has an undefined logic state when the threshold voltages of the field effect transistors are equal and setting the threshold voltages of at least one of the field effect transistors such that the output signal of the digital circuit in response to the predetermined input signal has a predetermined defined logic state. | 10-15-2015 |
20150294931 | Baseplate for an electronic module and method of manufacturing the same - Various embodiments provide a baseplate for an electronic module, wherein the baseplate comprises a conductive material; and a recess formed in one main surface of the baseplate and being adapted to accommodate an electronic chip. | 10-15-2015 |
20150294142 | APPARATUS AND A METHOD FOR DETECTING A MOTION OF AN OBJECT IN A TARGET SPACE - An apparatus for detecting a motion of an object in a target space, wherein the object is located at a distance from an image-capturing device which is configured to measure the distance and to provide a sensor signal indicative of the distance, the sensor signal being decomposable in a decomposition including odd harmonics if the object is at rest. The apparatus includes a determining module configured to receive the sensor signal and to generate at least one motion signal which depends on at least one even harmonic of the decomposition of the sensor signal; and a detection module configured to detect the motion of the object based on the at least one motion signal and to provide a detection signal indicating the motion of the object. | 10-15-2015 |
20150293824 | PROCESSING A TARGET MEMORY - A method is suggested for processing a target memory, the method comprising the steps of (i) checking the target memory subsequent to an erase operation directed to the target memory; and (ii) replacing the target memory with a spare memory in case a defect is detected. | 10-15-2015 |
20150293149 | Test probe and method of manufacturing a test probe - A test probe for testing a chip package s provided, wherein the test probe comprises a test probe body comprising a conductive material; and a probe tip arranged on an end of the test probe body and comprising carbon nano tubes. | 10-15-2015 |
20150289046 | MEMS Device - A MEMS device includes a backplate electrode and a membrane disposed spaced apart from the backplate electrode. The membrane includes a displaceable portion and a fixed portion. The backplate electrode and the membrane are arranged such that an overlapping area of the fixed portion of the membrane with the backplate electrode is less than maximum overlapping. | 10-08-2015 |
20150288359 | System and Method for a Driving a Radio Frequency Switch - In accordance with an embodiment, a radio frequency (RF) switching circuit includes a plurality of series connected RF switch cells having a load path and a control node, and a switch driver coupled to the control node. Each of the plurality of series connected RF switch cells includes a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node. The switch driver includes a variable output impedance that varies with a voltage of the control node. | 10-08-2015 |
20150288349 | SWITCH DEVICE - Switch devices with a first switching path and a second switching path are provided in some embodiments. When a voltage drop across the first switching path exceeds a predetermined voltage, the second switch may be activated. | 10-08-2015 |
20150286921 | CHIP CARD SUBSTRATE AND METHOD OF FORMING A CHIP CARD SUBSTRATE - A chip card substrate is provided, which includes a plurality of layers. The plurality of layers includes a first polymer layer including a first polymer material, a second polymer layer disposed over the first polymer layer and a second polymer material different from the first polymer material. The plurality of layers further includes a third polymer layer disposed over the second polymer layer and including the first polymer material. The second polymer layer includes a plurality of cutouts at an edge of the second polymer layer so that the first polymer material of the first polymer layer and of the third polymer layer form a coupling through the plurality of cutouts. | 10-08-2015 |
20150286596 | SERVICE REQUEST INTERRUPT ROUTER WITH SHARED ARBITRATION UNIT - A service request interrupt router having Interrupt Control Units (ICUs); and an arbitration unit configured to be shared by the ICUs to arbitrate among Service Request Nodes (SRNs) that have respective service request interrupt signals and that are mapped to the ICUs, to determine for each of the ICUs which of the SRNs has a highest priority. | 10-08-2015 |
20150285701 | FORCE FEEDBACK LOOP FOR PRESSURE SENSORS - A pressure sensor system comprises a force feedback loop. The force feedback loop is configured to receive a measured pressure sensor signal and generate a feedback signal based on the measured pressure and an electrostatic force. The electrostatic force is generated based on the feedback signal and combined with the measured force keeping the resultant sensor signal stable. | 10-08-2015 |
20150283794 | CHIP CARD SUBSTRATE AND METHOD OF FORMING A CHIP CARD SUBSTRATE - A chip card substrate is provided that includes a first polymer layer including a first polymer material. The chip card substrate further includes an intermediate layer disposed over the first polymer layer and including polyolefin including a plurality of micro pores, an adhesive layer disposed over the intermediate layer and including an adhesive, and a second polymer layer disposed over the adhesive layer and including a second polymer material different from the first polymer material. | 10-08-2015 |
20150280654 | System and Method for a Low Noise Amplifier - An embodiment described herein includes a low noise amplifier (LNA) including a plurality of separate input terminals, a plurality of transistors, and an output network coupled to a first reference terminal and a single output of the LNA. Each transistor includes a conduction path and a control terminal coupled to one of the plurality of separate input terminals. The output network is also coupled to the conduction path of each of the plurality of transistors. | 10-01-2015 |
20150280425 | POWER SWITCH DEVICE - Power switch devices having an overload limit are provided. The overload limit may be adjusted based on an inductance coupled with the power switch device. | 10-01-2015 |
20150280416 | CONTROLLED SWITCH-OFF OF A POWER SWITCH - A power circuit is described that includes a switch coupled to a resistive-inductive-capacitive load and a driver coupled to the switch. The driver is configured to detect an emergency event within the power circuit. After detecting the emergency event within the power circuit, the driver is further configured to perform a controlled emergency switch-off operation of the switch to minimize the maximum temperature of the switch during the detected emergency event and switch-off operation. | 10-01-2015 |
20150280276 | Battery, a Battery Element and a Method for Forming a Battery - A battery includes at least two externally accessible battery electrodes to provide a supply voltage and at least more than half of a wafer including at least two wafer electrodes. The wafer includes a plurality of trenches reaching into the wafer. At least a part of a trench of the plurality of trenches is filled with a solid state battery structure. The solid state battery structure within the trench includes electrodes electrically connected to the wafer electrodes. | 10-01-2015 |
20150280271 | Method for Forming a Battery Element, a Battery Element and a Battery - A method for forming a battery element includes etching trenches into a substrate and crystal orientation dependent etching of the trenches. Further, the method includes forming solid state battery structures within the trenches. | 10-01-2015 |
20150280198 | Battery Element, a Battery and a Method for Forming a Battery - A battery element includes a substrate with a plurality of trenches extending into the substrate. At least a part of each trench of the plurality of trenches is filled with a solid state battery structure. Further, the battery element includes a front side battery element electrode arranged at a front side of the substrate and electrically connected to a first electrode layer of the solid state battery structures within the plurality of trenches. Additionally, the battery element includes a backside battery element electrode arranged at a backside of the substrate and electrically connected to a second electrode layer of the solid state battery structures within the plurality of trenches. | 10-01-2015 |
20150279782 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One embodiment includes a carrier, a semiconductor chip attached to the carrier, a first conducting line having a first thickness and being deposited over the semiconductor chip and the carrier and a second conducting line having a second thickness and being deposited over the semiconductor chip and the carrier. The first thickness is smaller than the second thickness. | 10-01-2015 |
20150279740 | Kerf Preparation for Backside Metallization - In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes attaching a substrate to a carrier using an adhesive component and forming a through trench through the substrate to expose the adhesive component. At least a portion of the adhesive component is etched and a metal layer is formed over sidewalls of the through trench. | 10-01-2015 |
20150277456 | TEMPERATURE DEPENDENT CURRENT LIMITING - In one example, a method includes determining, by a temperature sensor, a temperature of a device that controls an amount of current flowing to a load, and determining, based on the temperature of the device, a threshold current. The method also includes, in response to determining that the amount of current flowing to the load is greater than the threshold current, adjusting the amount of current flowing to the load. | 10-01-2015 |
20150276529 | Dynamic Pressure Sensor - According to various embodiments, a dynamic pressure sensor includes a substrate, a reference volume formed in the substrate, a deflectable membrane sealing the reference volume, a deflection sensing element coupled to the membrane and configured to measure a deflection of the membrane, and a ventilation hole configured to equalize an absolute pressure inside the reference volume with an absolute ambient pressure outside the reference volume. | 10-01-2015 |
20150270954 | DEVICE FOR GENERATING ENCRYPTED DATA SEGMENTS - A combination module combines a subset of a plurality of successive data blocks to form a combination block. A cipher module encrypts the combination block to obtain an encrypted combination block. A processing module divides the encrypted combination block into a number of encrypted data segments and combines the number of encrypted data segments with the plurality of successive data blocks to produce a plurality of transmission packets. Each one of the number of encrypted data segments is transmitted less frequently than each one of the plurality of successive data blocks. A communication module outputs the plurality of transmission packets. | 09-24-2015 |
20150270276 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE - A semiconductor device is provided, which may include: a well of a first conductivity type located within a substrate of a second conductivity type; a well terminal electrically coupled to the well; a floating gate disposed over the well; a floating gate terminal electrically coupled to the floating gate; a control gate disposed over the floating gate and electrically coupled to the well; and a control gate terminal electrically coupled to the control gate; wherein the floating gate terminal is configured to receive a first voltage; wherein the control gate terminal and the well terminal are configured to receive a second voltage. | 09-24-2015 |
20150269294 | GENERATION OF TEST STIMULI - Methods and apparatuses related to the generation of test stimuli are described. In some embodiments, a finite state machine is generated based on a mission profile, and test stimuli are generated based on the mission profile. | 09-24-2015 |
20150268065 | CAM SHAFT ROTATION SENSOR - A sensor device is provided with a magnetic field sensitive element to be positioned in a magnetic field of a magnet. The magnet is positioned on an end face of a cam shaft of an engine. The magnetic field sensitive element is configured to sense an orientation angle of the magnetic field in the range between 0° and 360°. Further, the sensor device is provided with a memory. The memory stores a mapping of pulse edges to orientation angles. Further, the sensor device is provided with electronic circuitry. The electronic circuitry is configured to generate, depending on the sensed orientation angle and the stored mapping of pulse edges to orientation angles, a signal comprising a pattern of pulses with rising and falling pulse edges which are mapped to predefined orientation angles as sensed by the magnetic field sensitive element. | 09-24-2015 |
20150264796 | Electronic module and method of manufacturing the same - An electronic module is provided, which comprises a first carrier; an electronic chip comprising at least one electronic component and arranged on the first carrier; a spacing element comprising a surface arranged on the electronic chip and being in thermal conductive connection with the at least one electronic component; a second carrier arranged on the spacing element; and a mold compound enclosing the electronic chip and the spacing element at least partially; wherein the spacing element comprises a material having a CTE value being matched with at least one other CTE. | 09-17-2015 |
20150263724 | GATE SIGNAL GENERATION WITH ADAPTIVE SIGNAL PROFILES - A gate signal is generated by summation of multiple signal profiles. The gate signal is applied to a switching device to switch the switching device between an off state and an on state. While the gate signal is applied to the switching device, at least an n-th order derivative of a load signal of the switching device is detected, with n being an integer which is equal to or larger than 2. Depending on the detected n-th order derivative, one or more of the signal profiles are adapted. | 09-17-2015 |
20150263511 | OVERVOLTAGE PROTECTION FOR A SYNCHRONOUS POWER RECTIFIER - A circuit is described that includes a rectifier configured to rectify a DC output from an AC input, a sensing unit configured to detect a voltage level of the DC output, and a control unit configured to control the rectifier based on the voltage level of the DC output. The control unit is configured to control the rectifier output by at least controlling the rectifier to rectify the DC output from the AC input if the voltage level of the DC output does not indicate an overvoltage condition at the circuit. In addition, the control unit is configured to control the rectifier based on the voltage level of the DC output by at least controlling the rectifier to shunt current from the AC input if the voltage level of the DC output does indicate the overvoltage condition. | 09-17-2015 |
20150262814 | POWER SEMICONDUCTOR DEVICE,POWER ELECTRONIC MODULE, AND METHOD FOR PROCESSING A POWER SEMICONDUCTOR DEVICE - A power semiconductor device in accordance with various embodiments may include: a semiconductor body; and a passivation layer disposed over at least a portion of the semiconductor body, wherein the passivation layer includes an organic dielectric material having a water uptake of less than or equal to 0.5 wt % in saturation. | 09-17-2015 |
20150261708 | Connectivity of Slave Devices in Mobile Devices - In accordance with an embodiment of the present invention, a chip set for a mobile device includes a slave device chip and an interface circuit chip that includes a slave bus interface for controlling the slave device chip through an analog bus. The slave bus interface is coupled to a master bus interface via a digital bus of the mobile device. The slave bus interface is configured to be driven by the master bus interface. | 09-17-2015 |
20150256940 | DOUBLE DIAPHRAGM MEMS MICROPHONE WITHOUT A BACKPLATE ELEMENT - A sensor structure, is disclosed. The sensor structure may include a first suspended structure and a second suspended structure disposed from the first suspended structure to form a volume. The first suspended structure and the second suspended structure may be arranged relative to each other such that a received pressure wave entering the volume between the first suspended structure and the second suspended structure generates a displacement of the first suspended structure to a first direction and a displacement of the second suspended structure to a second direction different from the first direction and the displacement may generate a measurable signal. | 09-10-2015 |
20150256914 | System and Method for a Transducer System with Wakeup Detection - According to embodiments described herein, a circuit includes an interface circuit configured to be coupled to a transducer and a detection circuit. The interface circuit is configured to provide a digital output signal to a signal input terminal of a processing circuit. The detection circuit is configured to receive the digital output signal and provide a low power enable signal to a low power enable terminal of the processing circuit. In the various embodiments, the digital output signal is based on a transduced signal from the transducer and the low power enable signal is determined by comparing the digital output signal with a first threshold. | 09-10-2015 |
20150256913 | MEMS SENSOR STRUCTURE FOR SENSING PRESSURE WAVES AND A CHANGE IN AMBIENT PRESSURE - A sensor structure, including: a first diaphragm structure, an electrode element, and a second diaphragm structure arranged on an opposite side of the electrode element from the first diaphragm structure is disclosed. The sensor structure may also include a chamber formed by the first and second diaphragm structures, where the pressure in the chamber is lower than the pressure outside of the chamber. A method for forming the sensor structure is likewise disclosed. | 09-10-2015 |
20150256071 | BUCK-BOOST CONVERTER WITH ACTIVE OUTPUT VOLTAGE DISCHARGE - Methods, devices, and integrated circuits are disclosed for applying an active output voltage discharge for a buck-boost converter. One example is directed to a method of operating a buck-boost converter that comprises an inductor, an output capacitor, and an output. The method includes receiving an indication of an altered output voltage requirement in the buck-boost converter. The method further includes deactivating a control loop in the buck-boost converter. The method further includes applying an active discharge of voltage from the output capacitor through the inductor to ground, thereby altering the voltage at the output of the buck-boost converter from a first output voltage to a second output voltage that corresponds to the altered output voltage requirement. The method further includes reactivating the control loop. | 09-10-2015 |
20150255509 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device having a first resistive element coupled between a common node and a bit line; a second resistive element coupled between the common node and a word line; and a pass transistor having a gate coupled to the common node, a first node coupled to a reference voltage, and a second node coupled to an output, wherein the word line is orthogonal to the bit line. | 09-10-2015 |
20150255407 | System and Method for a Microfabricated Fracture Test Structure - According to an embodiment, a micro-fabricated test structure includes a structure mechanically coupled between two rigid anchors and disposed above a substrate. The structure is released from the substrate and includes a test layer mechanically coupled between the two rigid anchors. The test layer includes a first region having a first cross-sectional area and a constricted region having a second cross-sectional area smaller than the first cross-sectional area. The structure also includes a first tensile stressed layer disposed on a surface of the test layer adjacent the first region. | 09-10-2015 |
20150253208 | SINGLE DIAPHRAGM TRANSDUCER STRUCTURE - A transducer structure including a carrier with an opening and a suspended structure mounted on the carrier which extends at least partially over the opening in the carrier is disclosed. The transducer structure may further include configuring the suspended structure to provide an electrostatic field between the suspended structure and the carrier by changing a distance between the suspended structure and the carrier. Alternatively, the suspended structure may be configured to change the distance between the suspended structure and the carrier in response to an electrostatic force provided between the suspended structure and the carrier. | 09-10-2015 |
20150251899 | SENSOR STRUCTURE FOR SENSING PRESSURE WAVES AND AMBIENT PRESSURE - In various embodiments, a sensor structure is provided. The sensor structure may include a first conductive layer; an electrode element; and a second conductive layer arranged on an opposite side of the electrode element from the first conductive layer. The first conductive layer and the second conductive layer may form a chamber. The pressure in the chamber may be lower than the pressure outside of the chamber. | 09-10-2015 |
20150251285 | SUPPORT STRUCTURE AND METHOD OF FORMING A SUPPORT STRUCTURE - A structure for fixing a membrane to a carrier including a carrier; a suspended structure; and a holding structure with a rounded concave shape which is configured to fix the suspended structure to the carrier and where a tapered side of the holding structure physically connects to the suspended structure is disclosed. A method of forming the holding structure on a carrier to support a suspended structure is further disclosed. The method may include: forming a holding structure on a carrier; forming a suspended structure on the holding structure; shaping the holding structure such that it has a concave shape; and arranging the holding structure such that a tapered side of the holding structure physically connects to the suspended structure. | 09-10-2015 |
20150249211 | MEMORY - A memory includes a first electrode and a second electrode formed within a first layer and includes a third electrode and a fourth electrode formed within a second layer. The memory includes a resistive-switching memory element and an antifuse element. The resistive-switching memory element includes a metal oxide layer and is disposed between the first electrode and the third electrode. The metal oxide layer has a first thickness and a forming voltage that corresponds to the first thickness. The antifuse element includes a dielectric layer and is disposed between the second electrode and the fourth electrode. The dielectric layer has a second thickness that is less than the first thickness and a dielectric breakdown voltage that is less than the forming voltage. | 09-03-2015 |
20150249043 | Method of Packaging a Semiconductor Chip Using a 3D Printing Process and Semiconductor Package Having Angled Surfaces - In one aspect, a method of packaging a semiconductor module includes providing a semiconductor module having a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface. A packaging assembly is formed at least partly by a 3D printing process. The packaging assembly includes the semiconductor module and a protective covering that extends over the first surface. | 09-03-2015 |
20150247879 | ACCELERATION SENSOR - Various acceleration sensors are disclosed. In some cases, an inertial mass may be formed during back-end-of-line (BEOL). In other cases, a membrane may have a bent, undulated or winded shape. In yet other embodiments, an inertial mass may span two or more pressure sensing structures. | 09-03-2015 |
20150246809 | DEVICES WITH THINNED WAFER - Methods, apparatuses and devices are described where a main wafer is irreversibly bonded to a carrier wafer and thinned to reduce a thickness of the main wafer, for example down to a thickness of 300 μm or below. | 09-03-2015 |
20150243561 | Semiconductor Devices and Methods of Formation Thereof - In accordance with an embodiment of the present invention, a method for forming a semiconductor device includes forming a device region in a substrate. The device region extends continuously from one sidewall of the substrate to an opposite sidewall of the substrate. The method further includes forming trenches in the substrate. The trenches divide the device region into active regions. The method also includes singulating the substrate by separating the substrate along the trenches. | 08-27-2015 |
20150243360 | METHOD, APPARATUS AND DEVICE FOR DATA PROCESSING - A method for data processing is suggested including: (i) transforming electrical variables for each cell of a data bit of a memory into a time domain; and (ii) determining a predetermined state by comparing the transformed electrical variables of at least two data bits. | 08-27-2015 |
20150243359 | METHOD AND DEVICE FOR PROCESSING AN ERASE COUNTER - A embodiment relates to a method for processing an erase counter comprising erase counter fields, the method comprising the steps of (i) determining an unused erase counter field; (ii) writing a selection code and an address information in the unused erase counter field, wherein the selection code and the address information are combined to determine at least one physical address of a memory. | 08-27-2015 |
20150243333 | DETERMINING A STATE OF A CELL STRUCTURE - A method is suggested for determining a state of a cell structure, wherein the cell structure includes several memory cells, the method includes: (i) detecting a first condition in a predetermined number of memory cells; and (ii) determining the state of the cell structure by assigning a second condition to the memory cells that do not show the first condition. | 08-27-2015 |
20150242348 | CLOCKLESS SERIAL SLAVE DEVICE - Various methods and devices involving a slave device are discussed. The slave device, which may be without a clock input, receives a clock message and generates a clock based on the received clock message. In some embodiments, the slave device receives a further clock message and transmits a confirmation message simultaneously with receiving the further clock message. In other embodiments, determining a clock may comprise sampling the clock message with an internal system clock and providing the clock based on located edges. Other techniques are also discussed. | 08-27-2015 |
20150241523 | HIGHLY EFFICIENT DIAGNOSTIC METHODS FOR MONOLITHIC SENSOR SYSTEMS - Embodiments relate to integrated circuit (IC) sensors and more particularly to IC sensor diagnostics using multiple (e.g., redundant) communication signal paths, wherein one or more of the communication signal paths can be diverse (e.g., in hardware, software or processing, an operating principle, or in some other way) from at least one other of the multiple communication signal paths. Embodiments can relate to a variety of sensor types, implementations and applications, including 3D magnetic field and other sensors. | 08-27-2015 |
20150239363 | CIRCUIT, ELECTRIC POWER TRAIN AND METHOD FOR CHARGING A BATTERY - A circuit is provided, including a battery, an omnipolar switch, a switching element, a DC-intermediate circuit and a current supplying circuit. The omnipolar switch may be coupled to the battery and may be configured to electrically disconnect the battery. The DC-intermediate circuit may be coupled to the omnipolar switch via the switching element, and the current supplying device may be coupled to the DC-intermediate circuit. | 08-27-2015 |
20150236710 | ANALOG-TO-DIGITAL CONVERSION - A method is disclosed. An analog signal is sampled to form a sample value using a sample and hold circuit. The sample value is converted to form a first digital result. The sample value is converted to form a second digital result. | 08-20-2015 |
20150235890 | SEMICONDUCTOR DEVICE INCLUDING A DIELECTRIC MATERIAL - A method for manufacturing a semiconductor device includes providing a carrier and a semiconductor wafer having a first side and a second side opposite to the first side. The method includes applying a dielectric material to the carrier or the semiconductor wafer and bonding the semiconductor wafer to the carrier via the dielectric material. The method includes processing the semiconductor wafer and removing the carrier from the semiconductor wafer such that the dielectric material remains on the semiconductor wafer to provide a semiconductor device comprising the dielectric material. | 08-20-2015 |
20150235864 | METHOD FOR PROCESSING A LAYER AND A METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE - A method for processing a layer may include: providing a patterned carbon layer over a layer or over a carrier; and carrying out an ion implantation through the patterned carbon layer into the layer or into the carrier. | 08-20-2015 |
20150230039 | METHOD FOR MANUFACTURING A PLURALITY OF MICROPHONE STRUCTURES, MICROPHONE AND MOBILE DEVICE - In various embodiments, a method for manufacturing microphone structures is provided. The method may include: Providing a substrate having a front side and a back side, the backside facing away from the front side, and having an inner area and an outer area laterally surrounding the inner area, with the inner area comprising a plurality of microphone areas each microphone are being provided for one microphone of the plurality of microphones; Forming a plurality of layers for the plurality of microphones in the microphone areas on the front side of the substrate; Forming a recess from the backside of the substrate with the recess laterally overlapping the entire inner area; Forming a plurality of cavities into a bottom of the recess with each cavity of the plurality of cavities being formed in one of the microphone areas; Processing the layers to form the plurality of microphone structures, wherein each microphone structure comprises at least one layer of the plurality of layers and one cavity; and Separating the plurality of microphone structures from each other. | 08-13-2015 |
20150228878 | LIGHT EMITTING DEVICE AND METHOD FOR OPERATING A PLURALITY OF LIGHT EMITTING ARRANGEMENTS - According to various examples, systems, methods, and devices for a light emitting device are described herein. As one example, a light emitting device includes a light emitting element and a capacitor. The capacitor is configured as a voltage buffer for the light emitting element and is further configured to dissipate heat from the light emitting element. According to another example, a carrier for a light emitting arrangement is described herein. According to this example, the carrier includes a capacitor configured to buffer a voltage of the light emitting arrangement. The carrier further includes a contacting structure configured for electrically contacting the light emitting arrangement and the capacitor. The capacitor and the contacting structure are arranged such that the capacitor is configured to dissipate heat from the light emitting arrangement. | 08-13-2015 |
20150228616 | Semiconductor Modules with Semiconductor Dies Bonded to a Metal Foil - A method of manufacturing semiconductor modules includes providing a metal composite substrate including a metal foil attached to a metal layer, the metal foil being thinner than and comprising a different material than the metal layer, attaching a first surface of a plurality of semiconductor dies to the metal foil prior to structuring the metal foil, and encasing the semiconductor dies attached to the metal foil in an electrically insulating material. The metal layer and the metal foil are structured after the semiconductor dies are encased with the electrically insulating material so that surface regions of the electrically insulating material are devoid of the metal foil and the metal layer. The electrically insulating material is divided along the surface regions devoid of the metal foil and the metal layer to form individual modules. | 08-13-2015 |
20150227157 | PRECISION CURRENT SENSING - Example current tracking circuits and systems as well as methods for tracking current are described herein. In one example, a current tracking circuit comprises a current mirror that receives a power supply input and a control signal as inputs, wherein the current mirror has a mirror ratio. The current tracking circuit also comprises a programmability sub-circuit coupled to the current mirror that trims a value of the mirror ratio. In another example, a method comprises performing current mirroring using a current mirror comprising a sense device, wherein a mirror ratio of the current mirror is based on a programmable sub-circuit. The method further comprises maintaining, by a voltage regulation loop, a collector potential of the sense device within a threshold difference level of a collector potential of a power device coupled to the sense device, wherein the sense device mirrors a current flowing in the power device. | 08-13-2015 |
20150226787 | INSULATED-GATE BIPOLAR TRANSISTOR COLLECTOR-EMITTER SATURATION VOLTAGE MEASUREMENT - In one example, a method includes determining that an insulated-gate bipolar transistor (IGBT) is saturated, and while the IGBT is saturated, determining a collector-emitter saturation voltage (V | 08-13-2015 |
20150226779 | GROUND FAULT DETECTION - In one example, a method includes receiving, at an input of a system, an AC signal, rectifying the AC signal into a DC signal, and determining, based on a value of one or more counters in a detection logic, whether or not the input is connected to ground. | 08-13-2015 |
20150222317 | SWITCHING DEVICE, A COMMUNICATION DEVICE, AND A METHOD FOR PROCESSING A CARRIER - According to various embodiments, a switching device may include: an antenna terminal; a switch including a first switch terminal and a second switch terminal, the first switch terminal coupled to the antenna terminal, the switch including at least one transistor at least one of over or in a silicon region including an oxygen impurity concentration of smaller than about 3×10 | 08-06-2015 |
20150221764 | WAFER BASED BEOL PROCESS FOR CHIP EMBEDDING - In various embodiments a semiconductor device is provided, including a semiconductor body including a drift region and a gate electrode arranged adjacent to the drift region; and a contact structure provided over the drift region of the semiconductor body and having a first metal layer, an adhesion layer over the first metal layer and a second metal layer over the adhesion layer. | 08-06-2015 |
20150221578 | SEMICONDUCTOR PACKAGE AND METHOD FOR PRODUCING A SEMICONDUCTOR - A device includes a die and at least one of an encapsulant at least partly encapsulating the die and a carrier to which the die is attached. The at least one of the encapsulant and the carrier includes a thermoplastic polymer that includes metallic particles. | 08-06-2015 |
20150221356 | NONVOLATILE MEMORY WITH ENHANCED EFFICIENCY TO ADDRESS ASYMETRIC NVM CELLS - This application describes embodiments of MRAM cells that utilize a PMOS transistor as an access transistor. The MRAM cells are configured to mitigate the effects of applying asymmetric current loads to transition a Magnetic-Tunnel Junction of the MRAM cell between magnetoresistive states. | 08-06-2015 |
20150220667 | APPLICATION-BASED VERIFICATION COVERAGE USING METAMODELS - At least one processor of a computing device may create at least one metamodel. The at least one processor may further perform, on the at least one metamodel, one or more of: a split operation, a merge operation, a reduce operation, a mathematical transform, an inverse operation, a derive operation, a cascading operation, and an algebraic operation on the at least one metamodel. | 08-06-2015 |
20150214297 | ELECTRONIC ARRAY AND CHIP PACKAGE - An electronic array may include a first electronic component which has a first operation voltage, a second electronic component which has a second operation voltage, wherein the second operation voltage is different from the first operation voltage and wherein the first electronic component and the second electronic component are arranged over each other, an isolation layer between the first electronic component and the second electronic component, wherein the isolation layer electrically isolates the first electronic component from the second electronic component, at least one connection layer formed at least partially between the isolation layer and the first electronic component or between the isolation layer and the second electronic component, wherein the connection layer includes a first portion and a second portion, wherein the first portion and the second portion each extend from the corresponding electronic component to the isolation layer, wherein the first portion includes an electrically isolating material which fixes the isolation layer to the corresponding electronic component and wherein the second portion includes an electrically conductive material which electrically couples the corresponding electronic component to the isolation layer. | 07-30-2015 |
20150214179 | SEMICONDUCTOR DEVICE INCLUDING FLEXIBLE LEADS - A semiconductor device includes a semiconductor chip including a transistor. A first flexible lead is electrically coupled to a first electrode on a first surface of the semiconductor chip. A second flexible lead is electrically coupled to a second electrode on the first surface of the semiconductor chip. A third flexible lead is electrically coupled to a third electrode on a second surface of the semiconductor chip, the second surface opposite to the first surface. | 07-30-2015 |
20150214163 | CHIP AND METHOD FOR DETECTING AN ATTACK ON A CHIP - According to one embodiment, a chip is described comprising a transistor level, a semiconductor region in, below, or in and below the transistor level, a test signal circuit configured to supply a test signal to the semiconductor region, a determiner configured to determine a behavior of the semiconductor region in response to the test signal and a detector configured to detect a change of geometry of the semiconductor region based on the behavior and a reference behavior of the semiconductor region in response to the test signal. | 07-30-2015 |
20150214144 | NANOTUBE STRUCTURE BASED METAL DAMASCENE PROCESS - In various embodiments a method for manufacturing a metallization layer on a substrate is provided, wherein the method may include forming a plurality of groups of nanotubes over a substrate, wherein the groups of nanotubes may be arranged such that a portion of the substrate is exposed and forming metal over the exposed portion of the substrate between the plurality of groups of nanotubes. | 07-30-2015 |
20150214084 | FRAME CASSETTE - According to various embodiments, a frame cassette may include: a housing; a mounting structure inserted in the housing, the mounting structure including a plurality of tape-frame slots, wherein each tape-frame slot is configured to receive a tape-frame, wherein the housing includes an opening to introduce a tape-frame into a tape-frame slot of the plurality of tape-frame slots or to remove a tape-frame from a tape-frame slot of the plurality of tape-frame slots, and a door mounted at the housing, wherein the door is configured to close the opening of the housing to seal the interior of the housing from the exterior of the housing. | 07-30-2015 |
20150212196 | METHOD, DEVICE AND SYSTEM FOR PROCESSING RADAR SIGNALS - An embodiment relates to a method for processing input data that includes multiplying a portion of the input data with a first set of coefficients or with a second set of coefficients, wherein the first set of coefficients and the second set of coefficients are stored in a memory, wherein the first set of coefficients is used on phase modulated input data and wherein the second set of coefficients is used on input data that are not phase modulated. | 07-30-2015 |
20150207532 | System and Method for a Mixer - In accordance with an embodiment, a circuit includes a mixer having a signal input port, a local oscillator input port and an output port, a lowpass filter circuit having an input coupled to the output port of the mixer and a terminal configured to be connected to a shunt capacitor, and a difference circuit having a first input coupled to the output port of the mixer, and a second input coupled to an output of the lowpass filter. The output of the difference circuit substantially rejects a DC signal component at the output port of the mixer. | 07-23-2015 |
20150207313 | NOISE-TOLERANT ACTIVE CLAMP WITH ESD PROTECTION CAPABILITY IN POWER UP MODE - A circuit is described comprising electrostatic discharge (ESD) protection circuitry, keep-off circuitry and ESD detection circuitry. When the ESD detection circuitry detects an ESD event, the ESD detection circuitry is configured to both enable the ESD protection circuitry and disable the keep-off circuitry. | 07-23-2015 |
20150205322 | ELECTRONIC CIRCUIT AND METHOD FOR PROVIDING A CLOCK SIGNAL - According to an embodiment, an electronic circuit is described comprising a processing circuit, a power supply configured to supply power to the processing circuit via two supply nodes; a determiner configured to determine whether the voltage between the two supply nodes is above a predetermined reference voltage; and a clock generator configured to generate a clock signal for the processing circuit wherein the clock generator is configured to if the determiner determines that the voltage between the two supply nodes is again, after pausing the generation of clock edges, above the predetermined threshold the clock generator generates a clock edge irrespective of whether it is currently a time point given by the predetermined periodicity. | 07-23-2015 |
20150200437 | System and Method for a Directional Coupler - In accordance with an embodiment, a circuit includes a current sensing circuit comprising a current input terminal coupled to an input port, a current output terminal coupled to a transmitted port, and a current sensing output terminal configured to provide a current sensing signal proportional to a current flowing between the current input terminal and the current output terminal. The circuit further includes a voltage sensing circuit having a voltage input terminal coupled to the transmitted port and a voltage sensing output terminal configured to provide a voltage sensing signal proportional to a voltage at the transmitted port. A combining circuit has a first input coupled to the current sensing output terminal, a second input coupled to the voltage sensing output terminal, and a combined output node coupled to an output port. | 07-16-2015 |
20150194192 | SENSE AMPLIFIER OF A MEMORY CELL - A sense amplifier of a memory cell having a sense voltage generating circuit configured to generate a sense voltage; and a sensing circuit configured to compare a bitline voltage of the memory cell with the sense voltage, and to output a digital output signal indicating a content of the memory cell, wherein during a sense phase, the sensing circuit is decoupled from a voltage supply which charges a bitline capacitance during a precharge phase, and is coupled to and supplied by the bitline capacitance. The sense voltage generating circuit may be further configured to generate a sense voltage that during a precharge phase is dependent on the voltage supply and during a sense phase is independent of the voltage supply. | 07-09-2015 |
20150193235 | ARITHMETIC LOGICAL UNIT ARRAY, MICROPROCESSOR, AND METHOD FOR DRIVING AN ARITHMETIC LOGICAL UNIT ARRAY - In various embodiments an arithmetic logical unit array is provided, which may include: at least two data registers for storing data, a plurality of fixed instruction registers for storing machine code instructions, and at least one programmable instruction register for storing instruction data being representative for a machine code instruction. A selection circuit of the arithmetic logical unit array may be configured to select one of the machine code instructions from the fixed instruction registers or the machine code instruction represented by the instruction data. An arithmetic logical unit of the arithmetic logical unit array may be configured to apply an operation in accordance with the machine code instruction selected by the selection circuit to the data stored in the data registers. | 07-09-2015 |
20150192178 | UNIVERSAL SOLENOID DRIVER - A device may include a driver integrated circuit (IC) comprising a first control unit and a second control unit, a first solenoid that is electrically coupled to the first control unit, a second solenoid that is electrically coupled to the second control unit; at least one sensor, a clock that synchronizes a microcontroller and the driver IC, and a peripheral bus that communicatively couples the first control unit, the second control unit. The microcontroller and the driver IC form an outer control loop that actuates the first solenoid and the second solenoid, and the first control unit, the second control unit, and the at least one sensor form an inner control loop that controls the first solenoid and the second solenoid. | 07-09-2015 |
20150188532 | CIRCUIT AND METHOD FOR OPERATING A HALF-BRIDGE - A circuit for operating a half-bridge is provided. The circuit may include a first multiplier circuit. The first multiplier circuit may be configured to multiply a first signal by a first factor to provide a turn-on signal. The turn-on signal may be configured to turn a first switch of the half-bridge on. The first multiplier circuit may be further configured to multiply the first signal by a second factor to provide a turn-off signal. The turn-off signal may be configured to turn a second switch of the half-bridge off. The first factor and the second factor may be chosen so that the second switch is turned off before the first switch is turned on. | 07-02-2015 |
20150185759 | SYNCHRONIZATION OF A DATA SIGNAL - A method for synchronizing a data signal in a bus environment is suggested, the method may include providing multiple clock phases based on a reference oscillator; determining a phase out of the multiple clock phases for a transition of a data signal; and synchronizing the data signal based on the phase determined. | 07-02-2015 |
20150181658 | DEVICE HAVING A PLURALITY OF DRIVER CIRCUITS TO PROVIDE A CURRENT TO A PLURALITY OF LOADS AND METHOD OF MANUFACTURING THE SAME - In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate includes a plurality of driver circuits at the first side of the substrate. Each of the plurality of driver circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further includes at least one load interface at the second side of the substrate. The at least one load interface is configured to couple the current from the plurality of the driver circuits to a plurality of loads at the second side of the substrate. | 06-25-2015 |
20150180483 | Oscillator Devices and Methods - Oscillator devices and corresponding methods are disclosed. In some embodiments an apparatus includes an oscillator circuit arrangement, a frequency variable resistor circuit coupled to an output of the oscillator circuit arrangement and a reference resistor circuit. The apparatus further includes a sample and hold circuit, wherein a first input of the sample and hold circuit is coupled to an output of the reference resistor circuit and a second input of the sample and hold circuit is coupled to an output of the frequency variable resistor circuit, wherein an output of the sample and hold circuit is coupled with an input of the oscillator circuit arrangement. | 06-25-2015 |
20150180333 | System and Method for a Controlled Feedback Charge Pump - According to various embodiments, a circuit includes a charge pump and a feedback circuit. The charge pump includes a first input, a second input configured to receive an offset signal, and an output terminal configured to provide a charge pump signal based on the first and second inputs. The feedback circuit includes a first input coupled to the output of the charge pump, a second input configured to be coupled to a reference signal, an enable input configured to enable and disable the feedback circuit, and a feedback output coupled to the first input of the charge pump. | 06-25-2015 |
20150179584 | ALIGNMENT MARK ARRANGEMENT, SEMICONDUCTOR WORKPIECE, AND METHOD FOR ALIGNING A WAFER - In various embodiments, an alignment mark arrangement may include a plurality of alignment marks disposed next to each other in a row, wherein at least one of the following holds true: a first alignment mark of the plurality of alignment marks has a first width and a second alignment mark of the plurality of alignment marks has a second width that is different from the first width; a first pair of neighboring alignment marks of the plurality of alignment marks is arranged at a first pitch and a second pair of neighboring alignment marks of the plurality of alignment marks is arranged at a second pitch that is different from the first pitch. | 06-25-2015 |
20150179507 | METHODS FOR PROCESSING A SEMICONDUCTOR DEVICE - According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer. | 06-25-2015 |
20150177753 | FAST TRANSIENT RESPONSE VOLTAGE REGULATOR - Techniques are described for adjusting an amount of current flowing through a first and second transistor of a voltage regulator connected to an output of a voltage regulator to maintain an output of the voltage regulator at a constant output voltage level. Also, a resistor connects a gate of the first transistor to a gate of a second transistor. The techniques may also charge or discharge a parasitic capacitance of the first transistor with a first current source connected to the gate of the first transistor and a second current source connected to the gate of the first transistor through the resistor. | 06-25-2015 |
20150177310 | Testing of Semiconductor Devices and Devices, and Designs Thereof - In accordance with an embodiment of the present invention, a method of testing a plurality of semiconductor devices includes applying a stress voltage having a peak voltage on a shield line disposed over a substrate. The substrate has functional circuitry of a semiconductor device. A fixed voltage is applied to a first metal line disposed above the substrate adjacent the shield line. The first metal line is coupled to the functional circuitry and is configured to be coupled to a high voltage node during operation. The peak voltage is greater than a maximum fixed voltage. The shield line separates the first metal line from an adjacent second metal line configured to be coupled to a low voltage node during operation. The method further includes measuring a current through the shield line in response to the stress voltage, determining the current through the shield line of the semiconductor device, and based on the determination, identifying the semiconductor device as passing the test. | 06-25-2015 |
20150162418 | METHOD FOR FORMING A SEMICONDUCTOR DEVICE - A method for forming a semiconductor device includes forming an electrical structure at a main surface of a semiconductor substrate and carrying out an anodic oxidation of a back side surface region of a back side surface of the semiconductor substrate to form an oxide layer at the back side surface of the semiconductor substrate. | 06-11-2015 |
20150162411 | METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE - A method for manufacturing a semiconductor structure is provided, which may include: forming a p-doped region adjacent to an n-doped region in a substrate; carrying out an anodic oxidation to form an oxide layer on a surface of the substrate, wherein the oxide layer in a first portion of the surface extending along the n-doped region has a greater thickness than the oxide layer in a second portion of the surface extending along the p-doped region. | 06-11-2015 |
20150162406 | Semiconductor Device with Recombination Region - A semiconductor device includes a pn junction between a drift zone and a charge-carrier transfer region in a semiconductor body. An access channel provides a permanent charge carrier path connecting the drift zone with a recombination region through a separation region between the drift zone and the recombination region. The access channel adjusts a plasma density in the drift zone and the recombination region. | 06-11-2015 |
20150162318 | CHIP, CHIP PACKAGE AND DIE - In various embodiments, a chip for a chip package is provided. The chip may include a substrate and an integrated circuit over the substrate. The integrated circuit may include a test circuit, for example a built-in self-test circuit, and an operation circuit, the test circuit including one or more first driver stages each having a first driver performance and the operation circuit including one or more second driver stages each having a second driver performance which is different from the first driver performance, first contacts electrically coupled with the first driver stages, and second contacts electrically coupled with the second driver stages, wherein the test circuit and the first contacts are configured to provide a test mode for testing the integrated circuit and wherein the operation circuit and the second contacts are configured to provide an operating mode of the integrated circuit being different from the test mode. | 06-11-2015 |
20150162192 | Method for Forming a Semiconductor Device - A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte. | 06-11-2015 |
20150162056 | Wordline Activation - Methods and devices are disclosed where a voltage on a wordline is changed from a first voltage to a second voltage via a plurality of intermediate voltages. | 06-11-2015 |
20150160923 | RANDOM PERMUTATION GENERATOR AND METHOD FOR GENERATING A RANDOM PERMUTATION SEQUENCE - According to one embodiment, a permutation generator is described comprising a memory configured to store, for each number of a predetermined set of numbers, whether the number has already been included in a number sequence; a receiver configured to receive a random number; a determiner configured to select a number from those numbers of the set of numbers that have not yet been included in the number sequence as next element of the number sequence based on the random number and an output configured to output the selected number as the next element of the number sequence. | 06-11-2015 |
20150156872 | INTEGRATED IC PACKAGE - An Integrated Circuit (IC) package comprises a package comprising a first set of pads having a pinout that is compatible with a chip core of a product family. A second set of pads are on substantially the same plane as the first set of pads and outside the package core. The second set of pads is configured to accommodate a circuit outside the chip core. The geometric center of the package core is different from the geometric center of the IC package. | 06-04-2015 |
20150156834 | FEEDFORWARD CIRCUIT FOR FAST ANALOG DIMMING IN LED DRIVERS - Methods, devices, and circuits are disclosed delivering a first level of output current to one or more loads in a buck-boost converter comprising an inductor. The methods, devices, and circuits may further be disclosed applying, in response to an indication of an altered output current requirement to one or more loads in a buck-boost converter comprising an inductor, a change in a supplied reference voltage to one or more elements including a feedforward control element, wherein applying the change in the supplied reference voltage to the feedforward control element causes an adjustment of the output current from the first level to a second level corresponding to the altered current output requirement. | 06-04-2015 |
20150155856 | CIRCUITRY AND METHOD FOR OPERATING SUCH CIRCUITRY - A circuitry is suggested, in particular a power switch, comprising a first electronic switch with an isolated gate; a second electronic switch with an isolated gate; a measuring device for determining a charge at the isolated gate of the first electronic switch and at the isolated gate of the second electronic switch; an energy supply for providing charge to the isolated gate of the first electronic switch and to the isolated gate of the second electronic switch based on the charge determined by the measuring device; a logic unit for activating either the first electronic switch, both or none of the electronic switches. | 06-04-2015 |
20150155267 | Electronic component with sheet-like redistribution structure - An electronic component comprising an electrically conductive chip carrier comprising an electrically insulating core structure at least partially covered with electrically conductive material, at least one electronic chip each having a first main surface attached to the chip carrier, and a sheet-like redistribution structure attached to a second main surface of the at least one electronic chip and configured for electrically connecting the second main surface of the at least one electronic chip with the chip carrier. | 06-04-2015 |
20150147850 | METHODS FOR PROCESSING A SEMICONDUCTOR WORKPIECE - Methods for processing a semiconductor workpiece can include providing a semiconductor workpiece that includes one or more kerf regions; forming one or more trenches in the workpiece by removing material from the one or more kerf regions from a first side of the workpiece; mounting the workpiece with the first side to a carrier; thinning the workpiece from a second side of the workpiece; and forming a metallization layer over the second side of the workpiece. | 05-28-2015 |
20150146894 | SEMICONDUCTOR DEVICE AND A METHOD FOR FORMING A SEMICONDUCTOR DEVICE - A semiconductor device includes a microphone module implemented on a first semiconductor die and a signal processing module implemented on a second semiconductor die. The microphone module includes a movable microphone element arranged at a main side of the first semiconductor die and the second semiconductor die is mounted to the main side of the first semiconductor die. | 05-28-2015 |
20150145538 | CIRCUITS AND METHODS FOR MEASURING A CURRENT - A circuit is provided, including a first resistor, a second resistor and a control unit. The second resistor may have an adjustable resistance. The control unit may be configured to adjust the second resistor to have a first resistance at which a voltage due to a first current flowing through the first resistor is equal to a voltage due to a second current flowing through the second resistor. The control unit may be further configured to adjust the second resistor to have a second resistance at which a voltage due to another first current different from the first current and flowing through the first resistor is equal to the voltage due to the second current flowing through the second resistor. The control unit may be still further configured to adjust the second resistor to have a third resistance based on at least a difference of the first resistance and the second resistance. | 05-28-2015 |
20150145520 | CIRCUIT AND METHOD FOR EVALUATING CELLS IN A BATTERY - In various embodiments, a method for evaluating a cell of a battery is provided. The method may include: balancing a voltage of at least one cell of the battery using charge pulses, wherein the charge pulses are modulated with an oscillating test signal; measuring a current flow through the cell and measuring a voltage across the cell; demodulating the measured current and the measured voltage; and determining an impedance based on the demodulated current and the demodulated voltage. | 05-28-2015 |
20150145112 | Electronic Component - In an embodiment, an electronic component includes a housing, a die pad having a first surface and a second surface opposing the first surface, a first high voltage semiconductor device arranged on the first surface of the die pad, a further semiconductor device arranged on the second surface of the die pad and a conductive connection between the first high voltage semiconductor device and the further semiconductor device. The conductive connection is surrounded by the housing and includes a portion arranged adjacent the die pad. | 05-28-2015 |
20150144988 | Semiconductor Device and Insulated Gate Bipolar Transistor with Barrier Regions - In a semiconductor device a barrier region is sandwiched between a drift region and a charge carrier transfer region. The barrier and charge carrier transfer regions form a pn junction. The barrier and drift regions form a homojunction. A mean impurity concentration in the barrier region is at least ten times as high as an impurity concentration in the drift region. A control structure is arranged to form an inversion layer in the drift and barrier regions in an inversion state. No inversion layer is formed in the drift and barrier regions in a non-inversion state. | 05-28-2015 |
20150143550 | CHIP AND METHOD FOR DETECTING AN ATTACK ON A CHIP - According to one embodiment, a chip is described comprising a substrate; an energy source configured to provide energy to the substrate; an energy receiver configured to receive energy from the energy source via the substrate and a determiner configured to determine a value of a parameter of the energy transmission between the energy source and the energy receiver, to check whether the value matches a predetermined value of the parameter and to output a signal depending on the result of the check. | 05-21-2015 |
20150143005 | METHOD AND APPARATUS FOR USE IN A DATA PROCESSING SYSTEM - A method is described, for use in a data processing system, the system having a node and a communication link, wherein the communication link is coupled to the node. The method can comprise obtaining first digital signal information associated with a first signal, transmitting the first signal from the node to the communication link, receiving a second signal from the communication link at the node, and analysing the second signal to obtain second digital signal information. The method can further include combining first digital signal information with second digital signal information and flagging a combination outside a predetermined condition space. Further, an apparatus, for use in the data processing system is described that can be operative to perform the method. A data processing system is also described. | 05-21-2015 |
20150138906 | SYSTEMS AND METHODS FOR NON-VOLATILE MEMORY - A self powered memory system is disclosed. The system includes a volatile supply component, a battery component, a switch component, and a volatile memory component. The volatile supply component is configured to provide a time varying supply. The battery component is configured to generate a non-volatile supply. The switch component is configured to generate a persistent supply from the time varying supply and the non-volatile supply. The volatile memory component is configured to maintain data by using the persistent supply. | 05-21-2015 |
20150138006 | MULTI-RATE PIPELINED ADC STRUCTURE - Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A plurality of analog-to-digital converters (ADCs) can be arranged such that one or more of the ADCs is operating at a sampling rate that is less than others of the plurality of ADCs. For example, a sampling rate interpolator may be used to increase a sampling rate of signals output at the one or more ADCs operating at the lower sampling rate, allowing pipelining of the plurality of ADCs. | 05-21-2015 |
20150137789 | System and Method for a Serial Bus Interface - In accordance with an embodiment, a method of operating a charging port having a power connection and a first data connection includes determining whether a compatible device is coupled to the charging port and receiving a serial data stream from the compatible device via the first data connection. The serial data stream includes a plurality of symbols representing a request for a power supply voltage and/or current, and the method further includes applying the requested power supply voltage and/or current to the power connection. | 05-21-2015 |
20150137309 | Methods of Fabricating Isolation Regions of Semiconductor Devices and Structures Thereof - Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device. | 05-21-2015 |
20150137144 | Predetermined Kerf Regions and Methods of Fabrication Thereof - In one embodiment, the semiconductor die includes a selective epitaxial layer including device regions, and a masking structure disposed around sidewalls of the epitaxial layer. The masking structure is part of an exposed surface of the semiconductor die. | 05-21-2015 |
20150131819 | MICROPHONE PACKAGE AND METHOD FOR GENERATING A MICROPHONE SIGNAL - A microphone package for providing a modified microphone signal includes a microphone and an equalizer device coupled to the microphone. | 05-14-2015 |
20150131247 | Electrically conductive frame on substrate for accommodating electronic chips - A method which comprises arranging a plurality of electronic chips in a plurality of chip accommodation cavities each defined by a respective surface portion of a substrate and a wall delimited by a respective one of a plurality of holes in an electrically conductive frame arranged on the substrate, at least partially encapsulating the electronic chips in the chip accommodation cavities by an encapsulant, and forming electrically conductive contacts for electrically contacting the at least partially encapsulated electronic chips. | 05-14-2015 |
20150130556 | Transistor and Tunable Inductance - According to a first aspect embodiments provide a transistor including at least one gate region between at least one drain region and at least one source region, wherein a ratio between a width of the gate region and a length of the gate region exceeds 300. | 05-14-2015 |
20150130013 | Semiconductor Device and Method for Forming a Semiconductor Device - A semiconductor device includes at least one ohmic contact region between a semiconductor substrate of the semiconductor device and an electrically conductive structure arranged adjacent to the semiconductor substrate. Further, the semiconductor device includes at least one Schottky contact region between the semiconductor substrate of the semiconductor device and the electrically conductive structure. The at least one ohmic contact region is arranged adjacent to the at least one Schottky contact region. The semiconductor substrate includes a first doping layer arranged adjacent to the electrically conductive structure. An average doping concentration of the surface region of the first doping layer in an area of the at least one ohmic contact region differs from an average doping concentration of the surface region of the first doping layer in an area of the at least one Schottky contact region by less than 10%. | 05-14-2015 |
20150124363 | ELECTRONIC SAFETY PATH - A system is described that includes a first portion including one or more components configured to implement one or more safety functions of an application. The system further includes, a second, different portion comprising one or more different components configured to activate a safety path in response to a detection of a voltage overstress in the first portion. The system further includes a third, different portion comprising one or more different components configured to electrically couple the first portion to the second portion and to prevent the voltage overstress from propagating from the first portion to the second portion. | 05-07-2015 |
20150124359 | COMBINED ESD ACTIVE CLAMP FOR CASCADED VOLTAGE PINS - A combined electro static discharge clamp for cascaded voltage pins can include an electronic switch, a plurality of discharge paths, and a plurality of trigger circuits. In response to detecting a voltage event across any two voltage pins, the trigger circuitry can turn on the electronic switch causing current caused by the voltage event to flow through one or more of the discharge paths instead of through functional circuitry which could potentially be damaged by the current caused by the voltage event. | 05-07-2015 |
20150123131 | Semiconductor Devices and Methods of Formation Thereof - In one embodiment, a semiconductor device includes a first contact pad disposed at a top side of a workpiece, a second contact pad disposed at the top side of the workpiece. An isolation region is disposed between the first contact pad and the second contact pad. A metal strip is disposed at least partially within the isolation region. The metal strip is not coupled to an external potential node. | 05-07-2015 |
20150121016 | Method, Apparatus and Device for Data Processing - A method for data processing is disclosed. A blank state is determined for several data bits based on a majority decision. Each data bit is represented by a group of at least two memory cells. The at least two memory cells of this group are complementary cells of a differential read memory. | 04-30-2015 |
20150120035 | Systems and Methods for Linking Trace Information with Sensor Data - A trace correlation system includes a data source, a controller, a probe component, and a tool. The data source is configured to provide raw data. The controller is configured to receive the raw data and generate trace information in response to the raw data. The probe component is configured to generate a data record from the raw data. The tool is configured to link the data record with the trace information. | 04-30-2015 |
20150117862 | System and Method for a Millimeter Wave Circuit Board - According to an embodiment, a circuit board includes a signal line including at least portion of a first conductive layer that has a first portion extending over a cavity in the circuit board from a first side of the cavity. The circuit board also includes a first plurality of conductive vias surrounding the cavity and the first plurality of vias include at least one blind via disposed adjacent to the first side of the cavity. | 04-30-2015 |
20150115946 | Systems and Methods Having Omnipolar Comparators for Magnetic Switches - An omnipolar magnetic sensor system includes an input stage and a behavior component. The input stage is configured to receive a source signal and to selectively chop the source signal. Further, the input stage is configured to balance the source signal using behavior parameters and generate a balanced source signal. | 04-30-2015 |
20150115475 | DEVICE INCLUDING SEMICONDUCTOR CHIPS AND METHOD FOR PRODUCING SUCH DEVICE - A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip. | 04-30-2015 |
20150115458 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip. | 04-30-2015 |
20150115448 | METHOD FOR PROCESSING WAFER - A method for processing a wafer including a plurality of chips is provided. The method may include: forming a trench in the wafer between the plurality of chips; forming a diffusion barrier layer at least over the sidewalls of the trench; forming encapsulation material over the plurality of chips and in the trench; and singularizing the plurality of chips from a side opposite the encapsulation material. | 04-30-2015 |
20150115442 | Redistribution layer and method of forming a redistribution layer - A redistribution layer for a chip is provided, wherein the redistribution layer comprises at least one electrical conductor path connecting two connection points with each other, wherein the at least one electrical conductor path is arranged on a planar supporting layer and wherein the electrical conductor path comprises copper and at least one other further electrical conductive material in an amount of more than 0.04 mass percent. | 04-30-2015 |
20150113637 | DATA PROCESSING ARRANGEMENT AND METHOD FOR ENSURING THE INTEGRITY OF THE EXECUTION OF A COMPUTER PROGRAM - According to one embodiment, a data processing arrangement is described comprising a processor configured to carry out a computer program including a plurality of program instructions; a signature determination arrangement configured to determine a signature of the program instructions carried out by the processor wherein the processor is configured to, when it carries out a program instruction of the plurality of program instructions which indicates the next program instruction of the plurality of program instructions to be carried out, provide information about the indication to the signature determination arrangement; wherein the signature determination arrangement is configured to take into account the information in the determination of the signature; and a detector configured to check, when the computer program is completely carried out, whether the determined signature is equal to a reference signature. | 04-23-2015 |
20150110300 | System and Method for a Transducer Interface - According to an embodiment, an interface circuit includes a current replicator and a receiver. The current replicator includes a power terminal coupled to a first reference node, an output terminal configured to output a signal proportional to a signal received from a transducer, and an interface terminal coupled to the transducer. Using a single interface terminal, the current replicator may be configured to provide power to the transducer and receive output signals from the transducer. The receiver may include a first input terminal coupled to the output terminal, a second input terminal coupled to a second reference node, and a current converter circuit coupled to the first input terminal. | 04-23-2015 |
20150110296 | System and Method for Transducer Biasing and Shock Protection - In accordance with an embodiment, an interface circuit includes an amplifier configured to be coupled to a transducer, a first bypass circuit coupled to a first voltage reference and the amplifier, a second bypass circuit coupled to the first voltage reference and the amplifier, and a control circuit coupled to the second bypass circuit. The first bypass circuit conducts a current when an input signal amplitude greater than a first threshold is applied to the transducer and the control circuit causes the second bypass circuit to conduct a current for a first time period after the first bypass circuit conducts a current. | 04-23-2015 |
20150110295 | System and Method for Automatic Calibration of a Transducer - In accordance with an embodiment, an interface circuit includes a variable voltage bias generator coupled to a transducer, and a measurement circuit coupled to an output of the transducer. The measurement circuit is configured to measure an output amplitude of the transducer. The interface circuit further includes a calibration controller coupled to the bias generator and the measurement circuit, and is configured to set a sensitivity of the transducer and interface circuit during an auto-calibration sequence. | 04-23-2015 |
20150109072 | System and Method for a Tunable Capacitance Circuit - A tunable capacitance circuit comprises a plurality of varactor transistors which are coupled in series. An antenna tuner comprises such a tunable capacitance circuit. | 04-23-2015 |
20150108972 | SENSOR DEVICE AND METHOD - Embodiments relate to a sensor device including a layer stack | 04-23-2015 |
20150108666 | Thinning in package using separation structure as stop - A method of forming a thinned encapsulated chip structure, wherein the method comprises providing a separation structure arranged within an electronic chip, encapsulating part of the electronic chip by an encapsulating structure, and thinning selectively the electronic chip partially encapsulated by the encapsulating structure so that the encapsulating structure remains with a larger thickness than the thinned electronic chip, wherein the separation structure functions as a thinning stop. | 04-23-2015 |
20150102372 | SEMICONDUCTOR DEVICE FOR EMITTING FREQUENCY-ADJUSTED INFRARED LIGHT - A semiconductor device for emitting frequency-adjusted infrared light includes a lateral emitter structure and a lateral filter structure. The lateral emitter structure is configured to emit infrared light with an emitter frequency distribution. Further, the lateral filter structure is configured to filter the infrared light emitted by the lateral emitter structure so that frequency-adjusted infrared light is provided with an adjusted frequency distribution. The frequency range of the adjusted frequency distribution is narrower than a frequency range of the emitter frequency distribution. Further, a lateral air gap is located between the lateral emitter structure and the lateral filter structure. | 04-16-2015 |
20150101395 | PHOTOACOUSTIC GAS SENSOR DEVICE AND A METHOD FOR ANALYZING GAS - A photoacoustic gas sensor device for analyzing gas includes an emitter module and a pressure-sensitive module. The emitter module is arranged on a carrier substrate and emits light pulses. The pressure-sensitive module is arranged on the carrier substrate within a reference gas volume. The reference gas volume is separated from a volume intended to be filled with a gas to be analyzed. Further, the pressure-sensitive module generates a sensor signal indicating information on an acoustic wave caused by light pulses emitted by the emitter module interacting with a reference gas within the reference gas volume. Additionally, the emitter module is arranged so that light pulses emitted by the emitter module reach the reference gas volume after crossing the volume intended to be filled with the gas to be analyzed. | 04-16-2015 |
20150099341 | METHODS FOR PRODUCING POLYSILICON RESISTORS - A method for producing a polysilicon resistor device may include: forming a polysilicon layer; implanting first dopant atoms into at least a portion of the polysilicon layer, wherein the first dopant atoms include deep energy level donors; implanting second dopant atoms into said at least a portion of said polysilicon layer; and annealing said at least a portion of said polysilicon layer. | 04-09-2015 |
20150097613 | GATE CLAMPING - A circuit is described that includes a switch, a switchable clamping element coupled to the switch, and a driver configured to control the switch based at least in part on a driver control signal. The driver is further configured to enable or disable the switchable clamping element. The switchable clamping element is configured to clamp a voltage across the switch when the switchable clamping element is enabled by the driver and when the voltage across the switch or a current at the switch satisfies a threshold for activating the switchable clamping element. | 04-09-2015 |
20150097294 | METHOD FOR PROCESSING A WAFER AND WAFER STRUCTURE - A method for processing a wafer in accordance with various embodiments may include: removing wafer material from an inner portion of the wafer to form a structure at an edge region of the wafer to at least partially surround the inner portion of the wafer, and printing material into the inner portion of the wafer using the structure as a printing mask. A method for processing a wafer in accordance with various embodiments may include: providing a carrier and a wafer, the wafer having a first side and a second side opposite the first side, the first side of the wafer being attached to the carrier, the second side having a structure at an edge region of the wafer, the structure at least partially surrounding an inner portion of the wafer; and printing material onto at least a portion of the second side of the wafer. | 04-09-2015 |
20150097105 | PHOTODIODE WITH COMPENSATED SPECTRAL RESPONSE - An optical detector includes a first set of one or more photodiodes configured to generate a first photocurrent according to a first spectral response function of an incident light, a second set of one or more photodiodes configured to generate a second photocurrent according to a second spectral response function of the incident light, and a third set of one or more photodiodes configured to generate a third photocurrent according to a third spectral response function of the incident light. The optical detector further includes a module configured to output an indication of the intensity of the incident light according to a fourth spectral response function based on each of the first photocurrent, the second photocurrent, and the third photocurrent. | 04-09-2015 |
20150097040 | BOOSTER ANTENNA STRUCTURE - In various embodiments, a booster antenna structure is provided, comprising a chip coupling region; a coil having a conductor forming multiple windings, wherein the coil encloses the chip coupling region substantially completely, wherein the conductor is arranged around the chip coupling region in a crossover-free manner. | 04-09-2015 |
20150095395 | PROCESSING DEVICE AND METHOD FOR MULTIPLYING POLYNOMIALS - According to one embodiment, a processing device for multiplying a first polynomial with a second polynomial is described including a first memory storing a representation of the first polynomial, a controller configured to separate the first polynomial into parts, a second memory storing pre-determined results of the multiplications of the second polynomial with possible forms of the parts of the first polynomial, a third memory for storing the result of the multiplication, an address logic, configured to determine, for each part of the first polynomial, a start address of a memory block of the second memory based on the form of the part and the location of the part within the first polynomial and an adder configured to add, for each determined address of the memory block of the second memory, the content of the memory block of the second memory at least partially to the contents of the third memory, wherein the data element of the third memory to which the content of a data element of the memory block of the second memory is added is the same for a plurality of the parts of the first polynomial. | 04-02-2015 |
20150092814 | METHOD OF EXAMINING A SUBSTRATE AND CORRESPONDING DEVICE - A method of examining a substrate is provided. The method may include: generating a temperature gradient along a surface of the substrate; detecting a heat radiation emitted from the substrate; and determining as to whether the substrate is damaged based on the detected heat radiation. | 04-02-2015 |
20150092371 | CONTACT PAD STRUCTURE, AN ELECTRONIC COMPONENT, AND A METHOD FOR MANUFACTURING A CONTACT PAD STRUCTURE - According to various embodiments, a contact pad structure may be provided, the contact pad structure may include: a dielectric layer structure; at least one contact pad being in physical contact with the dielectric layer structure; the at least one contact pad including a metal structure and a liner structure, wherein the liner structure is disposed between the metal structure of the at least one contact pad and the dielectric layer structure, and wherein a surface of the at least one contact pad is at least partially free from the liner structure, and a contact structure including an electrically conductive material; the contact structure completely covering at least the surface being at least partially free from the liner structure of the at least one contact pad, wherein the liner structure and the contact structure form a diffusion barrier for a material of the metal structure of the at least one contact pad. | 04-02-2015 |
20150091668 | System and Method for a Radio Frequency Coupler - In accordance with an embodiment, a directional coupler includes a coupler circuit and at least one amplifier coupled between a coupler circuit isolated port and a directional coupler isolated port and/or between a coupler circuit coupled port and a directional coupler coupled port. In various embodiments, the directional coupler is disposed over and/or in a substrate. | 04-02-2015 |
20150091663 | System and Method for a Voltage Controlled Oscillator - In accordance with an embodiment, a voltage controlled oscillator (VCO) includes a VCO core having a plurality of transistors, a bias resistor coupled between collector terminals of the VCO core and a first supply node, and a varactor circuit coupled to emitter terminals of the VCO core. The bias resistor is configured to limit a self-bias condition of the VCO core. | 04-02-2015 |
20150091183 | ARRANGEMENT AND METHOD FOR MANUFACTURING THE SAME - An arrangement is provided. The arrangement may include: a die including at least one electronic component and a first terminal on a first side of the die and a second terminal on a second side of the die opposite the first side, wherein the first side being the main processing side of the die, and the die further including at least a third terminal on the second side; a first electrically conductive structure providing current flow from the third terminal on second side of the die to the first side through the die; a second electrically conductive structure on the first side of the die laterally coupling the second terminal with the first electrically conductive structure; and an encapsulation material disposed at least over the first side of the die covering the first terminal and the second electrically conductive structure. | 04-02-2015 |