Patent application number | Description | Published |
20090120799 | MULTIPLE-STEP ELECTRODEPOSITION PROCESS FOR DIRECT COPPER PLATING ON BARRIER METALS - Embodiments of the invention teach a method for depositing a copper seed layer to a substrate surface, generally to a barrier layer. The method includes placing the substrate surface into a copper solution, wherein the copper solution includes complexed copper ions. A current or bias is applied across the substrate surface and the complexed copper ions are reduced to deposit the copper seed layer onto the barrier layer. | 05-14-2009 |
20090291275 | Methods For Improving Selectivity of Electroless Deposition Processes - Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic. | 11-26-2009 |
20100055422 | Electroless Deposition of Platinum on Copper - Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices. | 03-04-2010 |
20100203731 | Formation of a Zinc Passivation Layer on Titanium or Titanium Alloys Used in Semiconductor Processing - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl | 08-12-2010 |
20100288725 | Acid Chemistries and Methodologies for Texturing Transparent Conductive Oxide Materials - Surface texturing of the transparent conductive oxide (TCO) front contact of a thin film photovoltaic (TFPV) solar cell is needed to enhance the light-trapping capability of the TFPV solar cells and thus improving the solar cell efficiency. Embodiments of the current invention describe chemical formulations and methods for the wet etching of the TCO. The formulations and methods may be optimized to tune the surface texturing of the TCO as desired. | 11-18-2010 |
20110020971 | Combinatorial Screening of Transparent Conductive Oxide Materials for Solar Applications - Embodiments of the current invention include methods of improving a process of forming a textured TCO film by combinatorial methods. The combinatorial method may include depositing a TCO by physical vapor deposition or sputtering, annealing the TCO, and etching the TCO where at least one of the depositing, the annealing, or the etching is performed combinatorially. Embodiments of the current invention also include improved methods of forming the TCO based on the results of combinatorial testing. | 01-27-2011 |
20110070744 | Silicon Texturing Formulations for Solar Applications - The current invention describes a process and texturing solution for texturing a crystalline silicon substrate to provide a light trapping surface within a crystalline silicon based solar cell. In an embodiment the texturing process includes a pre-treatment of hydrofluoric acid followed by the application of a texturing solution that includes potassium hydroxide (KOH) and butanol. The application of the texturing solution may be followed by a hydrofluoric acid post-treatment. A combinatorial method of optimizing the textured surface of a crystalline silicon substrate is also described. | 03-24-2011 |
20110151105 | High-Throughput Combinatorial Dip-Coating Apparatus and Methodologies - Embodiments of the current invention describe a high performance combinatorial method and apparatus for the combinatorial development of coatings by a dip-coating process. The dip-coating process may be used for multiple applications, including forming coatings from varied sol-gel formulations, coating substrates uniformly with particles to combinatorially test particle removal formulations, and the dipping of substrates into texturing formulations to combinatorially develop the texturing formulations. | 06-23-2011 |
20110201149 | METHODS FOR FORMING RESISTIVE SWITCHING MEMORY ELEMENTS - Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication. | 08-18-2011 |
20110207320 | Noble Metal Activation Layer - Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning, silicide surface passivation against oxidation and techniques for diffusion barrier/catalyst layer deposition. Additionally, processes for generating a noble metal (for example platinum, iridium, rhenium, ruthenium, and alloys thereof) activation layer that enables the electroless barrier layer deposition on a NiSi-based contact material are described. The processes may be employed when using NiSi-based materials in other end products. The processes may be employed on silicon-based materials | 08-25-2011 |
20110259750 | METHOD OF DIRECT PLATING OF COPPER ON A RUTHENIUM ALLOY - A method is disclosed for depositing a copper seed layer onto a substrate surface. In one embodiment, the method includes providing a substrate having a barrier layer disposed on a substrate surface, wherein the barrier layer has a barrier surface comprising a material selected from the group consisting of cobalt, ruthenium, tungsten, titanium, and a compound of two or more thereof, and exposing the substrate to a non-complexed, acid electrochemical plating solution with a plating bias applied across the substrate surface to deposit a copper-containing seed layer directly on the barrier surface without intervening layer disposed therebetween. | 10-27-2011 |
20110275222 | Silicon Texture Formulations With Diol Additives And Methods of Using The Formulations - The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. Processes for texturing a crystalline silicon substrate using these formulations are also described. | 11-10-2011 |
20120090987 | COMBINATORIAL ELECTROCHEMICAL DEPOSITION - Combinatorial electrochemical deposition is described, including dividing a wafer into a plurality of substrates for combinatorial processing, immersing the plurality of substrates at least partially into a plurality of cells, within one integrated tool, including electrolytes, the cells also including electrodes immersed in the electrolytes, depositing layers on the substrates by applying potentials across the substrates and the electrodes, and varying characteristics of the depositing to perform the combinatorial processing. | 04-19-2012 |
20120091590 | Electroless Deposition of Platinum on Copper - Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices. | 04-19-2012 |
20120156498 | High-Throughput Combinatorial Dip-Coating Apparatus and Methodologies - Embodiments of the current invention describe a high performance combinatorial method and apparatus for the combinatorial development of coatings by a dip-coating process. The dip-coating process may be used for multiple applications, including forming coatings from varied sol-gel formulations, coating substrates uniformly with particles to combinatorially test particle removal formulations, and the dipping of substrates into texturing formulations to combinatorially develop the texturing formulations. | 06-21-2012 |
20120251718 | SOL-GEL TRANSITION CONTROL OF COATINGS BY ADDITION OF SOLIDIFIERS FOR CONFORMAL COATINGS ON TEXTURED GLASS - Embodiments of the invention generally relate to methods and compositions for forming conformal coatings on textured substrates. More specifically, embodiments of the invention generally relate to sol-gel processes and sol-gel compositions for forming low refractive index conformal coatings on textured transparent substrates. In one embodiment a method of forming a conformal coating on a textured glass substrate is provided. The method comprises coating the textured glass substrate with a sol-gel composition comprising a solidifier. It is believed that use of the solidifier expedites the sol-gel transition point of the sol-gel composition leading to more conformal deposition of coatings on textured substrates. | 10-04-2012 |
20120325109 | Formation of A Zinc Passivation Layer on Titanium or Titanium Alloys Used in - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl | 12-27-2012 |
20130034653 | ANTIREFLECTIVE SILICA COATINGS BASED ON SOL-GEL TECHNIQUE WITH CONTROLLABLE PORE SIZE, DENSITY, AND DISTRIBUTION BY MANIPULATION OF INTER-PARTICLE INTERACTIONS USING PRE-FUNCTIONALIZED PARTICLES AND ADDITIVES - Methods and compositions for forming durable porous low refractive index coatings on substrates are provided. In one embodiment, a method of forming a porous coating on a substrate is provided. The method comprises coating a substrate with a sol-formulation comprising a silane-based binder, silica-based nanoparticles, and an inter-particle interaction modifier for regulating interactions between the silica-based nanoparticles and annealing the coated substrate. Porous coatings formed according to the embodiments described herein demonstrate good optical properties (e.g., a low refractive index) while maintaining good mechanical durability due to the presence of the inter-particle interaction modifier. The inter-particle interaction modifier increases the strength of the particle network countering capillary forces produced during drying to maintain the porosity structure. | 02-07-2013 |
20130065355 | LASER ANNEALING FOR THIN FILM SOLAR CELLS - A method for forming copper indium gallium (sulfide) selenide (CIGS) solar cells, cadmium telluride (CdTe) solar cells, and copper zinc tin (sulfide) selenide (CZTS) solar cells using laser annealing techniques to anneal the absorber and/or the buffer layers. Laser annealing may result in better crystallinity, lower surface roughness, larger grain size, better compositional homogeneity, a decrease in recombination centers, and increased densification. Additionally, laser annealing may result in the formation of non-equilibrium phases with beneficial results. | 03-14-2013 |
20130095237 | SOL-GEL BASED ANTIREFLECTIVE COATINGS USING ALKYLTRIALKOXYSILANE BINDERS HAVING LOW REFRACTIVE INDEX AND HIGH DURABILITY - Methods and compositions for forming porous low refractive index coatings on substrates are provided. The method comprises coating a substrate with a sol-formulation comprising silica based nanoparticles and an alkyltrialkoxysilane based binder. Use of the alkyltrialkoxysilane based binder results in a porous low refractive index coating having bimodal pore distribution including mesopores formed from particle packing and micropores formed from the burning off of organics including the alkyl chain covalently bonded to the silicon. The mass ratio of binder to particles may vary from 0.1 to 20. Porous coatings formed according to the embodiments described herein demonstrate good optical properties (e.g. a low refractive index) while maintaining good mechanical durability due to the presence of a high amount of binder and a close pore structure. | 04-18-2013 |
20130136919 | METHOD OF GENERATING HIGH PURITY BISMUTH OXIDE - A method for forming and protecting high quality bismuth oxide films comprises depositing a transparent thin film on a substrate comprising one of Si, alkali metals, or alkaline earth metals. The transparent thin film is stable at room temperature and at higher temperatures and serves as a diffusion barrier for the diffusion of impurities from the substrate into the bismuth oxide. Reactive sputtering, sputtering from a compound target, or reactive evaporation are used to deposit a bismuth oxide film above the diffusion barrier. | 05-30-2013 |
20130136932 | Heat Stable SnAl and SnMg Based Dielectrics - A transparent dielectric composition comprising tin, oxygen and one of aluminum or magnesium with preferably higher than 15% by weight of aluminum or magnesium offers improved thermal stability over tin oxide with respect to appearance and optical properties under high temperature processes. For example, upon a heat treatment at temperatures higher than 500 C, changes in color and index of refraction of the present transparent dielectric composition are noticeably less than those of tin oxide films of comparable thickness. The transparent dielectric composition can be used in high transmittance, low emissivity coated panels, providing thermal stability so that there are no significant changes in the coating optical and structural properties, such as visible transmission, IR reflectance, microscopic morphological properties, color appearance, and haze characteristics, of the as-coated and heated treated products. | 05-30-2013 |
20130143354 | TCO MATERIALS FOR SOLAR APPLICATIONS - A method for forming a transparent conductive oxide (TCO) film for use in a TFPV solar device comprises the formation of a tin oxide film doped with between about 5 volume % and about 40 volume % antimony (ATO). Advantageously, the Sb concentration generally ranges from about 15 volume % to about 20 volume % and more advantageously, the Sb concentration is about 19 volume %. The ATO films exhibited almost no change in transmission characteristics between about 300 nm and about 1100 nm or resistivity after either a 15 hour exposure to water or an anneal in air for 8 minutes at 650 C, which indicated the excellent duarability. Control sample of Al doped zinc oxide (AZO) exhibited degradation of resistivity for both a 15 hour exposure to water and an anneal in air for 8 minutes at 650 C. | 06-06-2013 |
Patent application number | Description | Published |
20120295436 | FORMATION OF A ZINC PASSIVATION LAYER ON TITANIUM OR TITANIUM ALLOYS USED IN SEMICONDUCTOR PROCESSING - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl | 11-22-2012 |
20130164560 | Low-E Panel With Improved Dielectric Layer And Method For Forming The Same - Embodiments provided herein describe a low-e panel and a method for forming a low-e panel. A transparent substrate is provided. A metal oxynitride layer is formed over the transparent substrate. The metal oxynitride layer includes a first metal and a second metal. A reflective layer is formed over the transparent substrate. | 06-27-2013 |
20130164561 | Low-E Panels With Ternary Metal Oxide Dielectric Layer And Method For Forming The Same - Embodiments provided herein describe a low-e panel and a method for forming a low-e panel. A transparent substrate is provided. A metal oxide layer is formed over the transparent substrate. The metal oxide layer includes a first element, a second element, and a third element. A reflective layer is formed over the transparent substrate. The first element may include tin or zinc. The second element and the third element may each include tin, zinc, antimony, silicon, strontium, titanium, niobium, zirconium, magnesium, aluminum, yttrium, lanthanum, hafnium, or bismuth. The metal oxide layer may also include nitrogen. | 06-27-2013 |
20130230962 | METHODS FOR FORMING NICKEL OXIDE FILMS FOR USE WITH RESISTIVE SWITCHING MEMORY DEVICES/US - Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH) | 09-05-2013 |
20130319847 | METHODS AND APPARATUSES FOR LOW RESISTIVITY Ag THIN FILM USING COLLIMATED SPUTTERING - A method for making low emissivity panels, comprising forming highly smooth layers of silver on highly smooth layers of base or seed films. The highly smooth layers can be achieved by collimated sputtering, lowering the angular distribution of the sputtered particles when reaching the substrate. | 12-05-2013 |
20130340648 | Electroless Deposition of Platinum on Copper - Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices. | 12-26-2013 |
20140048013 | SEED LAYER FOR ZnO AND DOPED-ZnO THIN FILM NUCLEATION AND METHODS OF SEED LAYER DEPOSITION - Zinc oxide layer, including pure zinc oxide and doped zinc oxide, can be deposited with preferred crystal orientation and improved electrical conductivity by employing a seed layer comprising a metallic element. By selecting metallic elements that can easily crystallized at low temperature on glass substrates, together with possessing preferred crystal orientations and sizes, zinc oxide layer with preferred crystal orientation and large grain size can be formed, leading to potential optimization of transparent conductive oxide layer stacks. | 02-20-2014 |
20140170049 | Low Refractive Index Material By Sputtering Deposition Method - A method for forming boron oxide films formed using reactive sputtering. The boron oxide films are candidates as an anti-reflection coating. Boron oxide films with a refractive index of about 1.38 can be formed. The boron oxide films can be formed using power densities between 2 W/cm | 06-19-2014 |
20140231704 | Silicon Texturing Formulations - The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. The current invention describes silicon texturing formulations that include at least one high boiling point additive. The high boiling point additive may be a derivative compound of propylene glycol or a derivative compound of ethylene glycol. Processes for texturing a crystalline silicon substrate using these formulations are also described. Additionally, a combinatorial method of optimizing the textured surface of a crystalline silicon substrate is described. | 08-21-2014 |
20140273341 | Methods for Forming Back-Channel-Etch Devices with Copper-Based Electrodes - Embodiments described herein provide methods for forming indium-gallium-zinc oxide (IGZO) devices. A substrate is provided. An IGZO layer is formed above the substrate. A copper-containing layer is formed above the IGZO layer. A wet etch process is performed on the copper-containing layer to form a source region and a drain region above the IGZO layer. The performing of the wet etch process on the copper-containing layer includes exposing the copper-containing layer to an etching solution including a peroxide compound and one of citric acid, formic acid, malonic acid, lactic acid, etidronic acid, phosphonic acid, or a combination thereof. | 09-18-2014 |
20140273407 | Formulations And Methods For Surface Cleaning And Passivation of CdTe Substrates - Methods and compositions for the surface cleaning and passivation of CdTe substrates usable in solar cells are disclosed. In some embodiments amine-containing chelators are used and in other embodiments phosphorus-containing chelators are used. | 09-18-2014 |