Patent application number | Description | Published |
20090065774 | MULTILAYER SEMICONDUCTOR DEVICE - The present invention is applied to a multilayer semiconductor device including a plurality of layered semiconductor chips. At least one of the plurality of layered semiconductor chips comprises a pad that is not connected to any external circuit terminal of the multilayer semiconductor device. The multilayer semiconductor device further comprises a separating element that connects the pad to a test stub line when each semiconductor chip is tested and separates the pad from the test stub line during the normal operation. | 03-12-2009 |
20090102511 | Semiconductor device and driver control method - A semiconductor device of the invention has a plurality of P-channel transistors, to which resistance elements are inserted in series, prepared on a pull-up side of a driver such that an ON resistance value on the P-channel transistor side and a resistance value of the resistance element can be selected. In addition, also on a pull-down side of the driver, a plurality of N-channel transistors to which resistance elements are inserted in series are prepared such that an ON resistance value on the N-channel transistor side and a resistance value of the resistance element can be selected. A driver section having a linear current-voltage characteristic is realized by combination of those described. | 04-23-2009 |
20090164724 | SYSTEM AND CONTROL METHOD FOR HOT SWAPPING OF MEMORY MODULES CONFIGURED IN A RING BUS - A memory system according to the present invention copies data stored in memory modules to a hard disk device at each predetermined period, in replacing an arbitrary memory module, switches a bus from a unidirectional bus to a bi-directional bus, and at the time when an access to a memory module to be replaced is requested, accesses a storage area in the hard disk corresponding to an address space of the memory module. In addition, the memory system copies data corresponding to the address space of the memory module to be replaced from the hard disk device to a storage, and at the time when an access to the memory module is requested, accesses a storage area of the storage corresponding to the address space. Moreover, the memory system short-circuits bus connection which is disconnected by removing the memory module to be replaced. | 06-25-2009 |
20090327981 | Semiconductor device or printed wiring board design method and design support system that implements settings by using a semiconductor device model that expresses parasitic elements that occur when packaged - Correction circuit models are acquired for correcting electrical characteristic parameters that change upon mounting on a board. The correction circuit models are added to a separate model that represents a separate semiconductor device in isolation to create a semiconductor device model that represents the semiconductor device in a board-mounted state. An equivalent circuit model that represents an adjustment-object system is connected to the semiconductor device model that was created, and based on the semiconductor device model to which the equivalent circuit model is connected, adjustment-object values relating to the adjustment-object system are calculated. These adjustment-object values are compared with limit values that were determined in advance, and based on the results of comparison, a design guide is determined for adjusting the adjustment-object system. | 12-31-2009 |
20100090325 | SEMICONDUCTOR DEVICE - In order to solve a problem of increased noise accompanying increased area of a return path in a stacked package structure, provided is a semiconductor device which is formed in a stacked package such as a PoP package, which realizes low noise without changing a package size. An additional power supply wiring that runs along a signal wiring between an upper PoP and a lower PoP is newly added in the lower PoP of a package having a PoP structure. | 04-15-2010 |
20110317372 | SEMICONDUCTOR DEVICE - A device includes: a wiring board having first and second surfaces opposing each other; and a plurality of memory packages on the first surface. The wiring board includes: a first set of terminals on the first surface; a plurality of second sets of terminals on the first surface; and a plurality of first signal lines. The terminals of the first set receive respective ones of a plurality of first signals supplied from a control device. Each of the second sets is provided for a corresponding one of the memory packages. The terminals of each of the second sets contact the corresponding one of the memory packages. The first signal lines extend from respective ones of the terminals of the first set while coupling respective ones of the terminals of each of the second sets. The first signal lines extend on the first surface without extending in the wiring board. | 12-29-2011 |
20120261837 | SEMICONDUCTOR DEVICE - A semiconductor device may include, but is not limited to: a wiring hoard; and first and second chips stacked over the wiring board. The wiring board includes a plurality of first data terminals and a plurality of second data terminals. One of the first and second chips is sandwiched between the wiring board and the other of the first and second chips. The first chip includes a plurality of first data pads. The second chip includes a plurality of second data pads and a plurality of third data pads. The first data terminals of the wiring board are electrically connected respectively to the first data pads of the first chip and further respectively to the second data pads of the second chip. The second data terminals are electrically connected respectively to the third data pads of the second chip and electrically disconnected from the first chip. | 10-18-2012 |
20130147042 | SEMICONDUCTOR DEVICE - A semiconductor device includes an insulating substrate including a first surface and an opposing second surface, and a semiconductor chip. The semiconductor chip is mounted over the first surface, includes signal electrodes, power-supply electrodes and ground electrodes, which connect to pads on the first surface of the insulating substrate. Lands provided on the second surface of the insulating substrate include signal lands, power-supply lands and ground lands through vias penetrate from the first surface to the second surface of the insulating substrate, and include signal vias electrically connected the signal connection pads to the signal lands, power-supply vias electrically connected the power-supply connection pads to the power-supply lands and ground vias electrically connected the ground connection pads to the ground lands. At least one of the signal vias are closer to the connection pads than immediately adjacent one of the power-supply vias or the ground vias. | 06-13-2013 |