Patent application number | Description | Published |
20110242109 | METHOD AND DEVICE FOR SIMPLIFYING A COMPLEX PATH - The invention relates to a technical field of graphic image processing, especially to a technology for simplifying a complex path. The invention provides a method and a device for simplifying a complex path, to accomplish simplification of any complex path into a simple path of a region described by the complex path. The method for simplifying a complex path comprises: parsing the complex path into a vector linked-list consisted of linked monotonic vectors; dividing each vector in the vector linked-list into vector segments according to intersection points of the vector with other vectors in the vector linked-list; and extracting from all vector segments the vector segments located on a boundary of a region defined by the complex path, and connecting the extracted vector segments according to their location to obtain a simple path. According the method of the present application, a complex path can be simplified to a simplest path defining a region by utilizing node scanning process, such that operations on a vector level for a complex path can be realized. | 10-06-2011 |
20120061637 | 3-D STRUCTURED NONVOLATILE MEMORY ARRAY AND METHOD FOR FABRICATING THE SAME - The present invention relates to a field of nonvolatile memory technology in ULSI circuits manufacturing technology and discloses a 3D-structured resistive-switching memory array and a method for fabricating the same. The 3D-structured resistive-switching memory array according to the invention includes a substrate and a stack structure of bottom electrodes/isolation dielectric layers, deep trenches are etched in the stack structure of the bottom electrodes/the isolation dielectric layers; a resistive-switching material layer and a top electrode layer are deposited on sidewalls of the deep trenches, wherein the top electrodes and the bottom electrodes are crossed over each other on the sidewalls of the deep trenches with the resistive-switching material being interposed at cross-over points, each of the cross-over points forms one resistive-switching memory cell, and all of the resistive-switching memory cells form the 3D-structured resistive-switching memory array, and the 3D resistive-switching memory in the array are isolated by the isolation dielectric layers. According to the invention, the storage density of a resistive-switching memory can be improved, the process can be simplified, and the cost of the process can be reduced. | 03-15-2012 |
20120113726 | FLASH MEMORY AND FABRICATION METHOD AND OPERATION METHOD FOR THE SAME - The present invention discloses a flash memory and the fabrication method and the operation method for the same. The flash memory comprises two memory cells of vertical channels, wherein a lightly-doped N type (or P type) silicon is used as a substrate; a P+ region (or an N+ region) is provided on each of the both ends of the silicon surface, and two channel regions perpendicular to the surface are provided therebetween; an N+ region (or a P+ region) shared by two channels is provided over the channels; a tunneling oxide layer, a polysilicon floating gate, a block oxide layer and a polysilicon control gate are provided sequentially on the outer sides of each channel from inside to outside; and the polysilicon floating gate and the polysilicon control gate are isolated from the P+ region by a sidewall oxide layer. The whole device is a two-bit TFET type flash memory with vertical channels which has better compatibility with prior-art standard CMOS process. As compared with a conventional MOSFET-based flash memory, the flash memory according to the present invention possesses various advantages such as high programming efficiency, low power consumption, effective inhibition of punch-through effect, and high density, etc. | 05-10-2012 |
20120188821 | METHOD FOR ACHIEVING FOUR-BIT STORAGE USING FLASH MEMORY HAVING SPLITTING TRENCH GATE - The present invention discloses a method for achieving four-bit storage by using a flash memory having a splitting trench gate. The flash memory with the splitting trench gate is disclosed in a Chinese patent No. 200710105964.2. At one side that each of two trenches is contacted with a channel, a programming for electrons is achieved by using a channel hot electron injection method; and at the other side that each of the two trenches is contacted with a source or a drain, a programming for electrons is achieved by using an FN injection method, so that a function of a four-bit storage of the device is achieved by changing a programming mode. Thus, a performance of the device is improved while a storage density is greatly increased. | 07-26-2012 |
20130069031 | MULTILEVEL RESISTIVE MEMORY HAVING LARGE STORAGE CAPACITY - The present invention discloses a multilevel resistive memory having large storage capacity, which belongs to a field of a fabrication technology of a resistive memory. The resistive memory includes an top electrode and a bottom electrode, and a combination of a plurality of switching layers and defective layers interposed between the top electrode and the bottom electrode, wherein, the top electrode and the bottom electrode are respectively contacted with a switching layer (a film such as Ta | 03-21-2013 |
20130217199 | METHOD FOR FABRICATING RESISTIVE MEMORY DEVICE - The present invention discloses a method for fabricating a resistive memory, including: fabricating a bottom electrode over a substrate; partially oxidizing a metal of the bottom electrode through dry-oxygen oxidation or wet-oxygen oxidation to form a metal oxide with a thickness of 3 nm to 50 nm as a resistive material layer; finally fabricating a top electrode over the resistive material layer. The present invention omits a step of depositing a resistive material layer in a conventional method, so as to greatly reduce the process complexity. Meanwhile, a self alignment between the resistive material layer and the bottom electrode can be realized. A full isolation between devices may be ensured so as to obviate the parasite effects occurred in the conventional process methods. Meanwhile, the actual area and designed area of the device are ensured to be consistent. | 08-22-2013 |
20130222254 | Smart keyboard for computer and compact devices - This document proposes a new type of keyboard concept, Smart Keyboard, which creates a compact keyboard that can make the overall size of the keyboard smaller. It also makes it more efficient for text input on computer or other compact electronic devices, such as notebooks, tablets or even smart phones and game devices. | 08-29-2013 |
20130238985 | METHODS AND DEVICES FOR ELIMINATING CRACKS WITHIN PAGES - A method for eliminating a crack within a page includes generating two parallel equidistant lines for each contour vector of each of primitives within the page, the two parallel equidistant lines having a predetermined threshold distance and a rectangle equidistance region formed therebetween. The method further includes traversing each of the contour vectors to take a currently traversed contour vector of a primitive as a first contour vector and other contour vectors of another primitive as second contour vectors to determine a location relation between the first contour vector and each of the second contour vectors based on the equidistance region. The method further includes performing a trapping process in an area between the first contour vector and the second contour vectors based on the location relation. | 09-12-2013 |
20130293566 | METHOD AND APPARATUS FOR RASTERIZATION - The application provides a method for rasterization. According to the method, a primitive may be divided, at a position where a color abruptly changes in the primitive, into a plurality of sub-primitives with continuously and gradually changing colors. Each of the sub-primitives is then rasterized. The present application further provides an apparatus for rasterizing an image. The apparatus may comprise a dividing module configured to divide a primitive at a position where a color abruptly changes into a plurality of sub-primitives with continuously gradually changing colors. Furthermore, the apparatus may comprise a rasterizing module configure to rasterize each of the sub-primitives. The application may improve the speed of the rasterization and the quality of the processed image. | 11-07-2013 |
20140002865 | TRAPPING METHOD AND APPARATUS | 01-02-2014 |
20140145139 | TRANSPARENT FLEXIBLE RESISTIVE MEMORY AND FABRICATION METHOD THEREOF - The present invention discloses a transparent flexible resistive memory and a fabrication method thereof. The transparent flexible resistive memory includes a transparent flexible substrate, a memory unit with a MIM capacitor structure over the substrate, wherein a bottom electrode and a top electrode of the memory unit are transparent and flexible, and an intermediate resistive layer is a transparent flexible film of poly(p-xylylene). Poly(p-xylylene) has excellent resistive characteristics. In the device, the substrate, the electrodes and the intermediate resistive layer are all formed of transparent flexible material so that a completely transparent flexible resistive memory which can be used in a transparent flexible electronic system is obtained. | 05-29-2014 |
20140149847 | METHOD AND APPARATUS FOR PROCESSING FIXED LAYOUT FILES - Provided is a method and apparatus for processing a fixed layout file. The apparatus for processing the fixed layout file comprises: an XML file generating module configured to generate an XML file. The XML file includes parameters of a dynamic interactive object; and a data setting module configured to set an action for opening the XML file in a description of the fixed layout file, to display effects and behaviors of the dynamic interactive object after the XML file is opened by triggering the action. In some embodiments, the apparatus for processing the fixed layout file further includes a data presenting module which is configured to trigger the action to open the XML file when the fixed layout file is opened by the reader, to obtain the dynamic interactive object so that the effects and behaviors of the dynamic interactive object are presented in the reader. | 05-29-2014 |