Patent application number | Description | Published |
20090282320 | ITERATIVE DECODER WITH STOPPING CRITERION GENERATED FROM ERROR LOCATION POLYNOMIAL - A decoder for error correction an encoded message, such as one encoded by a turbo encoder, with reduced iterations due to an improved stopping criterion. The decoder includes an error correction loop that iteratively processes a message that is encoded prior to transmittal over a communication channel. The error correction loop generates, such as with a Reed-Solomon decoder, an error location polynomial in each iterative process. A stopping mechanism in the decoder allows an additional iteration of the message decoding based on the error location polynomial, such as by obtaining the degree of the error location polynomial and comparing it to a threshold. In one example, the threshold is the maximum number of symbol errors correctable by the Reed-Solomon code embodied in the decoder. The stopping mechanism allows additional iterations when the stopping criterion (or polynomial degree) is greater than the maximum number of symbol errors correctable by the Reed-Solomon code. | 11-12-2009 |
20120069891 | Systems and Methods for Filter Constraint Estimation - Various embodiments of the present invention provide systems and methods for calibrating a data processing circuit. For example, a method for calibrating a data processing circuit is discussed that includes providing a digital filter, providing a detector circuit, and providing an analog filter. Operation of the digital filter is at least in part governed by filter taps that correspond to a filter tap constraint value. Operation of the detector circuit is at least in part governed by a target parameter. Operation of the analog filter is at least in part governed by an analog parameter that is one of a plurality of analog parameters. The methods further include selecting a target parameter, and calculating the filter tap constraint value based on the target parameter. Combinations of the target parameter, the calculated filter tap constraint value, and each of the plurality of analog parameters are applied to identify the analog parameter. | 03-22-2012 |
20120158810 | Systems and Methods for Reducing Filter Sensitivities - Various embodiments of the present invention provide systems and methods for reducing filter sensitivities. As an example, reduced sensitivity filter circuits are discussed that include a digital filter and a filter tap adaptation circuit. The digital filter is operable to filter a received input based at least in part on a plurality of filter taps, and to provide a filtered output. The filter tap adaptation circuit is operable to receive an error value and a weighting control value, and to adaptively calculate at least one of the filter taps using the error value and the weighting control value. | 06-21-2012 |
20130002462 | Analog to Digital Converter with Generalized Beamformer - Various embodiments of the present invention provide systems, apparatuses and methods for performing analog to digital conversion. For example, an analog to digital converter circuit is discussed that includes an analog input, a number of analog to digital converters and a generalized beamformer. The analog to digital converters are operable to receive the analog input and to yield a number of digital streams. Each of the analog to digital converters samples the analog input with different phase offsets. The generalized beamformer is operable to weight and combine the digital streams to yield a digital output. | 01-03-2013 |
20130097213 | Nyquist Constrained Digital Finite Impulse Response Filter - Various embodiments of the present invention provide apparatuses and methods for filtering a digital signal with a Nyquist constrained digital finite impulse response filter. For example, an apparatus for filtering digital data is disclosed that includes a digital finite impulse response filter having a plurality of taps. The apparatus also includes a tap weight controller connected to the digital finite impulse response filter, operable to adjust a tap weight for each of a subset of the taps such that a magnitude of a Nyquist response of the digital finite impulse response filter remains within a constraint range. | 04-18-2013 |
20130106637 | Oversampled Data Processing Circuit With Multiple Detectors | 05-02-2013 |
20130176640 | Systems and Methods for Adaptive Gain Control - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, a data detector circuit, a filter circuit, an error generation circuit, and a target parameter adaptation circuit. The analog to digital converter circuit converts an analog input into corresponding digital samples. The data detector circuit applies a data detection algorithm to a data set derived from the digital samples to yield a detected output. The filter circuit convolves the detected output with a target parameter to yield a target output. The error generation circuit calculates an error value based on the digital samples and the target output. The target parameter adaptation circuit updates the target parameter based at least in part on the error value. | 07-11-2013 |
20130198421 | Systems and Methods for Digital MRA Compensation - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output. | 08-01-2013 |
20130235484 | Multi-Path Data Processing System - Various embodiments of the present invention provide apparatuses and methods for processing data in a multi-path data processing circuit. For example, an apparatus is disclosed that includes a first filter operable to process a first digital data stream to yield a first filtered digital data stream, a second filter operable to process a second digital data stream to yield a second filtered digital data stream, wherein the first and second digital data stream are representative of a same data set and wherein the first and second digital data stream have a different phase, a combining circuit operable to combine the first filtered digital data stream and the second filtered digital data stream to yield a combined data stream, and a data detector operable to detect a data sequence in the combined data stream. | 09-12-2013 |
20130335844 | Systems and Methods for Hybrid MRA Compensation - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output. | 12-19-2013 |
20140104717 | ZERO GAIN START AND GAIN ACQUISITION BASED ON ADAPTIVE ANALOG-TO-DIGITAL CONVERTER TARGET - Aspects of the disclosure pertain to a system and method for providing zero gain start (ZGS) and gain acquisition based on an adaptive analog-to-digital converter (ADC) target. The adaptive ADC target is used to collect channel characteristics and based on the adaptive ADC target, an adjusted 2T amplitude target value is generated. | 04-17-2014 |
20140168810 | Systems and Methods for Adaptive Threshold Pattern Detection - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for detecting patterns in a data stream. | 06-19-2014 |
20140211336 | AUTOMATIC GAIN CONTROL LOOP ADAPTATION FOR ENHANCED NYQUIST DATA PATTERN DETECTION - Techniques are provided for automatic gain control loop adaptation in circuitry for processing such data signals. In one example, an apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry comprises an amplifier, a detector operatively coupled to the amplifier, and a feedback path operatively coupled between the detector and the amplifier. The amplifier is configured to receive and amplify an input signal received by the read channel circuitry. The detector is configured to detect a data pattern from the amplified input signal. The feedback path is configured to provide a feedback signal to the amplifier to adjust a gain of the amplifier, and to generate the feedback signal in accordance with a value selected to improve detection of the data pattern by increasing an amplitude of the data pattern around a given frequency. | 07-31-2014 |
20140254043 | SAMPLING-PHASE ACQUISITION BASED ON CHANNEL-IMPULSE-RESPONSE ESTIMATION - Embodiments of the invention can be manifested as methods for converting analog waveforms into digital sampled signals. In at least one such embodiment, the method includes (i) sampling, based on a sampling-clock signal, an analog waveform received from a transmission channel to generate a digital sampled signal, (ii) generating a digital target signal by applying a specified reference data pattern to a model of the transmission channel, and (iii) adjusting the sampling-clock signal by comparing the digital sampled signal to the digital target signal. Embodiments of the invention can also be manifested as apparatuses that convert analog waveforms into digital sampled signals. | 09-11-2014 |
20140268391 | DATA SEQUENCE DETECTION IN BAND-LIMITED CHANNELS USING COOPERATIVE SEQUENCE EQUALIZATION - A method for detecting a data sequence includes generating a sample stream, which is a time-sequenced digital signal associated with samples of an analog signal. The sample stream is input to n equalization filter banks, which each have m equalization filters to generate m equalized sample streams. The m equalized sample streams from each equalization filter bank are input to a corresponding one of n noise predictive filters. Each noise predictive filter is an m-tap noise predictive filter that receives the m equalized sample streams from a corresponding one of the n equalization filter banks. Each noise predictive filter is associated with one of n data patterns. A filtered equalization stream is generated by each noise predictive filter. Noise sample streams are generated using the filtered equalization streams generated by the n noise predictive filters. A data sequence is detected using the noise sample streams. | 09-18-2014 |