Patent application number | Description | Published |
20110043506 | Device for Driving LCD panel and Related Display Device - A driving device for driving an LCD panel is disclosed. The LCD panel includes a substrate and a plurality of pixel units arranged as a matrix on the substrate. The driving device includes a gate driver for generating a plurality of scanning signals, each for driving pixel units of a row of the LCD panel, a voltage generator for providing a non-negative common signal to the substrate according to a conversion period, and a source driving device for generating a plurality of source driving signals according to a compensation indication signal, an frame signal and the conversion period, each source driving signal for driving pixel units of a column of the LCD panel. | 02-24-2011 |
20110153923 | HIGH SPEED MEMORY SYSTEM - A high speed memory system includes a plurality of memory devices; a plurality of buffers; and a memory controller. The plurality of buffers is respectively coupled to the plurality of memory devices. The memory controller is coupled to the plurality of buffers, for generating a plurality of control signal to the plurality of buffers and sequentially controlling access to the plurality of memory devices in a time-sharing manner according to a clock. | 06-23-2011 |
20120062546 | DATA DRIVER - A data driver includes two data processing circuits for respectively providing positive and negative pixel voltages according to first and second pixel data, and a multiplexer circuit including multiplexer units. Each multiplexer unit has first and second input terminals respectively receiving the positive and negative pixel voltages, and an output terminal coupled to a data line. A first switching device has first and second switches serially coupled between the first input and output terminals. A node between the first and second switches is selectively grounded via a third switch. A second switching device has fourth and fifth switches serially coupled between the second input and output terminals. A node between the fourth and fifth switches is selectively grounded via a sixth switch. When the first and second switches turn on, the sixth switch turns on. When the fourth and fifth switches turn on, the third switch turns on. | 03-15-2012 |
20120294401 | METHOD OF CALIBRATING SIGNAL SKEWS IN MIPI AND RELATED TRANSMISSION SYSTEM - In calibration mode, a clock signal and a data signal are respectively transmitted via a clock lane and a data lane of an MIPI. A test clock signal is provided by adjusting the phase of the clock signal, and a test data signal is provided by adjusting the phase of the data signal. By latching the test data signal according to the test clock signal, a latched data may be acquired for determining an optimized phase relationship corresponding to the clock lane and the data lane. When transmitting the clock signal and the data signal in normal mode, the signal delays of the clock lane and the data lane may be adjusted according to the optimized phase relationship. | 11-22-2012 |
20130120352 | DATA DRIVER - A data driver includes two data processing circuits for respectively providing positive and negative pixel voltages according to first and second pixel data, and a multiplexer circuit including multiplexer units. Each multiplexer unit has first and second input terminals respectively receiving the positive and negative pixel voltages, and an output terminal coupled to a data line. A first switching device has first and second switches serially coupled between the first input and output terminals. A node between the first and second switches is selectively grounded via a third switch. A second switching device has fourth and fifth switches serially coupled between the second input and output terminals. A node between the fourth and fifth switches is selectively grounded via a sixth switch. When the first and second switches turn on, the sixth switch turns on. When the fourth and fifth switches turn on, the third switch turns on. | 05-16-2013 |
20130257917 | DISPLAY DRIVING OPTIMIZATION METHOD AND DISPLAY DRIVER - A display driving optimization method and a display driver are provided. The method includes following steps. Previous data and current data of at least a data line of a display panel are estimated to obtain an estimate result. A pre-charge operation or a charge-sharing operation of the data line is enabled or disabled according to the estimation result. | 10-03-2013 |
20130293528 | DISPLAY DRIVING APPARATUS AND METHOD FOR DRIVING DISPLAY PANEL - A display driving apparatus is disclosed. The display driving apparatus includes a display panel, a controller and a driving circuit. The controller receives a signal adjusting data and generates a driving controlling signal according to the signal adjusting data. The driving circuit separately provides a scanning driving signal and a data driving signal to a scanning line and a data line and adjusts at least one electrical property of the scanning driving signal and at least one electrical property of the data driving signal according to the driving controlling signal, wherein the signal adjusting data is generated according to an impedance value of the scanning line and the data line. | 11-07-2013 |
20140184581 | DATA DRIVER - A data driver includes two data processing circuits for respectively providing positive and negative pixel voltages according to first and second pixel data, and a multiplexer circuit including multiplexer units. Each multiplexer unit has first and second input terminals respectively receiving the positive and negative pixel voltages, and an output terminal coupled to a data line. A first switching device has first and second switches serially coupled between the first input and output terminals. A node between the first and second switches is selectively grounded via a third switch. A second switching device has fourth and fifth switches serially coupled between the second input and output terminals. A node between the fourth and fifth switches is selectively grounded via a sixth switch. When the first and second switches turn on, the sixth switch turns on. When the fourth and fifth switches turn on, the third switch turns on. | 07-03-2014 |
20140211888 | MIPI SIGNAL RECEIVING APPARATUS AND METHOD - A signal receiving apparatus and method adapted for receiving a MIPI signal are disclosed. The signal receiving apparatus includes a signal receiver, a selector, a decoding apparatus and a byte boundary searcher. The signal receiver receives a clock signal, and obtains an input data stream according to the clock signal. The selector outputs the input data stream to a first or second output terminal according to a decoding error signal. The byte boundary searcher operates a boundary searching operation on the input data stream for generating a byte tuning information, wherein, the signal receiver adjusts the clock according to the byte tuning information for adjusting the input data stream. | 07-31-2014 |