Patent application number | Description | Published |
20090194798 | BACKSIDE ILLUMINATED IMAGING SENSOR HAVING A CARRIER SUBSTRATE AND A REDISTRIBUTION LAYER - A backside illuminated imaging sensor includes a semiconductor substrate having a front surface and a back surface. The semiconductor substrate has at least one imaging array formed on the front surface. The imaging sensor also includes a carrier substrate to provide structural support to the semiconductor substrate, where the carrier substrate has a first surface coupled to the front surface of the semiconductor substrate. A redistribution layer is formed between the front surface of the semiconductor substrate and the second surface of the carrier substrate to route electrical signals between the imaging array and a second surface of the carrier substrate. | 08-06-2009 |
20090200587 | Masked laser anneal during fabrication of backside illuminated image sensors - A technique for fabricating an array of imaging pixels includes fabricating front side components on a front side of the array. After fabricating the front side components, a dopant layer is implanted on a backside of the array. A mask is formed over the dopant layer to selectively expose portions of the dopant layer. Next, the exposed portions of the dopant layer are laser annealed. Alternatively, the mask may be disposed over the backside prior to the formation of the dopant layer and the dopants implanted through the exposed portions and subsequently laser annealed. | 08-13-2009 |
20090200588 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH LIGHT REFLECTING TRANSFER GATE - A backside illuminated imaging sensor includes a semiconductor having an imaging pixel that can include a photodiode region, an insulation layer, and a reflective layer. The photodiode is typically formed in the frontside of the semiconductor substrate. A surface shield layer can be formed on the frontside of the photodiode region. A light reflecting layer can be formed using silicided polysilicon on the frontside of the sensor. The photodiode region receives light from the back surface of the semiconductor substrate. When a portion of the received light propagates through the photodiode region to the light reflecting layer, the light reflecting layer reflects the portion of light received from the photodiode region towards the photodiode region. The silicided polysilicon light reflecting layer also forms a gate of a transistor for establishing a conductive channel between the photodiode region and a floating drain. | 08-13-2009 |
20090200589 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH IMPROVED INFRARED SENSITIVITY - A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer. | 08-13-2009 |
20090200590 | IMAGE SENSOR WITH LOW ELECTRICAL CROSS-TALK - An array of pixels is formed using a substrate, where each pixel has a substrate having a backside and a frontside that includes metalization layers, a photodiode formed in the substrate, frontside P-wells formed using frontside processing that are adjacent to the photosensitive region, and an N-type region formed in the substrate below the photodiode. The N-type region is formed in a region of the substrate below the photodiode and is formed at least in part in a region of the substrate that is deeper than the depth of the frontside P-wells. | 08-13-2009 |
20090200626 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH VERTICAL PIXEL SENSOR - A backside illuminated imaging sensor includes a vertical stacked sensor that reduces cross talk by using different silicon layers to form photodiodes at separate levels within a stack (or separate stacks) to detect different colors. Blue light-, green light-, and red light-detection silicon layers are formed, with the blue light detection layer positioned closest to the backside of the sensor and the red light detection layer positioned farthest from the backside of the sensor. An anti-reflective coating (ARC) layer can be inserted in between the red and green light detection layers to reduce the optical cross talk captured by the red light detection layer. Amorphous polysilicon can be used to form the red light detection layer to boost the efficiency of detecting red light. | 08-13-2009 |
20090200631 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH LIGHT ATTENUATING LAYER - A backside illuminated imaging sensor includes a semiconductor substrate, a metal interconnect layer and a light attenuating layer. The semiconductor substrate has a front surface, a back surface, and includes at least one imaging pixel formed on the front surface of the semiconductor substrate. The metal interconnect layer is electrically coupled to the imaging pixel and the light attenuating layer is coupled between the metal interconnect layer and the front surface of the semiconductor substrate. In operation, the imaging pixel receives light from the back surface of the semiconductor substrate, where a portion of the received light propagates through the imaging pixel to the light attenuating layer. The light attenuating layer is configured to substantially attenuate the portion of light received from the imaging pixel. | 08-13-2009 |
20090267070 | Multilayer image sensor structure for reducing crosstalk - An image sensor pixel includes a substrate, an epitaxial layer, and a light collection region. The substrate is doped to have a first conductivity type. The epitaxial layer is disposed over the substrate and doped to have a second conductivity type opposite of the first conductivity type. The light collection region is disposed within the epitaxial layer for collecting photo-generated charge carriers. The light collection region is doped to have the first conductivity type as well. | 10-29-2009 |
20090302358 | CMOS image sensor with high full-well-capacity - An image sensor with a high full-well capacity includes a photosensitive region, a transfer gate, and sidewall spacers. The photosensitive region is formed to accumulate an image charge in response to light. The transfer gate disposed adjacent to the photosensitive region and coupled to selectively transfer the image charge from the photosensitive region to other pixel circuitry. First and second sidewall spacers are disposed on either side of the transfer gate. The first sidewall spacer closest to the photosensitive region is narrower than the second sidewall spacer. In some cases, the first sidewall spacer may be omitted. | 12-10-2009 |
20090302409 | IMAGE SENSOR WITH MULTIPLE THICKNESS ANTI-RELFECTIVE COATING LAYERS - An image sensor includes a substrate having a surface at which incident light is received. A pixel array is formed over and within the substrate. The pixel array includes a first and a second pixel arranged to receive light of different colors. The first pixel includes a photosensitive region formed in the substrate and has a first anti-reflective coating (ARC) layer formed over the photosensitive region. The first ARC layer has a first thickness that produces destructive interference above the first ARC layer in response to the incident light. The second pixel includes a photosensitive region formed in the substrate, and a second ARC layer formed over the photosensitive region that produces destructive interference above the second ARC layer in response to the incident light. | 12-10-2009 |
20100013039 | Backside-illuminated imaging sensor including backside passivation - The disclosure describes embodiments of a process comprising forming a pixel on a frontside of a substrate, the substrate having a frontside, a backside, and a thickness substantially equal to a distance between the frontside and the backside. The thickness of the substrate is reduced by removing material from the backside of the substrate to allow for backside illumination of the pixel, and the backside of the substrate is treated with a hydrogen plasma to passivate the backside. The disclosure also describes embodiments of an apparatus comprising a semiconductor wafer having a frontside, a backside, and a thickness substantially equal to a distance between the frontside and the backside, and a pixel formed on the frontside, wherein the thickness of the wafer is selected and adjusted to allow for illumination of the pixel through the backside of the wafer, and wherein the backside is treated with a hydrogen plasma to passivate the backside. | 01-21-2010 |
20100084692 | IMAGE SENSOR WITH LOW CROSSTALK AND HIGH RED SENSITIVITY - A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but substantially not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but substantially not below the first plurality of color pixels. | 04-08-2010 |
20100109060 | IMAGE SENSOR WITH BACKSIDE PHOTODIODE IMPLANT - An array of pixels is formed using a substrate. Each pixel can be formed on the substrate, which has a backside and a frontside that includes metalization layers. A photodiode is formed in the substrate and frontside P-wells are formed using frontside processing that are adjacent to the photosensitive region. A first N-type region is formed in the substrate below the photodiode. A second N-type region is formed in a region of the substrate below the first N-type region and is formed using backside processing. | 05-06-2010 |
20100123069 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH IMPROVED ANGULAR RESPONSE - A backside illuminated imaging pixel with improved angular response includes a semiconductor layer having a front and a back surface. The imaging pixel also includes a photodiode region formed in the semiconductor layer. The photodiode region includes a first and a second n-region. The first n-region has a centerline projecting between the front and back surfaces of the semiconductor layer. The second n-region is disposed between the first n-region and the back surface of the semiconductor layer such that the second n-region is offset from the centerline of the first n-region. | 05-20-2010 |
20100123174 | LIGHTLY-DOPED DRAINS (LDD) OF IMAGE SENSOR TRANSISTORS USING SELECTIVE EPITAXY - Embodiments of the present invention are directed to an image sensor having pixel transistors and peripheral transistors disposed in a silicon substrate. For some embodiments, a protective coating is disposed on the peripheral transistors and doped silicon is epitaxially grown on the substrate to form lightly-doped drain (LDD) areas for the pixel transistors. The protective oxide may be used to prevent epitaxial growth of silicon on the peripheral transistors during formation of the LDD areas of the pixel transistors. | 05-20-2010 |
20100271524 | MULTILAYER IMAGE SENSOR PIXEL STRUCTURE FOR REDUCING CROSSTALK - An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type. | 10-28-2010 |
20110068429 | IMAGE SENSOR WITH CONTACT DUMMY PIXELS - An image sensor array includes a substrate layer, a metal layer, an epitaxial layer, a plurality of imaging pixels, and a contact dummy pixel. The metal layer is disposed above the substrate layer. The epitaxial layer is disposed between the substrate layer and the metal layer. The imaging pixels are disposed within the epitaxial layer and each include a photosensitive element for collecting an image signal. The contact dummy pixel is dispose within the epitaxial layer and includes an electrical conducting path through the epitaxial layer. The electrical conducting path couples to the metal layer above the epitaxial layer. | 03-24-2011 |
20110085067 | MULTILAYER IMAGE SENSOR PIXEL STRUCTURE FOR REDUCING CROSSTALK - An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type. | 04-14-2011 |
20110089517 | CMOS IMAGE SENSOR WITH HEAT MANAGEMENT STRUCTURES - An image sensor includes a device wafer substrate of a device wafer, a device layer of the device wafer, and optionally a heat control structure and/or a heat sink. The device layer is disposed on a frontside of the device wafer substrate and includes a plurality of photosensitive elements disposed within a pixel array region and peripheral circuitry disposed within a peripheral circuits region. The photosensitive elements are sensitive to light incident on a backside of the device wafer substrate. The heat control structure is disposed within the device wafer substrate and thermally isolates the pixel array region from the peripheral circuits region to reduce heat transfer between the peripheral circuits region and the pixel array region. The heat sink conducts heat away from the device layer. | 04-21-2011 |
20110095188 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH IMPROVED INFRARED SENSITIVITY - A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer. | 04-28-2011 |
20110101201 | Photodetector Array Having Electron Lens - Photodetectors, photodetector arrays, image sensors, and other apparatus are disclosed. An apparatus, of one aspect, may include a surface to receive light, a photosensitive region disposed within a substrate, and a material coupled between the surface and the photosensitive region. The material may receive the light. At least some of the light may free electrons in the material. An electron lens coupled between the surface and the material may focus the electrons in the material toward the photosensitive region. Other apparatus are also disclosed, as are methods of using such apparatus, methods of fabricating such apparatus, and systems incorporating such apparatus. | 05-05-2011 |
20110115002 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH REINFORCED PAD STRUCTURE - A backside illuminated imaging sensor with reinforced pad structure includes a device layer, a metal stack, an opening and a frame. The device layer has an imaging array formed in a front side of the device layer and the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer where the metal stack includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The frame is disposed within the opening to structurally reinforce the metal pad. | 05-19-2011 |
20110169991 | IMAGE SENSOR WITH EPITAXIALLY SELF-ALIGNED PHOTO SENSORS - An image sensor pixel includes a substrate doped to have a first conductivity type. A first epitaxial layer is disposed over the substrate and doped to also have the first conductivity type. A transfer transistor gate is formed on the first epitaxial layer. An epitaxially grown photo-sensor region is disposed in the first epitaxial layer and has a second conductivity type. The epitaxially grown photo-sensor region includes an extension region that extends under a portion of the transfer transistor gate. | 07-14-2011 |
20110177650 | CMOS IMAGE SENSOR WITH SELF-ALIGNED PHOTODIODE IMPLANTS - An example method of forming a pinned photodiode includes applying a photoresist mask to a semiconductor layer at a location where a transfer gate will subsequently be formed. First dopant ions are then implanted at a first angle to form a first dopant region under an edge of the photoresist mask. Next, a photoresist mask is etched such that a thickness of the photoresist mask is reduced to form a trimmed photoresist mask. Second dopant ions are then implanted at a second angle to form a second dopant region, wherein the second dopant ions are shadowed by the trimmed photoresist mask to exclude the second dopant ions from a region partially above the first dopant region and adjacent to an edge of the trimmed photoresist mask. | 07-21-2011 |
20110199518 | IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION - An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array. | 08-18-2011 |
20110227184 | Apparatus Having Thinner Interconnect Line for Photodetector Array and Thicker Interconnect Line for Periphery Region - An apparatus of one aspect includes a photodetector array, and a peripheral region at a periphery of the photodetector array. A thinner interconnect line corresponding to the photodetector array is disposed within one or more insulating layers. A thicker interconnect line corresponding to the peripheral region is disposed within the one or more insulating layers. Other apparatus, methods, and systems are also disclosed. | 09-22-2011 |
20110241090 | HIGH FULL-WELL CAPACITY PIXEL WITH GRADED PHOTODETECTOR IMPLANT - Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed. | 10-06-2011 |
20110260221 | LASER ANNEAL FOR IMAGE SENSORS - A technique for fabricating an image sensor including a pixel circuitry region and a peripheral circuitry region includes fabricating front side components on a front side of the image sensor. A dopant layer is implanted on a backside of the image sensor. A anti-reflection layer is formed on the backside and covers a first portion of the dopant layer under the pixel circuitry region while exposing a second portion of the dopant layer under the peripheral circuitry region. The first portion of the dopant layer is laser annealed from the backside of the image sensor through the anti-reflection layer. The anti-reflection layer increases a temperature of the first portion of the dopant layer during the laser annealing. | 10-27-2011 |
20120013777 | CMOS IMAGE SENSOR WITH IMPROVED PHOTODIODE AREA ALLOCATION - Embodiments of an apparatus comprising a pixel array comprising a plurality of macropixels. Each macropixel includes a pair of first pixels each including a color filter for a first color, the first color being one to which pixels are most sensitive, a second pixel including a color filter for a second color, the second color being one to which the pixels are least sensitive and a third pixel including a color filter for a third color, the third color being one to which pixels have a sensitivity between the least sensitive and the most sensitive, wherein the first pixels each occupy a greater proportion of the light-collection area of the macropixel than either the second pixel or the third pixel. Corresponding process and system embodiments are disclosed and claimed. | 01-19-2012 |
20120018620 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH VERTICAL PIXEL SENSOR - A backside illuminated imaging sensor includes a vertical stacked sensor that reduces cross talk by using different silicon layers to form photodiodes at separate levels within a stack (or separate stacks) to detect different colors. Blue light-, green light-, and red light-detection silicon layers are formed, with the blue light detection layer positioned closest to the backside of the sensor and the red light detection layer positioned farthest from the backside of the sensor. An anti-reflective coating (ARC) layer can be inserted in between the red and green light detection layers to reduce the optical cross talk captured by the red light detection layer. Amorphous polysilicon can be used to form the red light detection layer to boost the efficiency of detecting red light. | 01-26-2012 |
20120019695 | IMAGE SENSOR HAVING DARK SIDEWALLS BETWEEN COLOR FILTERS TO REDUCE OPTICAL CROSSTALK - An apparatus and technique for fabricating an image sensor including the dark sidewall films disposed between adjacent color filters. The image sensor further includes an array of photosensitive elements disposed in a substrate layer, a color filter array (“CFA”) including CFA elements having at least two different colors disposed on a light incident side of the substrate layer, and an array of microlenses disposed over the CFA. Each microlens is aligned to direct light incident on the light incident side of the image sensor through a corresponding CFA element to a corresponding photosensitive element. The dark sidewall films are disposed on sides of the CFA elements and separate adjacent ones of the CFA elements having different colors. | 01-26-2012 |
20120019696 | IMAGE SENSOR WITH DUAL ELEMENT COLOR FILTER ARRAY AND THREE CHANNEL COLOR OUTPUT - A color image sensor is disclosed. The color image sensor includes a pixel array including a color filter array (“CFA”) overlaying an array of photo-sensors for acquiring a color image. The CFA includes first color filter elements of a first color overlaying a first group of the photo-sensors and second color filter elements of a second color overlaying a second group of the photo-sensors. The first color filter elements contribute to a first color channel of the color image and the second color filter elements contribute to a second color channel of the color image. The color image sensor further includes a color combiner unit coupled to combine the first color channel with the second color channel to generate a third color channel of the color image based on the first and second color channels. An output port is coupled to the pixel array to output the color image having three color channels including the first, second, and third color channels. | 01-26-2012 |
20120038014 | BACKSIDE ILLUMINATED IMAGE SENSOR WITH STRESSED FILM - A backside illuminated (“BSI”) complementary metal-oxide semiconductor (“CMOS”) image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region. | 02-16-2012 |
20120061789 | IMAGE SENSOR WITH IMPROVED NOISE SHIELDING - An image sensor includes a device wafer including a pixel array for capturing image data bonded to a carrier wafer. Signal lines are disposed adjacent to a side of the carrier wafer opposite the device wafer and a metal noise shielding layer is disposed beneath the pixel array within at least one of the device wafer or the carrier wafer to shield the pixel array from noise emanating from the signal lines. A through-silicon-via (“TSV”) extends through the carrier wafer and the metal noise shielding layer and extends into the device wafer to couple to circuitry within the device wafer. Further noising shielding may be provided by highly doping the carrier wafer and/or overlaying the bottom side of the carrier wafer with a low-K dielectric material. | 03-15-2012 |
20120104525 | IMAGE SENSOR WITH COLOR PIXELS HAVING UNIFORM LIGHT ABSORPTION DEPTHS - An example image sensor includes first, second, and third micro-lenses. The first micro-lens is in a first color pixel and has a first curvature and a first height. The second micro-lens is in a second color pixel and has a second curvature and a second height. The third micro-lens is in a third color pixel and has a third curvature and a third height. The first curvature is the same as both the second curvature and the third curvature and the first height is greater than the second height and the second height is greater than the third height, such that light absorption depths for the first, second, and third color pixels are the same. | 05-03-2012 |
20120175722 | SEAL RING SUPPORT FOR BACKSIDE ILLUMINATED IMAGE SENSOR - A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring. | 07-12-2012 |
20120235212 | BACKSIDE-ILLUMINATED (BSI) IMAGE SENSOR WITH REDUCED BLOOMING AND ELECTRICAL SHUTTER - Embodiments of a pixel including a photosensitive region formed in a surface of a substrate and an overflow drain formed in the surface of the substrate at a distance from the photosensitive area, an electrical bias of the overflow drain being variable and controllable. Embodiments of a pixel including a photosensitive region formed in a surface of a substrate, a source-follower transistor coupled to the photosensitive region, the source-follower transistor including a drain, and a doped bridge coupling the photosensitive region to the drain of the source-follower transistor. | 09-20-2012 |
20120249845 | IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION - An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array. | 10-04-2012 |
20120282728 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH REINFORCED PAD STRUCTURE - A method of fabricating a backside illuminated imaging sensor that includes a device layer, a metal stack, and an opening is disclosed. The device layer has an imaging array formed in a front side of the device layer, where the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer and includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The method includes depositing a film on the back side of the device layer and within the opening, then etching the film to form a frame within the opening to structurally reinforce the metal pad. | 11-08-2012 |
20120295385 | LIGHTLY-DOPED DRAINS (LDD) OF IMAGE SENSOR TRANSISTORS USING SELECTIVE EPITAXY - Embodiments of the present invention are directed to an image sensor having pixel transistors and peripheral transistors disposed in a silicon substrate. For some embodiments, a protective coating is disposed on the peripheral transistors and doped silicon is epitaxially grown on the substrate to form lightly-doped drain (LDD) areas for the pixel transistors. The protective oxide may be used to prevent epitaxial growth of silicon on the peripheral transistors during formation of the LDD areas of the pixel transistors. | 11-22-2012 |
20120302000 | LASER ANNEAL FOR IMAGE SENSORS - A technique for fabricating an image sensor including a pixel circuitry region and a peripheral circuitry region includes fabricating front side components on a front side of the image sensor. A dopant layer is implanted on a backside of the image sensor. A anti-reflection layer is formed on the backside and covers a first portion of the dopant layer under the pixel circuitry region while exposing a second portion of the dopant layer under the peripheral circuitry region. The first portion of the dopant layer is laser annealed from the backside of the image sensor through the anti-reflection layer. The anti-reflection layer increases a temperature of the first portion of the dopant layer during the laser annealing. | 11-29-2012 |
20120319242 | Dopant Implantation Hardmask for Forming Doped Isolation Regions in Image Sensors - Forming a doped isolation region in a substrate during manufacture of an image sensor. A method of an aspect includes forming a hardmask layer over the substrate, and forming a photoresist layer over the hardmask layer. An opening is formed in the photoresist layer over an intended location of the doped isolation region. An opening is etched in the hardmask layer by exposing the hardmask layer to one or more etchants through the opening. The opening in the hardmask layer may have a width of less than 0.4 micrometers. The doped isolation region may be formed in the substrate beneath the opening in the hardmask layer by performing a dopant implantation that introduces dopant through the opening in the hardmask layer. The method of an aspect may include forming sidewall spacers on sidewalls of the opening in the hardmask layer and using the sidewall spacers as a dopant implantation mask. | 12-20-2012 |
20130001661 | HIGH FULL-WELL CAPACITY PIXEL WITH GRADED PHOTODETECTOR IMPLANT - Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed. | 01-03-2013 |
20130032921 | BACKSIDE ILLUMINATED IMAGE SENSOR WITH STRESSED FILM - An image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident through a first side of the image sensor to collect an image charge. The stress adjusting layer is disposed over the first side of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region. | 02-07-2013 |
20130033629 | IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION - An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array. | 02-07-2013 |
20130083223 | IMAGE SENSOR WITH DUAL ELEMENT COLOR FILTER ARRAY AND THREE CHANNEL COLOR OUTPUT - A color image sensor includes a pixel array including CFA overlaying an array of photo-sensors for acquiring color image data. The CFA includes first color filter elements of a first color overlaying a first group of the photo-sensors and second color filter elements of a second color overlaying a second group of the photo-sensors. The first group of photo-sensors generate first color signals of a first color channel and the second group of photo-sensors generate second color signals of a second color channel. The color image sensor further includes a color signal combiner circuit (“CSCC”) coupled to receive the first and second color signals output from the pixel array. The CSCC includes a combiner coupled to combine the first and second colors signals to generate third color signals of a third color channel. An output port is coupled to the CSCC to output the color image data. | 04-04-2013 |
20130083224 | IMAGE SENSOR WITH DUAL ELEMENT COLOR FILTER ARRAY AND THREE CHANNEL COLOR OUTPUT - A color image sensor includes a pixel array including a CFA overlaying an array of photo-sensors for acquiring a color image. The CFA includes first color filter elements of a first color overlaying a first group of the photo-sensors, second color filter elements of a second color overlaying a second group of the photo-sensors, and a plurality of filter stacks overlaying a third group of the photo-sensors. The first group generates first color signals of a first color channel and the second group generates second color signals of a second color channel. Each of the filter stacks includes a first stacked filter of the first color and a second stacked filter of the second color. A sensitivity of the filter stacks equals a product of sensitivities of the first and the second stacked filters and the filter stacks generate a third color channel. | 04-04-2013 |
20130092982 | PARTIAL BURIED CHANNEL TRANSFER DEVICE FOR IMAGE SENSORS - Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate. | 04-18-2013 |
20130113065 | PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES - Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via. | 05-09-2013 |
20130122637 | SEAL RING SUPPORT FOR BACKSIDE ILLUMINATED IMAGE SENSOR - A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring. | 05-16-2013 |
20130207212 | LATERAL LIGHT SHIELD IN BACKSIDE ILLUMINATED IMAGING SENSORS - A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element. The trench is positioned to impede a light path between the light emitting element and the light sensing element when the light path is internal to the semiconductor layer. | 08-15-2013 |
20130264688 | METHOD AND APPARATUS PROVIDING INTEGRATED CIRCUIT SYSTEM WITH INTERCONNECTED STACKED DEVICE WAFERS - An integrated circuit system includes a first device wafer that has a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer that has a second semiconductor layer proximate to a second metal layer including a second conductor disposed within a second metal layer oxide is also included. A frontside of the first metal layer oxide is bonded to a frontside of the second metal layer oxide at an oxide bonding interface between the first metal layer oxide and the second metal layer oxide. A conductive path couples the first conductor to the second conductor with conductive material formed in a cavity etched between the first conductor and the second conductor and etched through the oxide bonding interface and through the second semiconductor layer from a backside of the second device wafer. | 10-10-2013 |
20140014813 | INTEGRATED CIRCUIT STACK WITH INTEGRATED ELECTROMAGNETIC INTERFERENCE SHIELDING - An integrated circuit system includes a first device wafer having a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer having a second semiconductor layer proximate to a second metal layer including a second conductor is disposed within a second metal layer oxide. A frontside of the first device wafer is bonded to a frontside of the second device wafer at a bonding interface. A conductive path couples the first conductor to the second conductor through the bonding interface. A first metal EMI shield is disposed in one of the first metal oxide layer and second metal layer oxide layer. The first EMI shield is included in a metal layer of said one of the first metal oxide layer and the second metal layer oxide layer nearest to the bonding interface. | 01-16-2014 |
20140035089 | PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES - Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via. | 02-06-2014 |
20140048897 | PIXEL WITH NEGATIVELY-CHARGED SHALLOW TRENCH ISOLATION (STI) LINER - Embodiments of a pixel including a substrate having a front surface and a photosensitive region formed in or near the front surface of the substrate. An isolation trench is formed in the front surface of the substrate adjacent to the photosensitive region. The isolation trench includes a trench having a bottom and sidewalls, a passivation layer formed on the bottom and the sidewalls, and a filler to fill the portion of the trench not filled by the passivation layer. | 02-20-2014 |
20140124889 | DIE SEAL RING FOR INTEGRATED CIRCUIT SYSTEM WITH STACKED DEVICE WAFERS - An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer. | 05-08-2014 |
20140239351 | PROCESS TO ELIMINATE LAG IN PIXELS HAVING A PLASMA-DOPED PINNING LAYER - Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed. | 08-28-2014 |
20140306360 | METHOD OF FORMING DUAL SIZE MICROLENSES FOR IMAGE SENSORS - A method of forming microlenses for an image sensor having at least one large-area pixel and at least one small-area pixel is disclosed. The method includes forming a uniform layer of microlens material on a light incident side of the image sensor over the large-area pixel and over the small-area pixel. The method also includes forming the layer of microlens material into a first block disposed over the large-area pixel and into a second block disposed over the small-area pixel. A void is also formed in the second block to reduce a volume of microlens material included in the second block. The first and second blocks are then reflowed to form a respective first microlens and second microlens. The first microlens has substantially the same effective focal length as the second microlens. | 10-16-2014 |
20140312447 | LATERAL LIGHT SHIELD IN BACKSIDE ILLUMINATED IMAGING SENSORS - A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element. | 10-23-2014 |