Patent application number | Description | Published |
20090212385 | SEMICONDUCTOR DEVICE INCLUDING VANADIUM OXIDE SENSOR ELEMENT WITH RESTRICTED CURRENT DENSITY - In a semiconductor device including a semiconductor substrate and at least one sensor element made of vanadium oxide formed over the semiconductor substrate, the sensor element is designed so that a density of a current flowing through the sensor element is between 0 and 100 μA/μm2. | 08-27-2009 |
20100258874 | SEMICONDUCTOR DEVICE - A distance “a” from a first gate electrode of a first transistor of a high-frequency circuit to a first contact is greater than a distance “b” from a second electrode of a second transistor of a digital circuit to a second contact. The first contact is connected to a drain or source of the first transistor, and the second contact is connected to a drain or source of the second transistor. | 10-14-2010 |
20100265024 | SEMICONDUCTOR DEVICE - In a semiconductor device, a first semiconductor chip includes a first circuit and a first inductor, and a second semiconductor chip includes a second circuit and chip-side connecting terminals. An interconnect substrate is placed over the first semiconductor chip and the second semiconductor chip. The interconnect substrate includes a second inductor and substrate-side connecting terminals. The second inductor is located above the first inductor. The chip-side connecting terminals and the two substrate-side connecting terminals are connected through first solder balls. | 10-21-2010 |
20130099340 | SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THEREOF, SIGNAL TRANSMISSION/RECEPTION METHOD USING SUCH SEMICONDUCTOR DEVICE, AND TESTER APPARATUS - A semiconductor device includes a substrate, a bonding pad provided above the substrate, a first signal transmitting/receiving portion provided above the substrate and below the bonding pad, and a transistor provided over the substrate. The transistor is connected to the first signal transmitting/receiving portion. | 04-25-2013 |
20130327838 | INTERFACE IC AND MEMORY CARD INCLUDING THE SAME - A memory card includes a memory that stores data, a driver that transmits the data received from the memory, and at least one transmitter that transmits the data received from the driver to a receiver provided in an external main unit. The driver and the at least one transmitter are provided in a single IC (integrated circuit) chip and are not overlapped with each other in a planar view. | 12-12-2013 |
20140191363 | EXTERNAL STORAGE DEVICE AND METHOD OF MANUFACTURING EXTERNAL STORAGE DEVICE - An external storage device including an interconnect substrate having a contact type external terminal, at least one semiconductor chip disposed over a first surface of the interconnect substrate, and a sealing resin layer which seals the at least one semiconductor chip and does not cover the external terminal. The at least one semiconductor chip includes a storage device, an inductor being connected to the storage device, a driver circuit configured to control the inductor and an interconnect layer. The interconnect layer is formed at a first surface of the semiconductor chip and includes the inductor. The first surface of the semiconductor chip is other than facing the first surface of the interconnect substrate, and the inductor and the driver circuit are connected to each other through the interconnect layer. | 07-10-2014 |
20140246743 | SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THEREOF, SIGNAL TRANSMISSION/RECEPTION METHOD USING SUCH SEMICONDUCTOR DEVICE, AND TESTER APPARATUS - A semiconductor device includes a substrate, an internal circuit including a plurality of transistors provided over the substrate, an insulating film provided over the substrate, a bonding pad provided over the insulating film, an inductor being formed in the insulating film, the inductor carrying out a signal transmission/reception to/from an external device in a non-contact manner by an electromagnetic induction and being electrically coupled to the internal circuit. The inductor includes a first conducting layer, and the bonding pad includes a second conducting layer. The first conducting layer includes a lower level layer than the second conducting layer in a thickness direction of the substrate. Ina plan view, the inductor includes a first portion overlapping the bonding pad and a second portion not overlapping the bonding pad. | 09-04-2014 |
20140284709 | SEMICONDUCTOR DEVICE - A buried layer of a second conductivity type and a lower layer of a second conductivity type are formed in a drift layer. A boundary insulating film is formed in the boundary between the lateral portion of the buried layer of a second conductivity type and the drift layer. The lower layer of a second conductivity type is in contact with the lower end of the buried layer of a second conductivity type and the lower end of the boundary insulating film. The buried layer of a second conductivity type is electrically connected to a source electrode. A high-concentration layer of a second conductivity type is formed in the surface layer of the buried layer of a second conductivity type. | 09-25-2014 |
20140312440 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An object of the present invention is to suppress an error in the value detected by a pressure sensor, which may be caused when environmental temperature varies. A semiconductor substrate has a first conductivity type. A semiconductor layer is formed over a first surface of the semiconductor substrate. Each of resistance parts has a second conductivity type, and is formed in the semiconductor layer. The resistance parts are spaced apart from each other. A separation region is a region of the first conductivity type formed in the semiconductor layer, and electrically separates the resistance parts from each other. A depressed portion is formed in a second surface of the semiconductor substrate, and overlaps the resistance parts, when viewed planarly. The semiconductor layer is an epitaxial layer. | 10-23-2014 |
20140319691 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor chip having a multilayer interconnect, a first spiral inductor formed in the multilayer interconnect, and a second spiral inductor formed in the multilayer interconnect. The first spiral inductor and the second spiral inductor collectively include a line, the line being spirally wound in a first direction in the first spiral inductor toward outside of the first spiral inductor, and being spirally wound in a second direction in the second spiral inductor toward inside of the second spiral inductor. The first direction and the second direction are opposite directions. | 10-30-2014 |