Wu, Union City
Conghui Wu, Union City, CA US
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20120072783 | MECHANISM FOR FACILITATING EFFICIENT ERROR HANDLING IN A NETWORK ENVIRONMENT - In accordance with embodiments, there are provided methods and systems for facilitating efficient error handling in a network environment. A method of embodiments includes receiving a validation request having configuration parameters of error dialogs relating to errors, and validating the configuration parameters and the errors. The validating includes mapping each error with a corresponding dialog. The method further includes transmitting a validating report having results of validation of the configuration parameters and the errors. The validation report is used to assign an order to each error and its corresponding dialog. | 03-22-2012 |
Jen-Chieh Wu, Union City, CA US
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20150225646 | POROUS GELS AND USES THEREOF - Hydrogels having a porosity of at least about 5%, comprising a first polymeric material comprising a polymer derived from a monomer with a vinyl functionality, and a second polymeric material having a polyglycol other than polyethylene glycol are described. A method of forming a porous hydrogel, by mixing in a reaction vessel, a mixture comprising a monomer having a vinyl functionality, a crosslinker, an organic solvent, a first polymeric material comprising polyacrylic acid and a second polymeric material comprising a polyglycol other than polyethylene glycol, and mixing the mixture to form the hydrogel having a porosity of at least about 5%. Also described are an agricultural method and a system (a seed in a seed container). | 08-13-2015 |
Jin Wu, Union City, CA US
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20120310982 | SCALABLE, DISTRIBUTED CONTAINERIZATION ACROSS HOMOGENOUS AND HETEROGENEOUS DATA STORES - Provided are techniques for using containers to store objects. One data store from a set of data stores is assigned as a primary data store, wherein the remaining data stores comprise secondary data stores. A container for a group is created on the primary data store. A unique identifier for the container is generated on the primary data store. Metadata for the container is stored on the primary data store. Zero or more objects are stored in the container on the primary data store. For each of the secondary data stores that have objects belonging to the group, a container is created in that secondary data store having the unique identifier, wherein the container spans the primary data store and the secondary data stores, and wherein the objects in the container do not span the primary data store and the secondary data stores. | 12-06-2012 |
Juan Wu, Union City, CA US
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20100325124 | TUNING QUERY EXECUTION PERFORMANCE OF A DATABASE SYSTEM - Methods, systems, and computer program products for tuning query execution performance in a database management system are described. In an embodiment, query performance issues of chosen database operational logic in a database management system are identified with an external utility provided for use on top of the database management system. The identified query performance issues are resolved selectively in the database management system without modifying the chosen database operational logic. | 12-23-2010 |
20120158723 | Data Grid Advisor - A system and method to generate an improved layout of a data grid in a database environment is provided. The data grid is a clustered in-memory database cache comprising one or more data fabrics, where each data fabric includes multiple in-memory database cache nodes. A data grid advisor capability can be used by application developers and database administrators to evaluate and design the data grid layout so as to optimize performance based on resource constraints and the needs of particular database applications. | 06-21-2012 |
Zhi-Yuan Wu, Union City, CA US
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20100010798 | Modeling of variations in drain-induced barrier lowering (DIBL) - The present method is a method of modeling Drain-Induced Barrier Lowering (DIBL) in a transistor model, the transistor model being based on a MOSFET transistor. The transistor model includes a base, a source, a drain, a gate, and a gate terminal. In the present method, a voltage is applied to the gate terminal, a voltage is applied to the drain, and an electrical potential is applied between the gate terminal and gate. The magnitude of electrical potential applied between the gate terminal and gate is varied in proportion to the magnitude of voltage applied to the drain. | 01-14-2010 |
20120159419 | MODEL LIBRARY IMPLEMENTATION AND METHODOLOGY FOR WORST CASE PERFORMANCE MODELING FOR SRAM CELLS - Worst case performance of an SRAM cell may be simulated more accurately with less intensive computations. An embodiment includes determining, by a processor, a process corner G of an SRAM cell, having pull-down, pass-gate, and pull-up devices, process corner G being defined as the worst performance of the cell when only global variations of parameters of the SRAM cell are included, setting each of the pull-down, pass-gate, and pull-up devices at process corner G, performing, on the processor, a number of Monte Carlo simulations of the SRAM cell devices around process corner G with only local variations of the parameters, generating a normal probability distribution for I | 06-21-2012 |
20130030774 | Modeling Gate Transconductance in a Sub-Circuit Transistor Model - A method for modeling a transistor includes providing a transistor model having at least a source node, a drain node, and a gate node, simulating operation of a device using the transistor model in a computing apparatus, and generating an offset voltage at the gate node depending on a magnitude of a current passing through the device. | 01-31-2013 |
20130311963 | SUB-CIRCUIT MODELS WITH CORNER INSTANCES FOR VLSI DESIGNS - An approach for providing sub-circuit models with corner instances for VLSI designs is disclosed. Embodiments include: determining a circuit design that includes a plurality of sub-circuit models having a plurality of characteristics; and associating, by a processor, a sub-circuit model of the plurality of sub-circuit models with a corner instance value, and another sub-circuit model of the plurality of sub-circuit models with another corner instance value. Other embodiments include analyzing, by the processor, the circuit design according to the corner instance value and the other corner instance value. | 11-21-2013 |