Patent application number | Description | Published |
20100191900 | NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A nonvolatile memory device includes memory chips driven in response to respective chip enable signals, and each of the memory chips includes a controller configured to generate and output information about an operation state, and a state information processor configured to calculate an expected consumption current when a target operation is performed based on the information about the operation states for the memory chips, and to output a control signal regarding whether to suspend or perform the target operation. | 07-29-2010 |
20120008425 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device includes a memory cell array including a plurality of memory cells, circuits configured to receive program data when a program operation is performed and output a random signal in response to the program data, and a page buffer configured to logically combine the program data and the random signal and to store the logically combined data in the memory cells. | 01-12-2012 |
20120221904 | NONVOLATILE MEMORY DEVICE AND METHOD FOR OPERATING THE SAME - A nonvolatile memory device includes a first storage unit configured to store a plurality of first fault address information provided in a first test operation, a second storage unit configured to store a plurality of second fault address information provided in a second test operation which is performed later than the first test operation; a redundancy operation unit configured to, in performing a redundancy operation, determine the number of operation circuits corresponding to the first fault address information and the number of operation circuits corresponding to the second fault address information among a plurality of redundancy operation circuits based on address number information; and an address providing unit configured to read the plurality of first fault address information and the plurality of second fault address information, and sequentially provide the read information to the redundancy operation unit, wherein the address providing unit is further configured to detect the number of the first fault address information and generate the address number information. | 08-30-2012 |
20130083619 | SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor device includes a first operation circuit configured to generate addition data by adding a column address and a page address and output a remainder obtained by dividing the addition data by a set value as seed data, a mask data output circuit configured to output mask data corresponding to the respective seed data, and a second operation circuit configured to generate random data by performing a logic operation on the mask data and program data corresponding to the column and page addresses. | 04-04-2013 |