Patent application number | Description | Published |
20080237803 | SEMICONDUCTOR DEVICE HAVING STRUCTURE WITH FRACTIONAL DIMENSION OF THE MINIMUM DIMENSION OF A LITHOGRAPHY SYSTEM - A method for forming a semiconductor device is provided including processing a wafer having a spacer layer and a structure layer, the spacer layer is over the structure layer. The method continues including forming a first sidewall spacer from the spacer layer, forming a structure strip from the structure layer below the first sidewall spacer, forming a masking structure over and intersecting the structure strip, and forming a vertical post from the structure strip below the masking structure. | 10-02-2008 |
20080241574 | SEMICONDUCTOR DEVICE HAVING STRUCTURE WITH SUB-LITHOGRAPHY DIMENSIONS - A method for forming a semiconductor device is provided including processing a wafer having a first layer and a second layer, the second layer is over the first layer, forming a vertical post from a sidewall spacer formed from the second layer, forming a filler over the first layer and surrounding the vertical post, and forming a device layer having a hole by removing the vertical post in the filler. | 10-02-2008 |
20130309847 | METHODS OF FORMING FINFET DEVICES WITH ALTERNATIVE CHANNEL MATERIALS - One illustrative method disclosed herein involves performing a first etching process through a patterned hard mask layer to define a plurality of spaced-apart trenches in a substrate that defines a first portion of a fin for the device, forming a layer of insulating material in the trenches and performing a planarization process on the layer of insulating material to expose the patterned hard, performing a second etching process to remove the hard mask layer and to define a cavity within the layer of insulating material, forming a second portion of the fin within the cavity, wherein the second portion of the fin is comprised of a semiconducting material that is different than the substrate, and performing a third etching process on the layer of insulating material such that an upper surface of the insulating material is below an upper surface of the second portion of the fin. | 11-21-2013 |
20140070322 | METHODS OF FORMING DIFFERENT FINFET DEVICES WITH DIFFERENT THRESHOLD VOLTAGES AND INTEGRATED CIRCUIT PRODUCTS CONTAINING SUCH DEVICES - One illustrative method disclosed herein involves forming a first fin for a first FinFET device in and above a semiconducting substrate, wherein the first fin is comprised of a first semiconductor material that is different from the material of the semiconducting substrate and, after forming the first fin, forming a second fin for a second FinFET device that is formed in and above the semiconducting substrate, wherein the second fin is comprised of a second semiconductor material that is different from the material of the semiconducting substrate and different from the first semiconductor material. | 03-13-2014 |
20140264488 | METHODS OF FORMING LOW DEFECT REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE AND THE RESULTING DEVICES - One illustrative device disclosed herein includes a substrate fin formed in a substrate comprised of a first semiconductor material, wherein at least a sidewall of the substrate fin is positioned substantially in a <100> crystallographic direction of the crystalline structure of the substrate, a replacement fin structure positioned above the substrate fin, wherein the replacement fin structure is comprised of a semiconductor material that is different from the first semiconductor material, and a gate structure positioned around at least a portion of the replacement fin structure. | 09-18-2014 |
20150024573 | METHODS OF FORMING REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS - Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 10 | 01-22-2015 |
20150255542 | METHODS OF FORMING STRESSED CHANNEL REGIONS FOR A FINFET SEMICONDUCTOR DEVICE AND THE RESULTING DEVICE - One method disclosed includes, among other things, covering the top surface and a portion of the sidewalls of an initial fin structure with etch stop material, forming a sacrificial gate structure around the initial fin structure, forming a sidewall spacer adjacent the sacrificial gate structure, removing the sacrificial gate structure, with the etch stop material in position, to thereby define a replacement gate cavity, performing at least one etching process through the replacement gate cavity to remove a portion of the semiconductor substrate material of the fin structure positioned under the replacement gate cavity that is not covered by the etch stop material so as to thereby define a final fin structure and a channel cavity positioned below the final fin structure and substantially filling the channel cavity with a stressed material. | 09-10-2015 |
20150255608 | METHODS OF FORMING STRESSED CHANNEL REGIONS FOR A FINFET SEMICONDUCTOR DEVICE AND THE RESULTING DEVICE - One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material. | 09-10-2015 |