Patent application number | Description | Published |
20100005249 | Finding the Source Statement of the Definition of a Storage Location - In an embodiment, an identifier of a storage location that is accessed by a program is received. While execution of the program is halted at a halted statement, a first source statement is determined that must have stored to the storage location. The program comprises the halted statement and the first source statement, and the halted statement is different than the first source statement. The first source statement is presented, in response to the determination. In an embodiment, while execution of the program is halted at the halted statement, a second source statement is determined that might have stored to the storage location, and the second source statement is presented. | 01-07-2010 |
20120198427 | Ensuring Register Availability for Dynamic Binary Optimization - A compiler compiles code in a target program by reserving at least one register for use by a dynamic binary optimizer during target program execution. When the target program is subsequently executed, the dynamic binary optimizer stores needed state information in the reserved register(s), without affecting register state of the target program. Preferably, the state information in the reserved register(s) includes addressing information for a context save area, used for saving processor state when switching context from the target program to the dynamic binary optimizer. | 08-02-2012 |
20120198428 | Using Aliasing Information for Dynamic Binary Optimization - A compiler compiles code in a target program for later execution with a dynamic binary optimizer by including aliasing information with the compiled code. When the program is subsequently executed, the dynamic binary optimizer accesses the aliasing information to determine whether certain optimizations can be safely performed. Preferably, the aliasing information includes a memory reference index assigning an index to each memory reference instruction and a may-alias bit matrix indicating, for each memory reference instruction, which other memory reference instructions might reference the same memory location. Aliasing information is preferably used by the optimizer during execution to safely re-order operations. | 08-02-2012 |
20140007062 | STRENGTH REDUCTION COMPILER OPTIMIZATIONS FOR OPERATIONS WITH UNKNOWN STRIDES | 01-02-2014 |
20140007063 | STRENGTH REDUCTION COMPILER OPTIMIZATIONS FOR CONDITIONAL OPERATIONS | 01-02-2014 |
20140007064 | STRENGTH REDUCTION COMPILER OPTIMIZATIONS FOR OPERATIONS WITH UNKNOWN STRIDES | 01-02-2014 |
20140007065 | STRENGTH REDUCTION COMPILER OPTIMIZATIONS FOR CONDITIONAL OPERATIONS | 01-02-2014 |
20140237217 | VECTORIZATION IN AN OPTIMIZING COMPILER - An optimizing compiler includes a vectorization mechanism that optimizes a computer program by substituting code that includes one or more vector instructions (vectorized code) for one or more scalar instructions. The cost of the vectorized code is compared to the cost of the code with only scalar instructions. When the cost of the vectorized code is less than the cost of the code with only scalar instructions, the vectorization mechanism determines whether the vectorized code will likely result in processor stalls. If not, the vectorization mechanism substitutes the vectorized code for the code with only scalar instructions. When the vectorized code will likely result in processor stalls, the vectorization mechanism does not substitute the vectorized code, and the code with only scalar instructions remains in the computer program. | 08-21-2014 |
20140237460 | VECTORIZATION IN AN OPTIMIZING COMPILER - An optimizing compiler includes a vectorization mechanism that optimizes a computer program by substituting code that includes one or more vector instructions (vectorized code) for one or more scalar instructions. The cost of the vectorized code is compared to the cost of the code with only scalar instructions. When the cost of the vectorized code is less than the cost of the code with only scalar instructions, the vectorization mechanism determines whether the vectorized code will likely result in processor stalls. If not, the vectorization mechanism substitutes the vectorized code for the code with only scalar instructions. When the vectorized code will likely result in processor stalls, the vectorization mechanism does not substitute the vectorized code, and the code with only scalar instructions remains in the computer program. | 08-21-2014 |