Wei-Sung
Wei-Sung Chang, Pingjhen City TW
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20110241789 | INTEGRATED CIRCUIT CAPABLE OF REPEATEDLY USING CURRENT - The invention relates to an integrated circuit capable of repeatedly using current, the integrated circuit comprises: a first differential input, a first cross couple pair, a second differential input, a second cross couple pair, and a voltage-controlled oscillator, wherein a divider consists of the first differential input, the first cross couple pair, the second differential input, and the second cross couple pair, moreover, through the connection of the first differential input, the first cross couple pair, the second differential input, and the second cross couple pair, the divider and the voltage-controlled oscillator may be drove by only one single current, so that the circuit area, the power consumption, and the phase noise of the integrated circuit are simultaneously reduced. | 10-06-2011 |
Wei-Sung Chen, Xlndian City TW
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20110104028 | INTEGRAL-TYPE REACTION CARTRIDGE - An integral-type reaction cartridge includes a plurality of reaction containers and at least a separation container. The plural reaction containers and the separation container are integrally formed of plastic and lined along a first direction. The separation container has a first end, a second end opposing the first end, and a hollow accommodating space between the first and second ends, wherein the first end is an open end, the second end is a closed end, and the accommodating space tapers from the first end to the second end. The accommodating space has a first side and a second side along the first direction, as well as a third side and a fourth side along a second direction perpendicular to the first direction. Near the second end, at least one of the first side and the second side has a greater slope than the third side and the fourth side. | 05-05-2011 |
Wei-Sung Chen, Hsinchu County TW
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20130016567 | NON-VOLTOLE MEMORY CELL AND METHODS FOR PROGRAMMING, ERASING AND READING THEREOFAANM CHANG; Chia-ChuanAACI Miaoli CountyAACO TWAAGP CHANG; Chia-Chuan Miaoli County TWAANM Chen; Wei-SungAACI Hsinchu CountyAACO TWAAGP Chen; Wei-Sung Hsinchu County TWAANM Wu; Chung-HoAACI Hsinchu CityAACO TWAAGP Wu; Chung-Ho Hsinchu City TW - A non-volatile memory cell and methods for programming, erasing and reading thereof are provided. A non-volatile memory cell includes a substrate having a first conductive type. A first transistor, a second transistor and a select transistor having a second conductive type are disposed in the substrate, wherein a first gate of the first transistor is coupled to a second gate of the second transistor. A source region of the first transistor is coupled to a bit line. A drain region of the second transistor and a gate of the select transistor are coupled to a select gate line. A drain region of the first transistor is coupled to a source region of the select transistor. A drain region of the select transistor is coupled to a select line. A bit is stored in the first and second gates by controlling the bit line and the select gate line. A bit stored in the first and second gates is erased by controlling the bit line and the select gate line. | 01-17-2013 |
20130016568 | NON-VOLTOLE MEMORY CELL AND METHODS FOR PROGRAMMING, ERASING AND READING THEREOFAANM CHANG; Chia-ChuanAACI Miaoli CountyAACO TWAAGP CHANG; Chia-Chuan Miaoli County TWAANM Chen; Wei-SungAACI Hsinchu CountyAACO TWAAGP Chen; Wei-Sung Hsinchu County TWAANM Wu; Chung-HoAACI Hsinchu CityAACO TWAAGP Wu; Chung-Ho Hsinchu City TW - A non-volatile memory cell and methods for programming, erasing and reading thereof are provided. A non-volatile memory cell includes a well region having a first conductive type. A first transistor and a second transistor having a second conductive type are disposed on the well region, wherein a first gate of the first transistor is coupled to a second gate of the second transistor. The first transistor and the second transistor share a drain region, coupling to a bit line. A first source region of the first transistor and a second region of the second transistor are coupled to a first select line and a second line, respectively. A bit is stored in the first and second gates by controlling the first select line and the second line. A bit stored in the first and second gates is erased by controlling the first select line or the second line. | 01-17-2013 |
Wei-Sung Huang, Taipei TW
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20100035463 | ELECTRONIC DEVICE WITH STRETCHABLE USB RECEPTACLE - An electronic device having a stretchable USB receptacle is provided. An extending connecting cable is added to the USB receptacle on the electronic device. In normal condition, the connecting cable is accommodated in a cable reel to make the USB receptacle accommodated in an accommodating recess of the electronic device to keep consistency of the appearance. In using condition, the USB receptacle may be taken out and used in a needed place by drawing out the connecting cable. This overcomes the disadvantage that the conventional adjacent USB receptacles may be interfered with each other, and the scope of use also increases. | 02-11-2010 |