Patent application number | Description | Published |
20110215465 | MULTI-CHIP INTEGRATED CIRCUIT - An integrated circuit (IC) combines a first IC chip (die) having a first on-chip interconnect structure and a second IC chip having a second on-chip interconnect structure on a reconstructed wafer base. The second IC chip is edge-bonded to the first IC chip with oxide-to-oxide edge bonding. A chip-to-chip interconnect structure electrically couples the first IC chip and the second IC chip. | 09-08-2011 |
20120220068 | Method to Form a Device by Constructing a Support Element on a Thin Semiconductor Lamina - A semiconductor assembly is described in which a support element is constructed on a surface of a semiconductor lamina. Following formation of the thin lamina, which may have a thickness about 50 microns or less, the support element is formed, for example by plating, or by application of a precursor and curing in situ, resulting in a support element which may be, for example, metal, ceramic, polymer, etc. This is in contrast to pre-formed support element which is affixed to the lamina following its formation, or to a donor wafer from which the lamina is subsequently cleaved. | 08-30-2012 |
20120258561 | Low-Temperature Method for Forming Amorphous Semiconductor Layers - In embodiments of the present invention an undoped amorphous, nanocrystalline or microcrystalline semiconductor layer and a heavily doped amorphous, nanocrystalline, or microcrystalline semiconductor layer are formed on a monocrystalline silicon lamina. The lamina is the base region of a photovoltaic cell, while the amorphous, nanocrystalline or monocrystalline layers serve to passivate the surface of the lamina, reducing recombination at this surface. In embodiments, the heavily doped layer additionally serves as either the emitter of the cell or to provide electrical contact to the base layer. The undoped and heavily doped layers are deposited at low temperature, for example about 150 degrees C. or less with hydrogen dilution. This low temperature allows use of low-temperature materials and methods, while increased hydrogen dilution improves film quality and/or conductivity. | 10-11-2012 |
20130199611 | Method for Forming Flexible Solar Cells - The invention provides for a semiconductor wafer with a metal support element suitable for the formation of a flexible or sag tolerant photovoltaic cell. A method for forming a photovoltaic cell may comprise providing a semiconductor wafer have a thickness greater than 150 μm, the wafer having a first surface and a second surface opposite the first and etching the semiconductor wafer a first time so that the first etching reduces the thickness of the semiconductor wafer to less than 150 μm. After the wafer has been etched a first time, a metal support element may be constructed on or over the first surface; and a photovoltaic cell may be fabricated, wherein the semiconductor wafer comprises the base of the photovoltaic cell. | 08-08-2013 |
20130200496 | MULTI-LAYER METAL SUPPORT - The invention provides a method of forming an electronic device from a lamina that has a coefficient of thermal expansion that is matched or nearly matched to a constructed metal support. In some embodiments the method comprises implanting the top surface of a donor body with an ion dosage to form a cleave plane followed by exfoliating a lamina from the donor body. After exfoliating the lamina, a flexible metal support that has a coefficient of thermal expansion with a value that is within 10% of the value of the coefficient of thermal expansion of the lamina is constructed on the lamina. In some embodiments the coefficients of thermal expansion of the metal support and the lamina are within 10% or within 5% of each other between the temperatures of 100 and 600 ° C. | 08-08-2013 |
20130200497 | MULTI-LAYER METAL SUPPORT - The invention provides a method of forming an electronic device from a lamina that has a coefficient of thermal expansion that is matched or nearly matched to a constructed metal support. In some embodiments the method comprises implanting the top surface of a donor body with an ion dosage to form a cleave plane followed by exfoliating a lamina from the donor body. After exfoliating the lamina, a flexible metal support that has a coefficient of thermal expansion with a value that is within 10% of the value of the coefficient of thermal expansion of the lamina is constructed on the lamina. In some embodiments the coefficients of thermal expansion of the metal support and the lamina are within 10% or within 5% of each other between the temperatures of 500 and 1050° C. | 08-08-2013 |
20130203205 | Method for Fabricating Backside-Illuminated Sensors - A method for fabricating a backside-illuminated sensor includes providing a thin film semiconductor lamina having a first conductivity, and forming a doped region having a second conductivity within the lamina and at a front surface of the lamina. The lamina may be provided as a free-standing lamina, or may be provided as a semiconductor donor body from which the lamina is cleaved. An electrical connection is formed to the doped region. A temporary carrier is contacted to the back surface of the semiconductor and later removed. A backside-illuminated sensor is fabricated from the semiconductor lamina, in which the thickness of the semiconductor lamina remains substantially unchanged during the fabrication process. | 08-08-2013 |
20130203251 | Method for Three-Dimensional Packaging of Electronic Devices - An interposer is fabricated from a lamina. A donor body is provided, ions are implanted into a first surface of the donor body to define a cleave plane, a temporary carrier is separably contacted to the donor body, and the lamina is cleaved from the donor body. The lamina has front surface and a back surface, with a thickness from the front surface to the back surface. A via hole is formed in the lamina, where the via hole extends through the thickness of the lamina. The temporary carrier is removed from the lamina, and the lamina may be fabricated into an interposer for three-dimensional integrated circuit packages. | 08-08-2013 |
20130330871 | METHODS FOR TEXTURING A SEMICONDUCTOR MATERIAL - A method for modifying the texture of a semiconductor material is provided. The method includes performing a first texture step comprising reactive ion etching to a first surface of semiconductor material. After the first texture step, the first surface of the semiconductor material has a random texture comprising a plurality of peaks and a plurality of valleys, and wherein at least fifty percent of the first surface has a peak-to-valley height of less than one micron and an average peak-to-peak distance of less than one micron. Additional texture steps comprising wet etch or RIE etching may be optionally applied. | 12-12-2013 |
20140030836 | Silicon Carbide Lamina - A method of fabricating an electronic device includes providing a silicon carbide or diamond-like carbon donor body and implanting ions into a first surface of the donor body to define a cleave plane. After implanting, an epitaxial layer is formed on the first surface, and a temporary carrier is coupled to the epitaxial layer. A lamina is cleaved from the donor body at the cleave plane, and the temporary carrier is removed from the lamina. In some embodiments a light emitting diode or a high electron mobility transistor is fabricated from the lamina and epitaxial layer. | 01-30-2014 |
20140261654 | FREE-STANDING METALLIC ARTICLE FOR SEMICONDUCTORS - A free-standing metallic article, and method of making, is disclosed in which the metallic article is electroformed on an electrically conductive mandrel. The mandrel has an outer surface with a preformed pattern, wherein at least a portion of the metallic article is formed in the preformed pattern. The metallic article is separated from the electrically conductive mandrel, which forms a free-standing metallic article that may be coupled with the surface of a semiconductor material for a photovoltaic cell. | 09-18-2014 |
20140261659 | Free-Standing Metallic Article for Semiconductors - A free-standing metallic article, and method of making, is disclosed in which the metallic article is electroformed on an electrically conductive mandrel. The mandrel has an outer surface with a preformed pattern, wherein at least a portion of the metallic article is formed in the preformed pattern. The metallic article is separated from the electrically conductive mandrel, which forms a free-standing metallic article that may be coupled with the surface of a semiconductor material for a photovoltaic cell. | 09-18-2014 |
20140261661 | FREE-STANDING METALLIC ARTICLE WITH OVERPLATING - A free-standing metallic article, and method of making, is disclosed in which the metallic article is electroformed on an electrically conductive mandrel. The mandrel has an outer surface layer having a preformed pattern. The outer surface layer has a dielectric region and an exposed metal region. The metallic article has a plurality of electroformed elements that are formed on the exposed metal region of the outer surface layer of the electrically conductive mandrel. A first electroformed element has an overplated portion formed above the outer surface layer of the mandrel. The metallic article is configured to serve as an electrical conduit for a photovoltaic cell, and forms a unitary, free-standing piece when separated from the electrically conductive mandrel. | 09-18-2014 |
20140262793 | ADAPTABLE FREE-STANDING METALLIC ARTICLE FOR SEMICONDUCTORS - A free-standing metallic article, and method of making, is disclosed in which the metallic article is electroformed on an electrically conductive mandrel. The metallic article has a plurality of electroformed elements that are configured to serve as an electrical conduit for a photovoltaic cell. A first electroformed element has at least one of: a) a non-uniform width along a first length of the first element, b) a change in conduit direction along the first length of the first element, c) an expansion segment along the first length of the first element, d) a first width that is different from a second width of a second element in the plurality of electroformed elements, e) a first height that is different from a second height of the second element in the plurality of electroformed elements, and f) a top surface that is textured. | 09-18-2014 |
20150037537 | METHOD OF REDUCING THE THICKNESS OF A SAPPHIRE LAYER - A method of removing material from a sapphire article is described. In particular, the method comprises the step of providing an initial sapphire layer and reducing the thickness of the layer while not significantly increasing the surface roughness of the layer. Cover plates for electronic device and methods of preparing them are also disclosed, along with a method of analyzing a sapphire article produced by the present method. | 02-05-2015 |
20150037897 | METHOD OF ANALYZING A SAPPHIRE ARTICLE - A method of removing material from a sapphire article is described. In particular, the method comprises the step of providing an initial sapphire layer and reducing the thickness of the layer while not significantly increasing the surface roughness of the layer, Cover plates for electronic device and methods of preparing them are also disclosed, along with a method of analyzing a sapphire article produced by the present method. | 02-05-2015 |