Patent application number | Description | Published |
20090241242 | FACIAL MASK - The present invention features a facial mask comprising a water-insoluble substrate sized and shaped to lie against and substantially coincident with a face of a human user. The water-insoluble substrate includes separation features that form laterally-extending tabs capable of overlapping the facial mask, improving its adaptability and fit. Methods of treating the skin using facial masks are also provided. | 10-01-2009 |
20100228204 | FACIAL TREATMENT MASK COMPRISING AN ISOLATION LAYER - The present invention features a facial mask including a water-insoluble, liquid-retaining layer sized and shaped to lie against and substantially coincident with a face of a human user and having at least one opening formed therethrough. The facial mask also includes an isolation layer substantially overlapping the water-insoluble, liquid-retaining layer. The isolation layer is readily separable from said water-insoluble, liquid-retaining layer. At least one opening in the water-insoluble, liquid-retaining layer is unobstructed by the isolation layer. | 09-09-2010 |
20120073030 | FACIAL MASK - The present invention features a facial mask comprising a water-insoluble substrate sized and shaped to lie against and substantially coincident with a face of a human user. The water-insoluble substrate includes separation features that form laterally-extending tabs capable of overlapping the facial mask, improving its adaptability and fit. Methods of treating the skin using facial masks are also provided. | 03-29-2012 |
Patent application number | Description | Published |
20100323514 | RESTORATION METHOD USING METAL FOR BETTER CD CONTROLLABILITY AND CU FILING - Methods of making interconnect structures are provided. In one aspect of the innovation, when forming a trench or via in a dielectric layer, the sidewall surface of another via and/or trench is covered with a metal oxide layer. The metal oxide layer can prevent and/or mitigate surface erosion of the sidewall surface. As a result, the methods can improve the controllability of critical dimensions of the via and trench. | 12-23-2010 |
20120045898 | Ru CAP METAL POST CLEANING METHOD AND CLEANING CHEMICAL - According to certain embodiments, Ru is removed from the surface of a semiconductor structure by contact with a cleaning solution comprising one or more selected from permanganate ion, orthoperiodic ion and hypochlorous ion, such that Ru is removed from surfaces of the semiconductor substrate where the presence of Ru is undesirable. In some embodiments, a semiconductor structure is formed or provided having at least one metalized layer formed over an underlying layering or semiconductor substrate. The metalized layer contains a dielectric material with one or more metal wires of copper-containing material formed in a trench and/or via in the dielectric material. A cap layer having Ru is formed on the surface of the copper-containing material forming the one or more metal wires. The semiconductor structure is contacted with the cleaning solution comprising one or more selected from permanganate ion, orthoperiodic ion and hypochlorous ion to remove a portion of the Ru present in the semiconductor structure. | 02-23-2012 |
20120133044 | METAL CONTAINING SACRIFICE MATERIAL AND METHOD OF DAMASCENE WIRING FORMATION - According to one embodiment, a via and trench are formed in a semiconductor structure. The via and the trench are suitable for having a metal-based wire placed therein by damascene, dual damascene, plating and other suitable techniques. The via is etched into a dielectric layer of a semiconductor structure comprising a base cap layer, the dielectric layer formed over the base cap layer, and a hardmask formed over the dielectric layer. The via is filled with a sacrifice material, where the sacrifice material contains a metal or a metal compound, where the sacrifice material additionally forms a sacrifice layer over the hardmask layer. The sacrifice material placed in the via does not contain a material or film containing a Si—O bond. The sacrifice material is used as a support for a photomask that is placed over the sacrifice layer, where the photomask is developed to have a trench pattern formed therein. Then, one or more of the hardmask layer and the dielectric layer is etched with the trench pattern, and the sacrifice material and the sacrifice layer are removed by contact with a remover solution containing one or more selected from an acidic compound, water, a base compound, and an oxidant. | 05-31-2012 |
20120139033 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Semiconductors devices and methods of making semiconductor devices are provided. According to one embodiment, a semiconductor device can include a p-type field effect transistor area having an active region with an epitaxial layer grown thereupon and an isolation feature adjacent to the active region. A height of the isolation feature equals or exceeds a height of an interface between the epitaxial layer and the active region. More particularly, a height of the isolation feature in the corner of a junction between the isolation feature and the action region equals or exceeds the height to the interface between the epitaxial layer and the active region. | 06-07-2012 |
20120241963 | SELF-ALIGNED SILICIDE FORMATION ON SOURCE/DRAIN THROUGH CONTACT VIA - According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process. | 09-27-2012 |
20120244690 | ION IMPLANTED RESIST STRIP WITH SUPERACID - According to certain embodiments, a resist is placed over the surface of a semiconductor structure, wherein the resist covers a portion of the semiconductor structure. Dopants are implanted into the semiconductor structure using an ion implantation beam in regions of the semiconductor structure not covered by the resist. Due to exposure to the ion implantation beam, at least a portion of the resist is converted by exposure to the ion beam to contain an inorganic carbonized material. The semiconductor structure with resist is contacted with a superacid composition containing a superacid species to remove the resist containing inorganic carbonized materials from the semiconductor structure. | 09-27-2012 |
20130092988 | SELF-ALIGNED SILICIDE FORMATION ON SOURCE/DRAIN THROUGH CONTACT VIA - According to certain embodiments, a silicide layer is formed after the fabrication of a functional gate electrode using a gate-last scheme. An initial semiconductor structure has at least one impurity regions formed on a semiconductor substrate, a sacrifice film formed over the impurity region, an isolation layer formed over the sacrifice film and a dielectric layer formed over the isolation film. A via is patterned into the dielectric layer of the initial semiconductor structure and through the thickness of the isolation layer such that a contact opening is formed in the isolation layer. The sacrifice film underlying the isolation layer is then removed leaving a void space underlying the isolation layer. Then, a metal silicide precursor is placed within the void space, and the metal silicide precursor is converted to a silicide layer through an annealing process. | 04-18-2013 |