Patent application number | Description | Published |
20090278611 | Integrated ramp, sweep fractional frequency synthesizer on an integrated circuit chip - An integrated ramp, sweep fractional frequency synthesizer system on an integrated circuit chip includes an integrated circuit chip having a fractional frequency synthesizer with a fractional divider responsive to a VCO and a ΔΣ modulator for modifying the divisor of the fractional divider; and a ramp generator on the same integrated circuit chip; the ramp generator being responsive to a trigger signal to generate a ramp for sweeping the frequency of said fractional frequency synthesizer. | 11-12-2009 |
20090278618 | System and method for cycle slip prevention in a frequency synthesizer - An improved method of cycle slip prevention in a frequency synthesizer is achieved by determining phase error between a divided VCO and reference, determining whether a phase error of a full cycle slip has occurred and in which direction and altering the phase of the VCO divided signal in the amount and direction to reduce the phase error to less than one reference cycle. The result is an improved transfer function of the PFD, proportional to the phase error in the region −2*pi to 2*pi, and fixed close to maximum when the phase error exceeds the above interval. This invention is achieved with the addition of digital circuitry to monitor and control the PFD and the VCO divider, and does not require additional analog charge pump circuitry. | 11-12-2009 |
20120033758 | SYSTEMS AND METHODS FOR CONTROLLING LOCAL OSCILLATOR FEED-THROUGH - A method for controlling local oscillator (LO) feed-through in a direct transmitter includes detecting a signal level corresponding to LO feed-through in a radio frequency (RF) signal that is output by a direct transmitter. Responsive to detecting the signal level corresponding to LO feed-through, DC offset levels are modified for an in-phase (I) signal and/or a quadrature-phase (Q) signal in the direct transmitter. | 02-09-2012 |
20130342017 | PHOTOVOLTAIC SYSTEM MAXIMUM POWER POINT TRACKING - Photovoltaic system maximum power point tracking methods and apparatus are disclosed. Output power samples from one or more photovoltaic (PV) cells are obtained. The output power samples include perturbed samples for which a perturbation is applied to an operating voltage or current of the PV cell(s) and non-perturbed samples for which no perturbation is applied to the operating voltage or current. A control output, to change the operating voltage or current of the PV cell(s) for a next perturbed sample by a next perturbation, is generated. The next perturbation could be based on an estimated change in output power due to a previous perturbation. The next perturbation could also or instead be in a direction based on a change in output power samples, and of a magnitude based on the direction and a direction of perturbations applied for one or more perturbed samples preceding the next perturbed sample. | 12-26-2013 |
20140265603 | STRING CONTINUITY MONITORING - A system and method of monitoring a photovoltaic (PV) installation includes providing a string of multiple panel interface device enabled PV panels; operatively connecting an inverter to the string; operatively connecting at least one PV panel to the string; discharging an input capacitance of the inverter; comparing a current in the string to a predetermined current threshold value; and controlling connection of the at least one PV panel to the string based on the comparing of the current in the string to the predetermined current threshold value. A panel interface device may be used to discharge the input capacitance of the inverter. | 09-18-2014 |
20140320173 | FRACTIONAL PHASE LOCKED LOOP HAVING AN EXACT OUTPUT FREQUENCY AND PHASE AND METHOD OF USING THE SAME - A fractional-N frequency synthesizer having an exact output frequency and phase includes a phase locked loop including a phase detector responsive to a reference signal and a fractional divider. The phase locked loop has an output signal whose frequency is a fractional multiple of the input reference signal. The synthesizer also includes a modulator having a modulus for providing an output to the fractional divider, in which the modulus multiplied by the ratio of the frequency of the output signal to the frequency of the reference signal is a non-integer number. | 10-30-2014 |
20150016153 | PULSE MODE ACTIVE CLAMPING - An active clamp circuit includes a clamp capacitance and a clamp switch coupled in a circuit path, and a diode coupled across the clamp switch. | 01-15-2015 |
20150036395 | INTERNAL INVERTER COMMUNICATIONS - Inverter internal communication features are disclosed. A multiple-stage inverter includes DC to DC and DC to AC converter switches in different power domains, which share no common return path connection. Operating parameters for converter switches in both power domains are determined by a single controller, located in one of the power domains. Converter control signals are communicated from the controller across an interface between the power domains. Respective, separate controllers in each power domain are not required. Components on each side of the interface could be integrated into respective integrated circuits. A planar transformer implemented in wiring levels of a Printed Circuit Board (PCB) that carries components of the inverter could be provided to enable communications between the power domains while reducing component count and physical space requirements. | 02-05-2015 |