Patent application number | Description | Published |
20100090240 | PHOTOELECTROCHEMICAL ETCHING FOR CHIP SHAPING OF LIGHT EMITTING DIODES - A photoelectrochemical (PEC) etch is performed for chip shaping of a device comprised of a III-V semiconductor material, in order to extract light emitted into guided modes trapped in the III-V semiconductor material. The chip shaping involves varying an angle of incident light during the PEC etch to control an angle of the resulting sidewalls of the III-V semiconductor material. The sidewalls may be sloped as well as vertical, in order to scatter the guided modes out of the III-V semiconductor material rather than reflecting the guided modes back into the III-V semiconductor material. In addition to shaping the chip in order to extract light emitted into guided modes, the chip may be shaped to act as a lens, to focus its output light, or to direct its output light in a particular way. | 04-15-2010 |
20120018853 | PHOTOELECTROCHEMICAL ETCHING OF P-TYPE SEMICONDUCTOR HETEROSTRUCTURES - A method for photoelectrochemical (PEC) etching of a p-type semiconductor layer simply and efficiently, by providing a driving force for holes to move towards a surface of a p-type cap layer to be etched, wherein the p-type cap layer is on a heterostructure and the heterostructure provides the driving force from an internal bias generated internally in the heterostructure; generating electron-hole pairs in a separate area of the heterostructure than the surface to be etched; and using an etchant solution to etch the surface of the p-type layer. | 01-26-2012 |
20120192939 | HETEROJUNCTION WIRE ARRAY SOLAR CELLS - This disclosure relates to structures for the conversion of light into energy. More specifically, the disclosure describes devices for conversion of light to electricity using ordered arrays of semiconductor wires coated in a wider band-gap material. | 08-02-2012 |
Patent application number | Description | Published |
20090291873 | Method and Composition for Post-CMP Cleaning of Copper Interconnects Comprising Noble Metal Barrier Layers - A composition and method comprising same for the post-chemical mechanical planarization (CMP) of substrates comprising copper and a noble metal, such as but not limited to, ruthenium is described herein wherein the composition controls and/or minimizes the corrosion of copper during the cleaning process. In one aspect, the composition comprises a compound comprising at least one group chosen from an amino acid group, a betaine group, and combinations thereof; optionally a pH modifier chosen from an organic acid, an organic base, or combinations thereof; optionally a surfactant; and optionally a chelating agent. | 11-26-2009 |
20100009517 | Process for Inhibiting Corrosion and Removing Contaminant from a Surface During Wafer Dicing and Composition Useful Therefor - Adherence of contaminant residues or particles is suppressed, corrosion of exposed surfaces is substantially reduced or eliminated during the process of dicing a wafer by sawing. A fluoride-free aqueous composition comprising a dicarboxylic acid and/or salt thereof; a hydroxycarboxylic acid and/or salt thereof or amine group containing acid, a surfactant and deionized water is employed. | 01-14-2010 |
20110136717 | Formulations And Method For Post-CMP Cleaning - The present invention is a method of cleaning to removal residue in semiconductor manufacturing processing, comprising contacting a surface to be cleaned with an aqueous formulation having a polymer selected from the group consisting of acrylamido-methyl-propane sulfonate) polymers, acrylic acid-2-acrylamido-2-methylpropane sulfonic acid copolymer and mixtures thereof and a quaternary ammonium hydroxide having greater than 4 carbon atoms or choline hydroxide with a non-acetylinic surfactant. | 06-09-2011 |
20120009762 | Method for Wafer Dicing and Composition Useful Thereof - A solution for semiconductor wafer dicing is disclosed. The solution suppresses the adherence of contamination residues or particles, and reduces or eliminates the corrosion of the exposed metallization areas, during the process of dicing a wafer by sawing. The solution comprises at least one organic acid and/or salt thereof; at least a surfactant and/or at least a base; and deionized water, the composition has a pH is equal or greater than 4. The solution can further comprise, a chelating agent, a defoaming agent, or a dispersing agent. | 01-12-2012 |
20120295447 | Compositions and Methods for Texturing of Silicon Wafers - Pre-texturing composition for texturing silicon wafers having one or more surfactants. Methods of texturing silicon wafers having the step of wetting said wafer with a pre-texturing composition having one or more surfactants followed by a texturing step. | 11-22-2012 |
20140170835 | Method for Wafer Dicing and Composition Useful Thereof - A solution for semiconductor wafer dicing is disclosed. The solution suppresses the adherence of contamination residues or particles, and reduces or eliminates the corrosion of the exposed metallization areas, during the process of dicing a wafer by sawing. The solution comprises at least one organic acid and/or salt thereof; at least a surfactant and/or at least a base; and deionized water, the composition has a pH is equal or greater than 4. The solution can further comprise, a chelating agent, a defoaming agent, or a dispersing agent. | 06-19-2014 |