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Takayuki Inoue

Takayuki Inoue, Isehara JP

Patent application numberDescriptionPublished
20100258802Semiconductor Device and Method for Manufacturing the Same - An object is to provide an n-channel transistor and a p-channel transistor having a preferred structure using an oxide semiconductor. A first source or drain electrode which is electrically connected to a first oxide semiconductor layer and is formed using a stacked-layer structure including a first conductive layer containing a first material and a second conductive layer containing a second material, and a second source or drain electrode which is electrically connected to a second oxide semiconductor layer and is formed using a stacked-layer structure including a third conductive layer containing the first material and a fourth conductive layer containing the second material are included. The first oxide semiconductor layer is in contact with the first conductive layer of the first source or drain electrode, and the second oxide semiconductor layer is in contact with the third and the fourth conductive layers of the second source or drain electrode.10-14-2010
20100323501PLASMA TREATMENT APPARATUS, METHOD FOR FORMING FILM, AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A structure of the plasma treatment apparatus is employed in which an upper electrode has projected portions provided with first introduction holes and recessed portions provided with second introduction holes, the first introduction hole of the upper electrode is connected to a first cylinder filled with a gas which is not likely to be dissociated, the second introduction hole is connected to a second cylinder filled with a gas which is likely to be dissociated, the gas which is not likely to be dissociated is introduced into a reaction chamber from an introduction port of the first introduction hole provided on a surface of the projected portion of the upper electrode, and the gas which is likely to be dissociated is introduced into the reaction chamber from an introduction port of the second introduction hole provided on a surface of the recessed portion.12-23-2010
20110039402METHOD FOR MANUFACTURING MICROCRYSTALLINE SEMICONDUCTOR FILM AND THIN FILM TRANSISTOR - A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.02-17-2011
20110227082SEMICONDUCTOR DEVICE - An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time τ09-22-2011
20110315979TRANSISTOR AND SEMICONDUCTOR DEVICE - Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: τ12-29-2011
20120061663SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al03-15-2012
20120064664METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.03-15-2012
20120100309PLASMA TREATMENT APPARATUS AND PLASMA CVD APPARATUS - A plasma treatment apparatus includes a treatment chamber covered with a chamber wall, where an upper electrode faces a lower electrode; and a line chamber separated from the treatment chamber by the upper electrode and an insulator, covered with the chamber wall, and connected to a first gas diffusion chamber between a dispersion plate and a shower plate. The first gas diffusion chamber is connected to a second gas diffusion chamber between the dispersion plate and the upper electrode. The second gas diffusion chamber is connected to a first gas pipe in the upper electrode. The upper electrode and the chamber wall are provided on the same axis. The dispersion plate includes a center portion with no gas hole and a peripheral portion with plural gas holes. The center portion faces a gas introduction port of the first gas pipe, connected to an electrode plane of the upper electrode.04-26-2012
20120135302SEMICONDUCTOR FILM, METHOD FOR MANUFACTURING THE SAME, AND POWER STORAGE DEVICE - Provided are a semiconductor film including silicon microstructures formed at high density, and a manufacturing method thereof. Further, provided are a semiconductor film including silicon microstructures whose density is controlled, and a manufacturing method thereof Furthermore, a power storage device with improved charge-discharge capacity is provided. A manufacturing method in which a semiconductor film with a silicon layer including silicon structures is formed over a substrate with a metal surface is used. The thickness of a silicide layer formed by reaction between the metal and the silicon is controlled, so that the grain sizes of silicide grains formed at an interface between the silicide layer and the silicon layer are controlled and the shapes of the silicon structures are controlled. Such a semiconductor film can be applied to an electrode of a power storage device.05-31-2012
20120229805DEFECT EVALUATION METHOD FOR SEMICONDUCTOR - Even in the case of a sample exhibiting low photoresponse, such as a wide bandgap semiconductor, a measurement method which enables highly accurate CPM measurement is provided. When CPM measurement is performed, photoexcited carriers which are generated by light irradiation of a sample exhibiting low photoresponse such as a wide bandgap semiconductor are instantly removed by application of positive bias voltage to a third electrode which is provided in the sample in addition to two electrodes used for measurement. When the photoexcited carriers are removed, even in the case of the sample exhibiting low photoresponse, the controllability of a photocurrent value is improved and CPM measurement can be performed accurately.09-13-2012
20130012006PLASMA TREATMENT APPARATUS, METHOD FOR FORMING FILM, AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - A structure of the plasma treatment apparatus is employed in which an upper electrode has projected portions provided with first introduction holes and recessed portions provided with second introduction holes, the first introduction hole of the upper electrode is connected to a first cylinder filled with a gas which is not likely to be dissociated, the second introduction hole is connected to a second cylinder filled with a gas which is likely to be dissociated, the gas which is not likely to be dissociated is introduced into a reaction chamber from an introduction port of the first introduction hole provided on a surface of the projected portion of the upper electrode, and the gas which is likely to be dissociated is introduced into the reaction chamber from an introduction port of the second introduction hole provided on a surface of the recessed portion.01-10-2013
20130270679SEMICONDUCTOR FILM, METHOD FOR MANUFACTURING THE SAME, AND POWER STORAGE DEVICE - Provided are a semiconductor film including silicon microstructures formed at high density, and a manufacturing method thereof. Further, provided are a semiconductor film including silicon microstructures whose density is controlled, and a manufacturing method thereof. Furthermore, a power storage device with improved charge-discharge capacity is provided. A manufacturing method in which a semiconductor film with a silicon layer including silicon structures is formed over a substrate with a metal surface is used. The thickness of a silicide layer formed by reaction between the metal and the silicon is controlled, so that the grain sizes of silicide grains formed at an interface between the silicide layer and the silicon layer are controlled and the shapes of the silicon structures are controlled. Such a semiconductor film can be applied to an electrode of a power storage device.10-17-2013
20140246674SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al09-04-2014
20140319519SEMICONDUCTOR DEVICE - An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time τ10-30-2014
20150024544METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.01-22-2015
20150069393TRANSISTOR AND SEMICONDUCTOR DEVICE - Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: τ03-12-2015

Patent applications by Takayuki Inoue, Isehara JP

Takayuki Inoue, Tokyo JP

Patent application numberDescriptionPublished
20090264399HETEROCYCLIC JANUS KINASE 3 INHIBITORS - The invention relates to compound of the formula (I) or its salt, wherein —R10-22-2009
20090270376HETEROCYCLIC JANUS KINASE 3 INHIBITORS - The present invention provides a compound of formula (I) having an excellent JAK3 inhibition activity and being useful as an active ingredient of an agent for treating and/or preventing various immune diseases including autoimmune diseases inflammatory diseases, and allergic diseases. The compound according to the present invention has an inhibition activity against JAK3 and is thus useful as an active ingredient of an agent for treating or preventing diseases caused by undesirable cytokine signal transmission (e.g., rejection during organ/tissue transplantation, autoimmune diseases, multiple sclerosis, rheumatoid arthritis, psoriasis, asthma, atopic dermatitis, Alzheimer's disease, and atherosclerotic disease), or diseases caused by abnormal cytokine signal transmission (e.g., cancer and leukemia).10-29-2009
20100105661CONDENSED PYRIDINE COMPOUND - The present invention provides a compound having excellent JAK3 inhibitory activity and being useful as an active ingredient of an agent for treating and/or preventing various immune diseases including autoimmune diseases, inflammatory diseases, and allergic diseases.04-29-2010
20110039822HETEROCYCLIC JANUS KINASE 3 INHIBITORS - The present invention provides a compound having an excellent JAK3 inhibition activity and being useful as an active ingredient of an agent for treating and/or preventing various immune diseases including autoimmune diseases, inflammatory diseases, and allergic diseases.02-17-2011
20120034250CONDENSED PYRROLOPYRIDINE DERIVATIVE02-09-2012

Patent applications by Takayuki Inoue, Tokyo JP

Takayuki Inoue, Hamamatsu-Shi JP

Patent application numberDescriptionPublished
20100309306IMAGE ACQUIRING APPARATUS, IMAGE ACQUIRING METHOD, AND IMAGE ACQUIRING PROGRAM - In acquisition of a micro image of a sample S by a micro image acquiring unit 12-09-2010
20110211711Factor setting device and noise suppression apparatus - In a noise suppression apparatus, an index setter sets an exponent K that is a positive value. A factor setter variably sets a suppression factor according to the exponent K. A noise suppressor generates an audio signal from which a noise component is suppressed through noise suppression process of suppressing a Kth power of an amplitude of the noise component at each frequency thereof in a Kth power of an amplitude of the audio signal at each frequency thereof to a degree determined according to the suppression factor set by the factor setting part. Preferably, the index setter sets the exponent K to a value less than 0.1.09-01-2011
20120134508Audio Processing Apparatus - An audio processing apparatus generates a suppression coefficient sequence that is composed of coefficient values corresponding to frequency components of an audio signal, the frequency components being multiplied by the corresponding coefficient values to suppress noise components of the audio signal. In the audio processing apparatus, a characteristic value calculation unit calculates a noise characteristic value depending on a shape of a magnitude distribution of the audio signal. An intensity setting unit variably sets a suppression intensity of the noise components based on the noise characteristic value. A coefficient sequence generation unit generates the suppression coefficient sequence based on the audio signal and the suppression intensity.05-31-2012
20140133666SIGNAL PROCESSING SYSTEM AND SIGNAL PROCESSING METHOD - A signal processing system includes microphone units connected in series and a host device connected to one of the microphone units. Each of the microphone units has a microphone, a temporary storage memory, and a processing section for processing the sound picked up by the microphone. The host device has a non-volatile memory in which a sound signal processing program for the microphone units is stored. The host device transmits the sound signal processing program read from the non-volatile memory to each of the microphone units. Each of the microphone units temporarily stores the sound signal processing program in the temporary storage memory. The processing section performs a process corresponding to the sound signal processing program temporarily stored in the temporary storage memory and transmits the processed sound to the host device.05-15-2014

Patent applications by Takayuki Inoue, Hamamatsu-Shi JP

Takayuki Inoue, Atsugi JP

Patent application numberDescriptionPublished
20080211561Clock Signal Generation Circuit and Semiconductor Device - The semiconductor device is provided with a clock signal generation circuit that includes a reference clock signal generation circuit which generates a first reference clock signal, a first counter circuit which counts the number of rising edges of the first reference clock signal by using the first reference clock signal and a synchronizing signal, a second counter circuit which counts the number of rising edges of the first reference clock signal by using an enumerated value of the first counter circuit, a first divider circuit which divides a frequency of the first reference clock signal by using the enumerated value of the first counter circuit and generates a second reference clock signal, and a second divider circuit which divides a frequency of the second reference clock signal and generates a clock signal.09-04-2008
20090027580Liquid crystal display device and electronic device - It is an object to provide a liquid crystal display device and an electronic device of which aperture ratio increases. The present invention includes a substrate having an insulating surface, a transistor formed over the substrate, a pixel electrode electrically connected to the transistor. The transistor includes a gate electrode, a gate insulating layer over the gate electrode, a semiconductor layer having a microcrystalline structure over the gate insulating layer, and a buffer layer over the semiconductor layer having the microcrystalline structure. The channel width W of the transistor and the channel length L of the transistor satisfy a relation of 0.1≦W/L≦1.7.01-29-2009
20090218568THIN FILM TRANSISOTR AND DISPLAY DEVICE - To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.09-03-2009
20100302887SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device having a memory which can efficiently improve a yield by employing a structure which facilitates the use of a spare memory cell. The semiconductor device includes a memory cell array having a memory cell and a spare memory cell, a decoder connected to the memory cell and the spare memory cell, a data holding circuit connected to the decoder, and a battery which supplies electric power to the data holding circuit. The spare memory cell operates in accordance with an output from the data holding circuit.12-02-2010
20110248268THIN FILM TRANSISTOR AND DISPLAY DEVICE - To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.10-13-2011
20110261864SEMICONDUCTOR DEVICE - In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal.10-27-2011
20120120742SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device having a memory which can efficiently improve a yield by employing a structure which facilitates the use of a spare memory cell. The semiconductor device includes a memory cell array having a memory cell and a spare memory cell, a decoder connected to the memory cell and the spare memory cell, a data holding circuit connected to the decoder, and a battery which supplies electric power to the data holding circuit. The spare memory cell operates in accordance with an output from the data holding circuit.05-17-2012
20120132719SEMICONDUCTOR DEVICE - A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.05-31-2012

Patent applications by Takayuki Inoue, Atsugi JP

Takayuki Inoue, Nagoya-City JP

Patent application numberDescriptionPublished
20100230870METHOD FOR PRODUCING ALUMINUM TITANATE CERAMIC - A method for producing an aluminum titanate ceramic, which comprises subjecting, to forming, a raw material for aluminum titanate formation, containing Na09-16-2010
20120183725HONEYCOMB STRUCTURE - There is disclosed a honeycomb structure including a honeycomb structure section including: porous partition walls to divide and form a plurality of cells which extend from one end surface to the other end surface and become through channels of a fluid; and an outer peripheral wall positioned in an outermost periphery. The partition walls and the outer peripheral wall contain silicon carbide particles as an aggregate, and silicon as a binder to bind the silicon carbide particles, thicknesses of the partition walls are from 50 to 200 μm, a cell density is from 50 to 150 cells/cm07-19-2012
20130036719HONEYCOMB STRUCTURE - The honeycomb structure is provided with a honeycomb structural section, a pair of lateral electrodes on the side face of the honeycomb structural section, and at least one intermediate layer between the honeycomb structural section and the lateral electrodes. The honeycomb structural section has silicon carbide particles having an average particle diameter of 3 to 40 μm and silicon, and the ratio (Si/SiC) of silicon (Si) to silicon carbide (SiC) is 10/90 to 40/60. The lateral electrodes have an average particle diameter of the silicon carbide particles of 10 to 70 μm and a Si/SiC ratio of 20/80 to 50/50. The intermediate layer has an average particle diameter of silicon carbide particles and Si/SiC between those of the honeycomb structural section and those of the lateral electrodes. The electric resistance between the lateral electrodes of the honeycomb structural section is 2 to 100Ω.02-14-2013
20130207322METHOD FOR PRODUCING SILICON CARBIDE CERAMIC AND METHOD FOR PRODUCING HONEYCOMB STRUCTURE - Provided is a method for producing a silicon carbide ceramic easily and simply producing a silicon carbide ceramic having a small amount in resistivity change due to temperature change and being capable of generating heat by current application; and having a forming raw material preparing step of mixing two or more kinds of silicon carbide ceramic powders containing 4H—SiC silicon carbide crystals at respectively different content ratio to prepare a forming raw material; a forming step of forming the forming raw material into a formed body; and a firing step of firing the formed body to produce a silicon carbide ceramic being adjusted at a content ratio of 4H—SiC silicon carbide crystal to a desired value.08-15-2013
20130216768SILICON CARBIDE CERAMIC AND HONEYCOMB STRUCTURE - Provided is a silicon carbide ceramic having a small amount of resistivity change due to temperature change and being capable of generating heat by current application; and containing silicon carbide crystals having 0.1 to 25 mass % of 4H—SiC silicon carbide crystals and 50 to 99.9 mass % of 6H—SiC silicon carbide crystals, preferably having a nitrogen content of 0.01 mass % or less, more preferably containing two or more kinds of silicon carbide particles containing silicon carbide crystals and silicon for binding these silicon carbide particles to each other and having a silicon content of from 10 to 40 mass %.08-22-2013

Patent applications by Takayuki Inoue, Nagoya-City JP

Takayuki Inoue, Shizuoka JP

Patent application numberDescriptionPublished
20080283722Autofocus Device and Microscope Using the Same - A microscope apparatus 11-20-2008
20090002811Microscopic Image Capturing Device - The present invention relates to a microscopic image capturing apparatus having a structure that, in scanning an imageable area of an imaging unit in a predetermined direction in an imaging object area, in which a sample is present, can reliably set a focal point of the imaging unit on each imaging position set inside the imaging object area regardless of the type of focusing actuator. The microscopic image capturing apparatus has a sample setting stage having a sample setting surface that is inclined with respect to a scan plane orthogonal to an optical axis of an objective lens. By moving the sample setting stage, which has such a sample setting surface, along the scan plane in a manner such that the distance in the optical axis direction between the imaging unit and the sample setting surface varies monotonously, the focal point position of the imaging unit is adjusted in only one direction along the optical axis of the objective lens. In this case, even when a stepping motor is applied as the focusing actuator, the occurrence of lost motion in a driving system based on the stepping motor is prevented reliably and the focal point of the imaging unit can be set reliably on each imaging position set inside the imaging object area.01-01-2009

Patent applications by Takayuki Inoue, Shizuoka JP

Takayuki Inoue, Okayama-Shi JP

Patent application numberDescriptionPublished
20110306985Surgical Assistance System - A surgical assistance system for operating on biological tissue using a surgical tool attached to an arm of an automatically-controlled surgical instrument so that an optimal feed rate of the tool is calculated and outputted to the surgical instrument, the system including: a device for storing and voxelizing medical image data obtained from a biological tissue subject to surgery; a device for setting an operative location based on the shape of the biological tissue; a device for calculating a tool path along which the tool travels to perform surgery at an operative location; a device for determining the region of interference between the tool and the voxels; a device for determining the hardness of the biological tissue in the interference region; a device for calculating an optimal tool feed rate corresponding to the hardness; and a device for outputting the feed rate obtained by the calculations to the surgical instrument.12-15-2011

Takayuki Inoue, Toda-Shi JP

Patent application numberDescriptionPublished
20120068224METHOD OF PRODUCING SEMICONDUCTOR WAFER, AND SEMICONDUCTOR WAFER - A method of producing a semiconductor wafer suited to form types of devices such as HBT and FET on a single semiconductor wafer is provided. The method, by repeating steps including introducing, into a reaction chamber for forming a semiconductor by crystal growth, a first-impurity gas containing an element or a compound containing a first impurity atom as a constituent, thereby producing semiconductor wafers, includes, after introducing the first-impurity gas: taking out a produced semiconductor wafer; disposing a first semiconductor in the reaction chamber; introducing, into the reaction chamber, a second-impurity gas containing an element or a compound containing, as a constituent, a second impurity atom exhibiting a conduction type opposite to the conduction type of the first impurity atom within the first semiconductor; heating the first semiconductor in an atmosphere of the second-impurity gas; and forming a second semiconductor on the heated first semiconductor by crystal growth.03-22-2012
20130056794SEMICONDUCTOR WAFER, METHOD OF PRODUCING SEMICONDUCTOR WAFER, ELECTRONIC DEVICE, AND METHOD OF PRODUCING ELECTRONIC DEVICE - A semiconductor wafer includes a base wafer, a first semiconductor portion that is formed on the base wafer and includes a first channel layer containing a majority carrier of a first conductivity type, a separation layer that is formed over the first semiconductor portion and contains an impurity to create an impurity level deeper than the impurity level of the first semiconductor portion, and a second semiconductor portion that is formed over the separation layer and includes a second channel layer containing a majority carrier of a second conductivity type opposite to the first conductivity type.03-07-2013

Takayuki Inoue, Kanagawa JP

Patent application numberDescriptionPublished
20120188601IMAGE FORMING APPARATUS, METHOD OF CONTROLLING IMAGE FORMING APPARATUS, AND PROGRAM FOR CONTROLLING IMAGE FORMING APPARATUS - An image forming apparatus stores billing information depending on a formation and output of an image. The apparatus includes a page information acquiring unit that acquires page information written in PDL, a page information analysis unit that analyzes the page information and outputs a drawing command for performing the formation and output of the image for each of a plurality of regions divided from a unit page, a drawing information generating unit that generates drawing information for performing the formation and output of the image on the basis of the drawing command, a billing amount determining unit that judges whether an image to be drawn is contained in each of the divided regions and determines a billing amount for each divided region on the basis of the judgment result, and a billing information storage unit that stores information of the determined billing amount.07-26-2012
20120229852IMAGE FORMING APPARATUS - An image forming apparatus includes a data interpreting unit configured to interpret a printing condition of an entirety of a printing job when starting the printing job, and a job control unit configured to determine whether an occurrence of an error for the print job is predicted based on the interpretation of the printing condition of the entirety of the printing job by the data interpreting unit, and terminate the printing job when the occurrence of an error is predicted based on the interpretation of the printing condition of the entirety of the printing job by the data interpreting unit and store data of the printing job in an memory area.09-13-2012
20130215464IMAGE FORMING APPARATUS, SYSTEM, AND METHOD - In an image forming system, after receiving print data, print setting data, and a command to display a preview from an information processing apparatus, an image drawing unit in an image forming apparatus generates a preview image that reflects the print setting data from the print data and send it to the information processing apparatus. After receiving the print data, the print setting data, and the command to start printing from the information processing apparatus, the image drawing unit generates drawing data that reflects the print setting data from the print data, and an engine unit prints out an image on paper.08-22-2013
20130278966IMAGE FORMING APPARATUS AND JOB MANAGEMENT METHOD - A novel image forming apparatus that categorizes print job information for each newly added application and presents the print job information without categorizing data incorrectly and mixing in impersonation data. All of the applications that installed additionally extract jobs that went through itself only from trace information on jobs notified by the default functions and display it in a user interface. The trace information on jobs is a job ID association list that associates a job ID numbered by the default functions with a job ID of a job issued by the additional application.10-24-2013

Takayuki Inoue, Tochigi JP

Patent application numberDescriptionPublished
20130009432DOUBLE-LOCK RECLINING SEAT FOR VEHICLE - In a double-lock reclining seat, there is provided a mechanism for preventing two reclining lock mechanisms from being unlocked due to a collision load applied from a baggage or the like, without deforming the reclining lock mechanisms themselves, for example, without bending a connecting shaft of the two reclining lock mechanisms, or without adding any complicated mechanism changes to the interior of the reclining lock mechanisms. The double-lock reclining seat includes a load receiver 01-10-2013
20130119724VEHICLE SEAT - Provided is a vehicle seat by which an impact of rear end collision is reduced and of which peripheral structure of a side frame is simplified. A vehicle seat includes: a seat back frame which includes side portions positioned at the sides thereof, a pressure receiving member which is jointed to the seat back frame through joint members and supports an occupant, and an impact reduction member which is disposed on at least one of the side portions to engage with the joint member and to move by a predetermined amount of impact load applied to the pressure receiving member so that the pressure receiving member is caused to move rearward; in which the side portion includes a convex portion protruding in the movement range of the impact reduction member, and the impact reduction member abuts against the convex portion so that the movement of the impact reduction member is prevented.05-16-2013

Takayuki Inoue, Aichi-Ken JP

Patent application numberDescriptionPublished
20130078126COMPRESSOR - A compressor includes a discharge chamber, compressor chamber, valve plate, and discharge reed valve. The valve plate includes a fixing surface, exposed to the discharge chamber, and a discharge port, which communicates the discharge chamber and the compression chamber. The discharge reed valve includes a fixed portion, fixed to the fixing surface, a base portion, separable from the valve plate, and a valve portion, which closes the discharge port. The valve plate includes an annular seal surface, recessed groove, receiving surface, and support surface. The seal surface contacts the valve portion around the discharge port. The recessed groove is arranged in the fixing surface outward from the seal surface. The receiving surface is flush with the fixing surface and contacts a distal region of the valve portion. The support surface is flush with the fixing surface and contacts a central region of the valve portion.03-28-2013
20130129546COMPRESSOR - A compressor includes a valve base plate, which is arranged between a suction chamber and a compression chamber and has a suction port. The valve base plate includes a sealing surface, a recessed groove, a receiving surface, and a support surface. The sealing surface is flush with a fixing surface and contacts the valve portion in an annular manner. The recessed groove is located at an outer side of the sealing surface and recessed with respect to the fixing surface. The recessed groove includes a bottom portion and separates an edge portion of the valve portion from the bottom portion. The receiving surface is flush with the fixing surface and capable of contacting a distal zone of the valve portion. The support surface is flush with the fixing surface and capable of contacting a middle zone located at an inner side of the sealing surface of the valve portion.05-23-2013

Takayuki Inoue, Saitama JP

Patent application numberDescriptionPublished
20140217767VEHICLE INCLUDING SEAT HAVING FIRST AND SECOND BIASING MEMBERS - A vehicle includes a seat that comprises a seat bottom, a seat back, a first biasing member, and a second biasing member. The seat back is pivotable between a stowed position and a deployed position. The first biasing member is coupled to each of the seat back and the bed frame. The second biasing member is coupled to each of the seat back and the bed frame.08-07-2014

Takayuki Inoue, Osaka JP

Patent application numberDescriptionPublished
20140212802MULTI-LAYERED ELECTROPHOTOGRAPHIC PHOTOSENSITE MEMBER, IMAGE FORMING APPARATUS, AND METHOD FOR PRODUCING MULTI-LAYERED ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER - A multi-layered electrophotographic photosensitive member includes a multi-layered photosensitive layer. In the multi-layered photosensitive layer, a charge generating layer that contains a charge generating material and a charge transport layer that contains a charge transport material and a binder resin are layered sequentially. The binder resin includes a polycarbonate resin represented by a formula (1).07-31-2014
20140238924CLEANING APPARATUS FOR FILTRATION LAYER IN SEAWATER INFILTRATION INTAKE - To provide a cleaning apparatus suitable for removing clogging substances trapped in a surface layer of a sand filtration layer. A cleaning apparatus equipped with drive wheels serving as a driving device configured to move across a surface of a sand filtration layer. A pump and a jet nozzle are provided as an agitation device configured to agitate a surface layer portion of the sand filtration layer only at a desired depth, and which blows the clogging substances upward into the seawater in a turbid water intake pit together with a filtration sand. A perforated pipe for suctioning turbid water, a pump, an ejector, and a discharge pipe for dilute turbid water are provided as a suction and discharge device configured to suction turbid water blown upward into seawater in the water intake pit by the agitation device, and discharge it to outside of the turbid water intake pit. Prevents clogging by performing a timely cleaning of the sand filtration layer, thereby making it possible to maintain a high-speed seawater infiltration rate for seawater. Impact on the surrounding environment is reduced, because the apparatus suctions turbid water containing clogging substances which is blown upward into the turbid water intake pit, and discharges it to outside of the system.08-28-2014

Takayuki Inoue, Sagamihara JP

Patent application numberDescriptionPublished
20150024577SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device in which the threshold is corrected is provided. In a semiconductor device including a plurality of transistors each includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit for supplying a signal to the gate electrode and a circuit for supplying a signal to the source or drain electrode are electrically separated from each other. The process is performed in the state where the potential of the former circuit is set higher than the potential of the latter circuit.01-22-2015
20150054548SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device in which the threshold is adjusted is provided. In a semiconductor device including a plurality of transistors arranged in a matrix each including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit that supplies a signal to the gate electrode (e.g., word line driver) is provided with a selection circuit formed of an OR gate, an XOR gate, or the like, whereby potentials of word lines can be simultaneously set higher than potentials of bit lines.02-26-2015
20150060846SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device in which the threshold is adjusted is provided. In a transistor including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the semiconductor, the electron trap layer includes crystallized hafnium oxide. The crystallized hafnium oxide is deposited by a sputtering method using hafnium oxide as a target. When the substrate temperature is Tsub (° C.) and the proportion of oxygen in an atmosphere is P (%) in the sputtering method, P≧45−0.15×Tsub is satisfied. The crystallized hafnium oxide has excellent electron trapping properties. By the trap of an appropriate number of electrons, the threshold of the semiconductor device can be adjusted.03-05-2015
20150069385METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for adjusting threshold of a semiconductor device is provided. In a plurality of semiconductor devices each including a semiconductor, a source or drain electrode electrically in contact with the semiconductor, a gate electrode, and a charge trap layer between a gate electrode and the semiconductor, a state where the potential of the gate electrode is set higher than the potential of the source or drain electrode while the semiconductor devices are heated at 150° C. or higher and 300° C. or lower is kept for one second or longer to trap electrons in the charge trap layer, so that the threshold is increased and Icut is reduced. Here, the potential difference between the gate electrode and the source or drain electrode is set so that it is different between the semiconductor devices, and the thresholds of the semiconductor devices are adjusted to be appropriate to each purpose.03-12-2015
20150069387SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device with adjusted threshold is provided. In a semiconductor device including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is provided, a charge trap layer provided between the first gate electrode and the semiconductor, and a gate insulating layer provided between the second gate electrode and the semiconductor, a threshold is increased by trapping electrons in the charge trap layer by keeping a potential of the first gate electrode at a potential higher than a potential of the source or drain electrode for 1 second or more while heating. After the threshold adjustment process, the first gate electrode is removed or insulated from other circuits. Alternatively, a resistor may be provided between the first gate electrode and other circuits.03-12-2015

Takayuki Inoue, Kawasaki JP

Patent application numberDescriptionPublished
20150127689MAPPING DEVICE, MAPPING METHOD, AND RECORDING MEDIUM - A non-transitory computer-readable recording medium has stored therein a mapping program that causes a computer to execute a process. The process includes: first calculating a matching rate between top-level parent items in a hierarchical relationship between a first plurality of items of a first data and a second plurality of items of a second data based on an item information relating to the first plurality of items and the second plurality of items, the first data including one or a plurality of items before a change, the second data including one or a plurality of items after the change; and associating the parent items of the first data and the second data with each other based on the calculated matching rate.05-07-2015
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