Patent application number | Description | Published |
20110098173 | Composition for ferroelectric thin film formation, method for forming ferroelectric thin film, and ferroelectric thin film formed by the method thereof - Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (Pb | 04-28-2011 |
20110177235 | COMPOSITION FOR FERROELECTRIC THIN FILM FORMATION, METHOD FOR FORMING FERROELECTRIC THIN FILM, AND FERROELECTRIC THIN FILM FORMED BY THE METHOD THEREOF - Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (Pb | 07-21-2011 |
20130257228 | PZT-BASED FERROELECTRIC THIN FILM AND METHOD OF MANUFACTURING THE SAME - A PZT-based ferroelectric thin film formed on a lower electrode of a substrate having the lower electrode in which the crystal plane is oriented in a (111) axis direction, having an orientation controlling layer which is formed on the lower electrode and has a layer thickness in which a crystal orientation is controlled in a (100) plane preferentially in a range of 45 nm to 150 nm, and a film thickness adjusting layer which is formed on the orientation controlling layer and has the same crystal orientation as the crystal orientation of the orientation controlling layer, in which an interface is formed between the orientation controlling layer and the film thickness adjusting layer. | 10-03-2013 |
20130258549 | PZT-BASED FERROELECTRIC THIN FILM AND METHOD OF MANUFACTURING THE SAME - A PZT-based ferroelectric thin film formed on a lower electrode of a substrate having the lower electrode in which the crystal plane is oriented in a (111) axis direction, having an orientation controlling layer which is formed on the lower electrode and has a layer thickness in which a crystal orientation is controlled in a (111) plane preferentially in a range of 45 nm to 270 nm, and a film thickness adjusting layer which is formed on the orientation controlling layer and has the same crystal orientation as the crystal orientation of the orientation controlling layer, in which an interface is formed between the orientation controlling layer and the film thickness adjusting layer. | 10-03-2013 |
20140349139 | COMPOSITION FOR FERROELECTRIC THIN FILM FORMATION, METHOD FOR FORMING FERROELECTRIC THIN FILM, AND FERROELECTRIC THIN FILM FORMED BY THE METHOD THEREOF - Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (Pb | 11-27-2014 |
20140349834 | COMPOSITION FOR FERROELECTRIC THIN FILM FORMATION, METHOD FOR FORMING FERROELECTRIC THIN FILM, AND FERROELECTRIC THIN FILM FORMED BY THE METHOD THEREOF - Disclosed is a composition for ferroelectric thin film formation which is used in the formation of a ferroelectric thin film of one material selected from the group consisting of PLZT, PZT, and PT. The composition for ferroelectric thin film formation is a liquid composition for the formation of a thin film of a mixed composite metal oxide formed of a mixture of a composite metal oxide (A) represented by general formula (1): (Pb | 11-27-2014 |
Patent application number | Description | Published |
20100112763 | Semiconductor device including gate stack formed on inclined surface and method of fabricating the same - A semiconductor device includes a transistor. The transistor includes a substrate having an inclined surface, a first upper surface extending from a lower portion of the inclined surface, and a second upper surface extending from an upper end of the inclined surface. A gate stack structure is formed on the inclined surface and includes a gate electrode. A first impurity region formed on one of the first and second upper surfaces contacts the gate stack structure. A second impurity region formed on the second upper surface contacts the gate stack structure. A channel between the first and second impurity regions is formed along the inclined surface in a crystalline direction. | 05-06-2010 |
20100178724 | ORGANIC ELECTROLUMINESCENT DISPLAY AND METHOD OF FABRICATING THE SAME - An organic electroluminescent display (“OELD”) includes an organic light-emitting diode (“OLED”), a circuit region, and an interlayer dielectric (“ILD”) layer. The OLED is disposed in each of a plurality of pixels arranged on a substrate. The circuit region includes two or more thin film transistors (“TFTs”) and a storage capacitor. The ILD layer has two or more insulating layers and includes a first region disposed between both electrodes of the storage capacitor and a second region covering the TFTs. At least one of the insulating layers has a window exposing the insulating layer directly beneath the at least one insulating layer so that that the ILD layer is thinner in the first region than in the second region. Accordingly, it is possible to reduce an occupation area of the storage capacitor while maintaining the necessary capacitance of the storage capacitor and expanding the area of the luminescent region. | 07-15-2010 |
20100178738 | TRANSISTOR, METHOD OF FABRICATING THE SAME AND ORGANIC LIGHT EMITTING DISPLAY INCLUDING THE TRANSISTOR - A transistor includes; at least two polycrystalline silicon layers disposed substantially parallel to each other, each polycrystalline silicon layer including a channel region and at least two high conductivity regions disposed at opposing sides of the channel region; a gate which corresponds to the channel region of the two polycrystalline silicon layers and which crosses the two polycrystalline silicon layers, and a gate insulating layer interposed between the gate and the two polycrystalline silicon layers, wherein low conductivity regions are disposed adjacent to one edge of the gate and are formed between the channel region and one high conductivity region of each polycrystalline silicon layer. | 07-15-2010 |
20110057195 | POLY-SI THIN FILM TRANSISTOR AND ORGANIC LIGHT-EMITTING DISPLAY HAVING THE SAME - A thin film transistor comprises an Si-based channel having a nonlinear electron-moving path, a source and a drain disposed at both sides of the channel, a gate disposed above the channel, an insulator interposed between the channel and the gate, and a substrate supporting the channel and the source and the drain disposed at either side of the channel respectively. | 03-10-2011 |
20110263088 | POLY-SI THIN FILM TRANSISTOR AND ORGANIC LIGHT-EMITTING DISPLAY HAVING THE SAME - A thin film transistor comprises an Si-based channel having a nonlinear electron-moving path, a source and a drain disposed at both sides of the channel, a gate disposed above the channel, an insulator interposed between the channel and the gate, and a substrate supporting the channel and the source and the drain disposed at either side of the channel respectively. | 10-27-2011 |
Patent application number | Description | Published |
20100103523 | Multilayer Antireflection Layer, Method for Producing the Same, and Plastic Lens - A multilayer antireflection layer includes a high refractive index layer and a low refractive index layer that are laminated alternately, the high reflective index layer having a grain boundary, and particles forming the grain boundary having an average particle diameter of 30 nm or less. | 04-29-2010 |
20100104838 | Optical Article and Method for Manufacturing the Same - An optical article includes an anti-reflection layer on a substrate, wherein the anti-reflection layer is formed of nine layers obtained by alternately stacking low refractive index layers and high refractive index layers, the layer closest to the substrate among the high and low refractive index layers that form the anti-reflection layer is called a first layer and the numbers of the following layers are incremented by one so that the odd-numbered layers are low refractive index layers and the even-numbered layers are high refractive index layers, and at least one of the following equations is satisfied: | 04-29-2010 |
20100177395 | Optical Article and Method for Producing the Same - A method for producing an optical article. A first layer that is light-transmissive is formed on an optical substrate directly or with an additional layer in between. A silicide material, light-transmissive thin film is formed on the surface of the first layer. | 07-15-2010 |
20100225882 | Optical Article and Process for Producing the Same - A process for producing an optical article having an antireflection layer formed directly or via another layer on an optical base material, includes: forming a primary layer contained in the antireflection layer; and forming a light transmissive conductive layer containing a metal containing germanium as a main component and/or a compound of germanium and a transition metal on a surface of the primary layer. | 09-09-2010 |
20100226004 | Optical Article and Method for Producing the Same - A method for producing an optical article having a filter layer formed directly or with another layer in between on an optical substrate, the filter layer transmitting light in a predetermined wavelength band and blocking light with a wavelength longer and/or shorter than the predetermined wavelength band, includes: forming a first layer to be included in the filter layer, and adding at least one of carbon, silicon, and germanium to the surface of the first layer, thereby reducing the resistance of the surface of the first layer. | 09-09-2010 |
20100226005 | Optical Article and Process for Producing the Same - A process for producing an optical article having an antireflection layer formed directly or via another layer on a flexible optical base material, includes: forming a primary layer contained in the antireflection layer; and adding at least any one of carbon, silicon, and germanium to a surface of the primary layer to reduce a resistance. | 09-09-2010 |
20110033635 | Method for Producing Optical Article - A method for producing an optical article includes: forming a first layer that is light-transmissive on an optical substrate directly or with another layer in between; and reducing the resistance of at least a portion of a surface layer of the first layer by ion-assisted deposition of at least one composition selected from the group consisting of titanium, niobium, oxides of titanium, and oxides of niobium. | 02-10-2011 |
20120019913 | Lens Manufacturing Method and Lens - A lens manufacturing method comprising:forming a first layer directly or via a second layer on an optical base; and forming a light-transmissive thin film on a surface of the first layer in a physical vapor deposition process, the light-transmissive thin film including a portion made of TiO | 01-26-2012 |
20120026456 | Optical Article and Optical Article Production Method - An optical article comprising: an optical base material; and a translucent layer that contains TiO | 02-02-2012 |
Patent application number | Description | Published |
20090110262 | EVALUATION OBJECT PATTERN DETERMINING APPARATUS, EVALUATION OBJECT PATTERN DETERMINING METHOD, EVALUATION OBJECT PATTERN DETERMINING PROGRAM AND PATTERN EVALUATING SYSTEM - There is provided an evaluation object pattern determining apparatus capable of determining local patterns to be evaluated. The apparatus is for use in a pattern evaluating system storing patterns of a LSI chip as CAD data, picking out coordinates of local patterns whose process margin is small from the CAD data by way of simulation and assisting observation of the local patterns produced in a fabrication line. The apparatus includes a risk level map creating section for creating risk level maps in which risk areas are disposed. The risk area is assigned with a risk level obtained by digitizing that the risk area is an area whose process margin is smaller than other areas. The apparatus also includes a superimposition processing section for superimposing the coordinates of the local patterns with the risk level map to pick out the coordinates of the local patterns located within the risk area. | 04-30-2009 |
20100250174 | SAMPLE INSPECTION SYSTEM AND OPERATING METHOD FOR MANAGEMENT SERVER THEREOF - A management server of a sample inspection system includes sample processing information generated on the basis of inspection request data, facility data, a simulation execution portion and a window generation portion for generating a monitor window. The inspection request data contains a priority, an order time, a required time and inspection items and the sample processing information contains an inspection start time and an inspection estimate finish time. The monitor window has a work area in which the samples represented by sample bars parallel to the abscissa are arranged in a vertical direction and a past record and a future schedule are allocated to this abscissa with the present time as the base. The sample bars display a simulation execution portion for executing simulation on the basis of the inspection start time, the inspection estimate finish time and a delay time. The management server displays the simulation result. | 09-30-2010 |
20120144009 | SAMPLE-TEST-DEVICE MANAGEMENT SERVER, SAMPLE TEST DEVICE, SAMPLE TEST SYSTEM, AND SAMPLE TEST METHOD - There is provided a sample test system which can execute a prior process for a specific sample in consideration of priorities and process progresses of a plurality of samples processed in the sample test system. The sample test system includes a sample-test-device management server | 06-07-2012 |
Patent application number | Description | Published |
20080261333 | Methods of forming a material film, methods of forming a capacitor, and methods of forming a semiconductor memory device using the same - A method of forming a material (e.g., ferroelectric) film, a method of manufacturing a capacitor, and a method of forming a semiconductor memory device using the method of forming the (e.g., ferroelectric) film are provided. Pursuant to an example embodiment of the present invention, a method of forming a ferroelectric film includes preparing a substrate, depositing an amorphous ferroelectric film on the substrate, and crystallizing the amorphous ferroelectric film by irradiating it with a laser beam. According to still another example embodiment of the present invention, a method of forming a ferroelectric film may reduce the thermal damage to other elements because the ferroelectric film may be formed at a temperature lower than about 500° C. to about 550° C. | 10-23-2008 |
20080272381 | ORGANIC LIGHT EMITTING DISPLAY WITH SINGLE CRYSTALLINE SILICON TFT AND METHOD OF FABRICATING THE SAME - Provided is an organic light emitting display, in which a semiconductor circuit unit of 2T-1C structure including a switching transistor and a driving transistor formed of single crystalline silicon is formed on a plastic substrate. A method of fabricating the single crystalline silicon includes: growing a single crystalline silicon layer to a predetermined thickness on a crystal growth plate; depositing a buffer layer on the single crystalline silicon layer; forming a partition layer at a predetermined depth in the single crystalline silicon layer by, e.g., implanting hydrogen ions in the single crystalline silicon layer from an upper portion of an insulating layer; attaching a substrate to the buffer layer; and releasing the partition layer of the single crystalline silicon layer by heating the partition layer from the crystal growth plate to obtain a single crystalline silicon layer of a predetermined thickness on the substrate. | 11-06-2008 |
20090149007 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are an electronic device and a method of manufacturing the same. The device includes a plastic substrate, a transparent thermal conductive layer stacked on the plastic substrate, a polysilicon layer stacked on the thermal conductive layer; and a functional device disposed on the polysilicon layer. The functional device is any one of a transistor, a light emitting device, and a memory device. The functional device may be a thin film transistor including a gate stack stacked on the polysilicon layer. | 06-11-2009 |
20090191673 | Method of manufacturing thin film transistor - A thin film transistor (TFT) and a method of manufacturing the same are provided. The TFT includes a transparent substrate, an insulating layer on a region of the transparent substrate, a monocrystalline silicon layer, which includes source, drain, and channel regions, on the insulating layer and a gate insulating film and a gate electrode on the channel region of the monocrystalline silicon layer. | 07-30-2009 |
20100041214 | Single crystal substrate and method of fabricating the same - A high quality single crystal substrate and a method of fabricating the same are provided. The method of fabricating a single crystal substrate includes: forming an insulator on a substrate; forming a window in the insulator, the window exposing a portion of the substrate; forming an epitaxial growth silicon or germanium seed layer on the portion of the substrate exposed through the window; depositing a silicon or germanium material layer, which are crystallization target material layers, on the epitaxial growth silicon 6r germanium seed layer and the insulator; and crystallizing the crystallization target material layer by melting and cooling the crystallization target material layer. | 02-18-2010 |
20100193797 | Stacked transistors and electronic devices including the same - Stacked transistors and electronic devices including the stacked transistors. An electronic device includes a substrate, a first transistor on the substrate and including a first active layer, a first gate, and a first gate insulating layer between the first active layer and the first gate, a first metal line spaced apart from the first gate on the substrate, a first insulating layer covering the first transistor and the first metal line, and a second transistor on the first insulating layer between the first transistor and the first metal line, and including a second active layer, a second gate, and a second gate insulating layer between the second active layer and the second gate. | 08-05-2010 |
20100200834 | Crystalline nanowire substrate, method of manufacturing the same, and method of manufacturing thin film transistor using the same - Example embodiments relate to a crystalline nanowire substrate having a structure in which a crystalline nanowire film having a relatively fine line-width may be formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the crystalline nanowire substrate may include preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film. | 08-12-2010 |
Patent application number | Description | Published |
20090280604 | Heat radiation structure of semiconductor device, and manufacturing method thereof - The invention of the present application provides a heat radiation structure of a semiconductor device, comprising a substrate having, on a surface thereof, a first area on which the semiconductor device is mounted, and a second area which surrounds the first area, and the semiconductor device which has a first surface and a second surface opposite to the first surface and is formed with a plurality of terminals provided on the first surface, wherein the semiconductor device is mounted on the substrate in such a manner that the first surface is opposite to the surface of the substrate, and wherein a first heat radiating film is formed on the second area of the substrate, and a second heat radiating film is formed on the second surface of the semiconductor device with being spaced away from the first heat radiating film. | 11-12-2009 |
20130231786 | ENGINEERING DEVICE AND POINT INFORMATION GENERATING METHOD - An engineering device includes a template producing unit that produces a template that defines monitoring point information and control point information as information for an object that is an equipment subject to monitoring/control, a system defining unit that defines system information for each equipment of a facility that is subject to monitoring/control, a physical entity deploying unit that produces monitoring point information and control point information for each individual equipment by deploying the template, for each individual equipment within the facility, following the system information, and a modification processing unit that regenerates the monitoring point information and control point information for each individual equipment, by deploying, to each individual equipment within the facility, a post-modification template, following the system information, when a modification has been made to the template. | 09-05-2013 |