Patent application number | Description | Published |
20080281577 | Language Identification Equipment, Translation Equipment, Translation Server, Language Identification Method, and Translation Processing Method - In some preferred embodiments, a language identification apparatus, comprises a storing means | 11-13-2008 |
20120249180 | SEMICONDUCTOR DEVICE - A device is disclosed herein, which may be used a level-shift circuit. The device includes first, second and third power supply lines supplied respectively with first, second and third power voltages that are different from one another, first and second input terminals and an output terminal, an output circuit coupled to the first power supply line, the first and second input terminals and the output terminal, a first inverter including an input node coupled to the first input terminal and an output node coupled to the second input terminal, a first transistor coupled in series to the first inverter between the second and third power supply lines, the fifth transistor being rendered non-conductive to deactivate the first inverter, and a control circuit configured to prevent the output terminal from being brought into an electrical floating state during deactivation of the first inverter. | 10-04-2012 |
20130057326 | SEMICONDUCTOR DEVICE USING MULTI-PHASE CLOCK SIGNAL AND INFORMATION PROCESSING SYSTEM INCLUDING THE SAME - Disclosed herein is a device that includes a delay line that includes n delay circuits cascade-connected and delays an input clock signal by k cycles, and a routing circuit that generates multi-phase clock signals having different phases based on at least a part of n output clock signals output from the n delay circuits, respectively. The n and the k are both integers more than 1 and a greatest common divisor thereof is 1. | 03-07-2013 |
20130328187 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply different from the first power supply and that penetrate through a substrate structure. The semiconductor device also includes a through-substrate via string composed by the first and second through-substrate vias, in which the first through-substrate vias are located adjacent to one another and the second through-substrate vias are also located adjacent to one another. The through-substrate via string is disposed in the substrate structure for extending in a first direction. | 12-12-2013 |
20140032941 | SEMICONDUCTOR DEVICE EMPLOYING DVFS FUNCTION - Disclosed herein is a device that includes: a memory cell array including a plurality of memory cells, the memory cell array operates on a first internal voltage; a peripheral circuit accessing selected one or ones of the memory cells, the peripheral circuit operates on a second internal voltage; a first internal voltage generation circuit that supplies the first internal voltage to the memory cell array; and a second internal voltage generation circuit that supplies the second internal voltage to the peripheral circuit. The second internal voltage generation circuit sets the second internal voltage to a first voltage value in a first mode, and to a second voltage value that is different from the first voltage value in a second mode. The first internal voltage generation circuit sets the first internal voltage to a third voltage value in both the first and second modes. | 01-30-2014 |
20140132317 | SEMICONDUCTOR DEVICE USING MULTI-PHASE CLOCK SIGNAL AND INFORMATION PROCESSING SYSTEM INCLUDING THE SAME - Disclosed herein is a device that includes a delay line that includes n delay circuits cascade-connected and delays an input clock signal by k cycles, and a routing circuit that generates multi-phase clock signals having different phases based on at least a part of n output clock signals output from the n delay circuits, respectively. The n and the k are both integers more than 1 and a greatest common divisor thereof is 1. | 05-15-2014 |
20140242414 | HIGH-STRENGTH STEEL SHEET AND HIGH-STRENGTH GALVANIZED STEEL SHEET EXCELLENT IN SHAPE FIXABILITY, AND MANUFACTURING METHOD THEREOF - The present invention provides a high-strength steel sheet excellent in shape fixability. The high-strength steel sheet contains C, Si, Mn, P, S, Al, N, and O with predetermined contents, in which a retained austenite phase of 5 to 20% in volume fraction is contained, an amount of solid-solution C contained in the retained austenite phase is 0.80 to 1.00% in mass %, W | 08-28-2014 |
20150137386 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply different from the first power supply and that penetrate through a substrate structure. The semiconductor device also includes a through-substrate via string composed by the first and second through-substrate vias, in which the first through-substrate vias are located adjacent to one another and the second through-substrate vias are also located adjacent to one another. The through-substrate via string is disposed in the substrate structure for extending in a first direction. | 05-21-2015 |