Patent application number | Description | Published |
20110101518 | Semiconductor Device and Method of Forming Column Interconnect Structure to Reduce Wafer Stress - An interconnect pad is formed over a first substrate. A photoresist layer is formed over the first substrate and interconnect pad. A portion of the photoresist layer is removed to form a channel and expose a perimeter of the interconnect pad while leaving the photoresist layer covering a central area of the interconnect pad. A first conductive material is deposited in the channel of the photoresist layer to form a column of conductive material. The remainder of the photoresist layer is removed. A masking layer is formed around the column of conductive material while exposing the interconnect pad within the column of conductive material. A second conductive material is deposited over the first conductive layer. The second conductive material extends above the column of conductive material. The masking layer is removed. The second conductive material is reflowed to form a column interconnect structure over the semiconductor device. | 05-05-2011 |
20110254146 | Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape - A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of solder material with a plurality of recesses is disposed between the contact pads of the semiconductor die and substrate. The solder tape is brought to a liquidus state to separate a portion of the solder tape outside a footprint of the contact pads of the semiconductor die and substrate under surface tension and coalesce the solder material as an electrical interconnect substantially within the footprint of the contact pads of the semiconductor die and substrate. The contact pads on the semiconductor die and substrate can be formed with an extension or recess to increase surface area of the contact pads. | 10-20-2011 |
20120043672 | Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate - A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset with respect to the first conductive pillars. First BOT interconnect sites are formed over a second substrate. Second BOT interconnect sites are formed over the second substrate alternating with the first interconnect sites. The second interconnect sites are vertically offset with respect to the first interconnect sites. The first substrate is mounted to the second substrate such that the first conductive pillars are aligned with and electrically connected to the first interconnect sites and the second conductive pillars are aligned with and electrically connected to the second interconnect sites. An underfill material is deposited between the first and second substrates. The first substrate can be a flipchip type semiconductor device. | 02-23-2012 |
20120187559 | Semiconductor Device and Method of Forming Column Interconnect Structure to Reduce Wafer Stress - An interconnect pad is formed over a first substrate. A photoresist layer is formed over the first substrate and interconnect pad. A portion of the photoresist layer is removed to form a channel and expose a perimeter of the interconnect pad while leaving the photoresist layer covering a central area of the interconnect pad. A first conductive material is deposited in the channel of the photoresist layer to form a column of conductive material. The remainder of the photoresist layer is removed. A masking layer is formed around the column of conductive material while exposing the interconnect pad within the column of conductive material. A second conductive material is deposited over the first conductive layer. The second conductive material extends above the column of conductive material. The masking layer is removed. The second conductive material is reflowed to form a column interconnect structure over the semiconductor device. | 07-26-2012 |
20120211892 | Semiconductor Device and Method of Forming WLCSP Structure Using Protruded MLP - A semiconductor device can include a carrier substrate, and a first semiconductor die disposed on a surface of the carrier substrate. An encapsulant can be disposed over the first semiconductor die and the carrier substrate. The semiconductor device can include first vias disposed through the encapsulant as well as second vias disposed through the encapsulant to expose first contact pads. The first contact pads are on upper surfaces of the first semiconductor die. The semiconductor device can include conductive pillars that fill the first vias, and first conductive metal vias (CMVs) that fill the second vias. The conductive pillar can include a first conductive material, and the first CMVs can be in contact with the first contact pads. The semiconductor device can include a conductive layer disposed over the encapsulant. The conductive layer can electrically connect one of the first CMVs with one of the conductive pillars. | 08-23-2012 |
20120217629 | Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump - A semiconductor device has a carrier. A semiconductor wafer including a semiconductor die is mounted to the carrier with an active surface of the semiconductor die facing away from the carrier. A plurality of bumps is formed over the active surface of the semiconductor die. An opening is formed in a periphery of the semiconductor die. An encapsulant is deposited over the carrier and semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant. A conductive via is formed through the encapsulant, within the opening, and extends to the carrier. A conductive layer is formed over the encapsulant and electrically connects to the conductive via and the exposed portion of the plurality of bumps. The carrier is removed to expose an end of the conductive via. | 08-30-2012 |
20120217640 | Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer - A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad. | 08-30-2012 |
20120306097 | Semiconductor Device and Method of Forming WLCSP Structure using Protruded MLP - A semiconductor device can include a carrier substrate, and a first semiconductor die disposed on a surface of the carrier substrate. An encapsulant can be disposed over the first semiconductor die and the carrier substrate. The semiconductor device can include first vias disposed through the encapsulant as well as second vias disposed through the encapsulant to expose first contact pads. The first contact pads are on upper surfaces of the first semiconductor die. The semiconductor device can include conductive pillars that fill the first vias, and first conductive metal vias (CMVs) that fill the second vias. The conductive pillar can include a first conductive material, and the first CMVs can be in contact with the first contact pads. The semiconductor device can include a conductive layer disposed over the encapsulant. The conductive layer can electrically connect one of the first CMVs with one of the conductive pillars. | 12-06-2012 |
20120306104 | Semiconductor Device and Method of Forming Interconnect Structure With Conductive Pads Having Expanded Interconnect Surface Area for Enhanced Interconnection Properties - A semiconductor device has a substrate and first conductive pads formed over the substrate. An interconnect surface area of the first conductive pads is expanded by forming a plurality of recesses into the first conductive pads. The recesses can be an arrangement of concentric rings, arrangement of circular recesses, or arrangement of parallel linear trenches. Alternatively, the interconnect surface area of the first conductive pads is expanded by forming a second conductive pad over the first conductive pad. A semiconductor die has a plurality of interconnect structures formed over a surface of the semiconductor die. The semiconductor die is mounted to the substrate with the interconnect structures contacting the expanded interconnect surface area of the first conductive pads to increase bonding strength of the interconnect structure to the first conductive pads. A mold underfill material is deposited between the semiconductor die and substrate. | 12-06-2012 |
20130001773 | Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump - A semiconductor device has a carrier. A semiconductor wafer including a semiconductor die is mounted to the carrier with an active surface of the semiconductor die facing away from the carrier. A plurality of bumps is formed over the active surface of the semiconductor die. An opening is formed in a periphery of the semiconductor die. An encapsulant is deposited over the carrier and semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant. A conductive via is formed through the encapsulant, within the opening, and extends to the carrier. A conductive layer is formed over the encapsulant and electrically connects to the conductive via and the exposed portion of the plurality of bumps. The carrier is removed to expose an end of the conductive via. | 01-03-2013 |
20130032952 | Semiconductor Device and Method of Forming POP With Stacked Semiconductor Die and Bumps Formed Directly on the Lower Die - A semiconductor device has a first semiconductor wafer mounted to a carrier. A second semiconductor wafer is mounted to the first semiconductor wafer. The first and second semiconductor wafers are singulated to separate stacked first and second semiconductor die. A peripheral region between the stacked semiconductor die is expanded. A conductive layer is formed over the carrier between the stacked semiconductor die. Alternatively, a conductive via is formed partially through the carrier. A bond wire is formed between contact pads on the second semiconductor die and the conductive layer or conductive via. An encapsulant is deposited over the stacked semiconductor die, bond wire, and carrier. The carrier is removed to expose the conductive layer or conductive via and contact pads on the first semiconductor die. Bumps are formed directly on the conductive layer and contact pads on the first semiconductor die. | 02-07-2013 |
20130147053 | Semiconductor Device and Method of Making Single Layer Substrate with Asymmetrical Fibers and Reduced Warpage - A semiconductor device includes a first carrier having a first resin disposed over the first carrier. A fabric is disposed over the first resin. A second resin is formed over the first resin and around the fabric to form an asymmetrical pre-impregnated (PPG) substrate. The first carrier is removed. A second carrier is provided and a first conductive layer is formed over the second carrier. A portion of the first conductive layer is removed. The first conductive layer is transferred from the second carrier to the first resin. The first conductive layer is oriented asymmetrically such that the first conductive layer is offset with respect to the fabric to minimize warpage. The second carrier is removed. A via is formed through the second resin and fabric to expose the first conductive layer. A second conductive layer formed in the via over the first conductive layer. | 06-13-2013 |
20130154090 | Semiconductor Device and Method of Forming Interconnect Structure with Conductive Pads Having Expanded Interconnect Surface Area for Enhanced Interconnection Properties - A semiconductor device has a substrate and first conductive pads formed over the substrate. An interconnect surface area of the first conductive pads is expanded by forming a plurality of recesses into the first conductive pads. The recesses can be an arrangement of concentric rings, arrangement of circular recesses, or arrangement of parallel linear trenches. Alternatively, the interconnect surface area of the first conductive pads is expanded by forming a second conductive pad over the first conductive pad. A semiconductor die has a plurality of interconnect structures formed over a surface of the semiconductor die. The semiconductor die is mounted to the substrate with the interconnect structures contacting the expanded interconnect surface area of the first conductive pads to increase bonding strength of the interconnect structure to the first conductive pads. A mold underfill material is deposited between the semiconductor die and substrate. | 06-20-2013 |
20130234324 | Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate - A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset with respect to the first conductive pillars. First BOT interconnect sites are formed over a second substrate. Second BOT interconnect sites are formed over the second substrate alternating with the first interconnect sites. The second interconnect sites are vertically offset with respect to the first interconnect sites. The first substrate is mounted to the second substrate such that the first conductive pillars are aligned with and electrically connected to the first interconnect sites and the second conductive pillars are aligned with and electrically connected to the second interconnect sites. An underfill material is deposited between the first and second substrates. The first substrate can be a flipchip type semiconductor device. | 09-12-2013 |
20140008783 | Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape - A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of solder material with a plurality of recesses is disposed between the contact pads of the semiconductor die and substrate. The solder tape is brought to a liquidus state to separate a portion of the solder tape outside a footprint of the contact pads of the semiconductor die and substrate under surface tension and coalesce the solder material as an electrical interconnect substantially within the footprint of the contact pads of the semiconductor die and substrate. The contact pads on the semiconductor die and substrate can be formed with an extension or recess to increase surface area of the contact pads. | 01-09-2014 |
20140175642 | Semiconductor Device and Method of Forming Interconnect Structure with Conductive Pads Having Expanded Interconnect Surface Area for Enhanced Interconnection Properties - A semiconductor device has a substrate and first conductive pads formed over the substrate. An interconnect surface area of the first conductive pads is expanded by forming a plurality of recesses into the first conductive pads. The recesses can be an arrangement of concentric rings, arrangement of circular recesses, or arrangement of parallel linear trenches. Alternatively, the interconnect surface area of the first conductive pads is expanded by forming a second conductive pad over the first conductive pad. A semiconductor die has a plurality of interconnect structures formed over a surface of the semiconductor die. The semiconductor die is mounted to the substrate with the interconnect structures contacting the expanded interconnect surface area of the first conductive pads to increase bonding strength of the interconnect structure to the first conductive pads. A mold underfill material is deposited between the semiconductor die and substrate. | 06-26-2014 |
20140319680 | Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer - A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad. | 10-30-2014 |
Patent application number | Description | Published |
20130110602 | MOBILE TERMINAL AND METHOD OF PROVIDING SOCIAL COMMERCE SERVICE THEREIN USING SNS | 05-02-2013 |
20130274564 | APPARATUS AND METHOD FOR PREDICTING UPCOMING STAGE OF CAROTID STENOSIS - An apparatus and a method predict an upcoming stage of carotid stenosis. The apparatus includes a receiving unit, a cluster determining unit, a risk factor score extracting unit, a prediction model storage unit, and a predicting unit. The method includes receiving a patient's medical test data relating to carotid stenosis; determining a cluster to which the patient's medical test data belong based on a gender of the patient; extracting from the patient's medical test data a risk factor score comprising a result of carotid stenosis ultrasonography; storing a plurality of prediction models used to predict an upcoming stage of carotid stenosis; and obtaining an outcome by applying a value indicating a stage of carotid stenosis corresponding to the result of carotid stenosis ultrasonography and the extracted risk factor score to the prediction model corresponding to the determined cluster among the plurality of prediction models. | 10-17-2013 |
20130275154 | APPARATUS AND METHOD FOR PREDICTING POTENTIAL DEGREE OF CORONARY ARTERY CALCIFICATION (CAC) RISK - A method of predicting a potential degree of Coronary Artery Calcification (CAC) risk includes receiving a patient's medical test data relating to CAC; determining a cluster to which the patient's medical test data belong based on an age of the patient; extracting a risk factor score including at least two Coronary Artery Calcification Scores (CACSs) from the medical test data; storing a plurality of prediction models used for predicting a potential degree of CAC risk; and predicting a potential degree of CAC risk at a specific point in time by applying a CACS growth rate of the patient's medical test data calculated using the at least two CACSs of the patient's medical test data and the extracted risk factor score to a prediction model corresponding to the determined cluster to which the patient's medical test data belong among the plurality of prediction models. | 10-17-2013 |
20130275347 | APPARATUS AND METHOD FOR PREDICTING POTENTIAL CHANGE OF CORONARY ARTERY CALCIFICATION (CAC) LEVEL - An apparatus and a method predict a patient's potential change of Coronary Artery Calcification (CAC) level using various risk factors including a Coronary Artery Calcification Score (CACS). The apparatus includes a receiving unit, a cluster determining unit, a risk factor score extracting unit, a prediction model storage unit, a prediction model learning unit, and a predicting unit, and the method includes a receiving process, a risk factor score extracting process, and an operation performing process. | 10-17-2013 |
Patent application number | Description | Published |
20140254686 | METHOD AND APPARATUS FOR PREDICTIVE ENCODING/DECODING OF MOTION VECTOR - A video encoding apparatus for predicting a motion vector of a current block to be encoded is to determine one or more representative blocks from neighboring blocks of the current block according to priorities of the neighboring blocks; and encode the motion vector of the current block by using, as a predicted motion vector of the current block, a first motion vector selected from motion vectors of the determined one or more representative blocks and a second motion vector of at least one block within a reference picture. | 09-11-2014 |
20140269916 | METHOD AND APPARATUS FOR VIDEO ENCODING/DECODING USING IMPROVED MERGE - A video encoding apparatus includes an inter predictor to check for availability of merge candidates configured from neighboring blocks of a current block, add into a merge candidate set, as one of the merge candidates, a combined bi-predictive motion parameter with respect to an unavailable block, the combined bi-predictive motion parameter generated by combining a list 0 motion parameter of a first available andidate block and a list 1 motion parameter of a second available candidate block, when the unavailable block is checked to be present among the merge candidates, and predict the current block by using a motion parameter corresponding to a merge candidate selected from the merge candidates including the combined bi-predictive motion parameter, to thereby generate a predicted block for the current block. | 09-18-2014 |
20140286392 | METHOD AND APPARATUS FOR ENCODING/DECODING IMAGE BY USING ADAPTIVE LOOP FILTER ON FREQUENCY DOMAIN USING CONVERSION - A video encoding method for reducing encoding error by using a loop filter is provided, the method including: generating a reconstructed image from encoded data of an original image; determining one or more regions on which the loop filter is applied in the reconstructed image; transforming the original image and the reconstructed image which correspond to each region of the determined one or more regions from a spatial domain into a frequency domain; determining loop filter coefficients for said each region by comparing the transformed original image and the transformed reconstructed image; loop-filtering the reconstructed image based on the loop filter coefficients for said each region; and encoding information on the loop filter coefficients for said each region. | 09-25-2014 |
20140328403 | IMAGE ENCODING/DECODING METHOD AND APPARATUS USING WEIGHT PREDICTION - A method for decoding video images includes: determining a coding block, from a bitstream, which is divided in a quadtree structure from a largest coding block; decoding, from the bitstream, motion information on one or more prediction blocks divided from the coding block; predicting the prediction blocks based on the motion information; reconstructing a residual block from the bitstream; and reconstructing the coding block by adding the predicted prediction blocks and the reconstructed residual block. The predicting of the prediction blocks includes: generating first predicted pixels within each of the prediction blocks by using the motion information; decoding, from the bitstream, a weighted prediction parameter applicable to each of the prediction blocks; and generating second predicted pixels within each of the prediction blocks by applying the weighted prediction parameter to the first predicted pixels within each of the prediction blocks. | 11-06-2014 |
20160044331 | METHOD AND APPARATUS FOR VIDEO ENCODING/DECODING USING IMPROVED MERGE - A video encoding apparatus includes an inter predictor to check for whether predetermined candidate adding conditions are satisfied, add into a merge candidate set including merge candidates corresponding to neighboring blocks of a current block, a combined bi-predictive motion parameter, the combined bi-predictive motion parameter generated by combining a list 0 motion parameter of a first available candidate block and a list 1 motion parameter of a second available candidate block, when the predetermined candidate adding conditions are satisfied, and predict the current block by using a motion parameter corresponding to a merge candidate selected from the merge candidate set, to thereby generate a predicted block for the current block. Herein, the merge candidate set corresponds to a maximum number of the merge candidates, the maximum number of the merge candidates corresponding to information on the number of the merge candidates included in a bistream. | 02-11-2016 |
Patent application number | Description | Published |
20110018976 | IMAGE DISPLAY APPARATUS AND METHOD FOR OPERATING THE SAME - An image display apparatus and a method for operating the same are disclosed. The method for operating an image display apparatus includes receiving an image including at least one three-dimensional (3D) object, calculating a depth value of the at least one 3D object, changing at least one of sharpness and brightness of pixels corresponding to the at least one 3D object according to the depth value and generating an output image including the changed at least one 3D object, and displaying the output image. | 01-27-2011 |
20130236067 | Computationally Efficient Feature Extraction and Matching Iris Recognition - A method and system for uniquely identifying a subject based on an iris image. After obtaining the iris image, the method produces a filtered iris image by applying filters to the iris image to enhance discriminative features of the iris image. The method analyzes an intensity value for pixels in the filtered iris image to produce an iris code that uniquely identifies the subject. The method also creates a segmented iris image by detecting an inner and outer boundary for an iris region in the iris image, and remapping pixels in the iris region, represented in a Cartesian coordinate system, to pixels in the segmented iris image, represented in a log-polar coordinate system, by employing a logarithm representation process. The method also creates a one-dimensional iris string from the iris image by unfolding the iris region by employing a spiral sampling method to obtain sample pixels in the iris region, wherein the sample pixels are the one-dimensional iris string. | 09-12-2013 |
20140123195 | CONTROL VIDEO CONTENT PLAY SPEED - In one example embodiment, a system includes a content provider configured to transmit video content including a plurality of scenes; and an apparatus configured to: receive an input including a target playing time of the video content and a condition for changing a playing speed, determine a priority value for each of the scenes based at least in part on the condition for changing the playing speed, and determine a playing speed of each of the scenes based at least in part on the determined priority value and the target playing time of the video content. | 05-01-2014 |
20160019422 | Computationally Efficient Feature Extraction and Matching Iris Recognition - A method and system for uniquely identifying a subject based on an iris image. After obtaining the iris image, the method produces a filtered iris image by applying filters to the iris image to enhance discriminative features of the iris image. The method analyzes an intensity value for pixels in the filtered iris image to produce an iris code that uniquely identifies the subject. The method also creates a segmented iris image by detecting an inner and outer boundary for an iris region in the iris image, and remapping pixels in the iris region, represented in a Cartesian coordinate system, to pixels in the segmented iris image, represented in a log-polar coordinate system, by employing a logarithm representation process. The method also creates a one-dimensional iris string from the iris image by unfolding the iris region by employing a spiral sampling method to obtain sample pixels in the iris region, wherein the sample pixels are the one-dimensional iris string. | 01-21-2016 |