Sun-Hwan
Sun Hwan Hwang, Seoul KR
Patent application number | Description | Published |
---|---|---|
20130317127 | Nickel-M-Alumina Xerogel Catalyst, Method for Preparing the Same, and Method for Preparing Methane Using the Catalyst - A nickel-M-alumina hybrid xerogel catalyst for preparing methane, wherein the metal M is at least one element selected from the group consisting of Fe, Co, Ni, Ce, La, Mo, Cs, Y, and Mg, a method for preparing the catalyst and a method for preparing methane using the catalyst are provided. The catalyst has strong resistance against a high-temperature sintering reaction and deposition of carbon species, and can effectively improve a conversion ratio of carbon monoxide and selectivity to methane. | 11-28-2013 |
Sun Hwan Hwang, Ichon-Si KR
Patent application number | Description | Published |
---|---|---|
20100099243 | METHOD FOR FORMING DIODE IN PHASE CHANGE RANDOM ACCESS MEMORY DEVICE - A method for forming a diode of a phase change random access memory device includes preparing a semiconductor substrate having a dopant area formed thereon. An insulating layer on the semiconductor substrate is formed and a contact hole is formed by etching a part of the insulating layer such that a specific region of the dopant area is exposed. A silicon layer doped with a first-type dopant is formed in the contact hole. A part of the silicon layer is doped with a second-type dopant source gas through a gas cluster ion beam process. | 04-22-2010 |
Sun Hwan Joo, Gwangju KR
Patent application number | Description | Published |
---|---|---|
20150145399 | REFRIGERATOR - A refrigerator includes a main body, a storage chamber provided in the main body, and a door opening and closing the storage chamber, wherein the door includes a front panel comprising a front portion forming a front exterior of the door, an edge portion bent from the front portion and a side portion bent from the edge portion and forming a side exterior, a rear panel coupled to a rear side of the front panel, an insulation material provided at an inner space defined by the front panel and the rear panel, and a decorative member coupled to the edge portion and forming an exterior. Due to such a configuration, the edge portion of the door has enhanced aesthetic appeal. | 05-28-2015 |
Sun Hwan Ko, Gimpo-Si KR
Patent application number | Description | Published |
---|---|---|
20130028808 | LARGE-CAPACITY METAL CATALYST CARRIER AND CATALYTIC CONVERTER USING SAME - Provided is a large-capacity metal catalyst support and a catalytic converter using the same, in which a number of unit catalyst support blocks are changed in a form of being effectively assembled so as to be applied to a catalytic converter that is required for processing a large amount of exhaust gas such as large vessels or plants employing a number of large-scale internal combustion engines, or large food processing devices, to thus easily assemble the unit catalyst support blocks into a large-scale assembled structure. The catalyst support includes: a number of unit catalyst support blocks in which cell formation bodies formed of a number of hollow cells that are aligned in a longitudinal direction are accommodated and stacked in a polygonal supporter wherein a catalyst is coated on the surfaces of the hollow cells; and a number of assembly members each for fixing a pair of adjacent supports that mutually contact between the stacked unit catalyst support blocks. | 01-31-2013 |
Sun Hwan Lee, Hwaseong-Si KR
Patent application number | Description | Published |
---|---|---|
20140154330 | SPHERICAL PARTICLES OF CLOPIDOGREL BISULFATE, PHARMACEUTICAL COMPOSITION COMPRISING THE SAME, AND PREPARATION METHOD THEREOF - Disclosed are spherical particles of clopidogrel bisulfate and a pharmaceutical composition containing the same. The spherical particles can be used for preparing a tablet having sufficient hardness through direct compression, by improving unformulable properties of clopidogrel bisulfate such as compressibility, flowability and strong surface electrostatic charges, reduce a problem in compressing tablets such as weight variation, sticking, etc., and the risk of form conversion, and improve physiochemical stability. Therefore, the spherical particles of the present invention may be used as therapeutics for arteriosclerosis, stroke, myocardial infarction and atherosclerosis. | 06-05-2014 |
Sun-Hwan Hwang, Gyeonggi-Do KR
Patent application number | Description | Published |
---|---|---|
20100317166 | METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE - A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer. | 12-16-2010 |
20110027988 | METHOD FOR FORMING BURIED WORD LINE IN SEMICONDUCTOR DEVICE - Provided is a method for forming a buried word line in a semiconductor device. The method includes forming a trench by etching a pad layer and a substrate, forming a conductive layer to fill the trench, planarizing the conductive layer until the pad layer is exposed, performing an etch-back process on the planarized conductive layer, and performing an annealing process in an atmosphere of a nitride-based gas after at least one of the forming of the conductive layer, the planarizing of the conductive layer, and the performing of the etch-back process on the planarized conductive layer. | 02-03-2011 |
20120021574 | METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE - A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer. | 01-26-2012 |
20120108057 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATES - A method for fabricating a semiconductor device includes forming first plugs over a substrate, forming contact holes that expose the first plugs, ion-implanting an anti-diffusion material into the first plugs, and forming second plugs filling the contact holes. | 05-03-2012 |
20130049209 | SEMICONDUCTOR DEVICE WITH DAMASCENE BIT LINE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes first conductive patterns adjacent to each other and isolated by a trench including first and second trenches, a second conductive pattern formed in the first trench, and an insulating pattern partially filling the second trench under the second conductive pattern and formed between the first conductive patterns and the second conductive pattern. | 02-28-2013 |
20130130454 | METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE - A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer. | 05-23-2013 |
20130137228 | METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE - A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer. | 05-30-2013 |
Sun-Hwan Hwang, Ichno-Shi KR
Patent application number | Description | Published |
---|---|---|
20090189243 | SEMICONDUCTOR DEVICE WITH TRENCH ISOLATION STRUCTURE AND METHOD FOR FABRICATING THE SAME - The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a trench formed in the substrate; and at least one device isolation structure including an oxide layer formed on the trench, a nitride layer formed on the oxide layer disposed on sidewalls of the trench and a high density plasma oxide layer formed on the nitride layer to fill the trench. | 07-30-2009 |
Sun-Hwan Hwang, Ichon-Shi KR
Patent application number | Description | Published |
---|---|---|
20090061602 | METHOD FOR DOPING POLYSILICON AND METHOD FOR FABRICATING A DUAL POLY GATE USING THE SAME - A method for doping polysilicon improves a doping profile during plasma doping and includes forming a silicon layer using two separate operations. After forming a first silicon layer, thermal annealing is performed to crystallize the first silicon layer, such that the uniformity of a doping concentration according to the depth of a layer inside is improved during plasma doping. Additionally, a doping concentration at the interface between a polysilicon layer and a gate oxide layer is increased. A by-product deposition layer is reduced, which is formed on the surface of a polysilicon layer due to the increase of a doping concentration in a polysilicon layer. As a result, the dopant loss, which is caused by the removing and cleansing of an ion implantation barrier used during doping, is reduced. | 03-05-2009 |
Sun-Hwan Lee, Gyeonggi-Do KR
Patent application number | Description | Published |
---|---|---|
20090023764 | Use of Pyrimidinedione Derivative for Preventing or Treating Hepatitis C - A pyrimidinedione derivative of formula (I) or a pharmaceutically acceptable salt thereof exhibits excellent inhibitory activity against hepatitis C virus. | 01-22-2009 |