Sujit Sharan, Chandler US
Sujit Sharan, Chandler, AZ US
Patent application number | Description | Published |
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20080237718 | METHODS OF FORMING HIGHLY ORIENTED DIAMOND FILMS AND STRUCTURES FORMED THEREBY - Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a first HOD layer on a first side of a first silicon substrate, forming a CMOS region on a second side of the silicon substrate, forming amorphous silicon on the CMOS region, recrystallizing the amorphous silicon to form a first single crystal silicon layer, and forming a second HOD layer on the first single crystal silicon layer. | 10-02-2008 |
20080237844 | Microelectronic package and method of manufacturing same - A microelectronic package includes a package substrate ( | 10-02-2008 |
20090242247 | Package substrate and die spacer layers having a ceramic backbone - A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material. | 10-01-2009 |
20100327424 | Multi-chip package and method of providing die-to-die interconnects in same - A multi-chip package includes a substrate ( | 12-30-2010 |
20110122592 | First-level interconnects with slender columns, and processes of forming same - A column is coupled to a last metallization of a die and the column is mated to a mounting substrate with that aid of a solder. The column may have the solder attached thereto before mating to the mounting substrate and the mounting substrate may be a bare-board (no solder mask) during the mating process. The column has an aspect ratio between 0.75 and 10. | 05-26-2011 |
20120152601 | Package substrate and die spacer layers having a ceramic backbone - A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material. | 06-21-2012 |
20120261838 | MULTI-CHIP PACKAGE AND METHOD OF PROVIDING DIE-TO-DIE INTERCONNECTS IN SAME - A multi-chip package includes a substrate ( | 10-18-2012 |
20130341076 | Package substrate and die spacer layers having a ceramic backbone - A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material. | 12-26-2013 |