Patent application number | Description | Published |
20080229008 | Sharing physical memory locations in memory devices - A memory structure includes a plurality of address banks where each address bank is operative to store a memory address. In certain embodiments, at least two of the address banks share physical memory locations for at least one redundant most significant bit. Additionally, at least two of the address banks in certain embodiments share physical memory locations for at least one redundant most significant bit and at least one redundant least significant bit. At least two of the address banks in certain embodiments also share physical memory locations for at least one redundant interior bit. | 09-18-2008 |
20090072855 | DYNAMICALLY ADJUSTING OPERATION OF A CIRCUIT WITHIN A SEMICONDUCTOR DEVICE - Systems and methods for dynamically adjusting operation of a circuit within a semiconductor device are described herein. At least some illustrative embodiments include a system that includes a matching circuit including a first plurality of switching devices coupled to each other in parallel and not coupled in parallel to a resistive device, a driver circuit including a plurality of driver devices (the driver circuit adjusted based upon which of the switching devices are enabled), and processing logic that couples to the matching and driver circuits. The processing logic derives a binary value indicative of which of the switching devices are to be enabled, the binary value reflecting one or more process comers associated with the switching devices, and not reflecting one or more process comers associated with the resistive device. The processing logic further maps the binary value to a control value used to adjust the driver circuit. | 03-19-2009 |
20090254925 | SYSTEM AND METHOD FOR CONFIGURING DRIVERS - Driver systems and methods are provided, such as those that include identifying a process corner of a driver; and configuring the driver based on the identified process corner. Further embodiments provide a method that includes detecting a process corner of a driver, setting a reference voltage of a calibration circuit based on the process corner detected, and configuring the driver based on the reference voltage. | 10-08-2009 |
20110019713 | SYSTEM AND METHOD FOR AUTOMATICALLY CALIBRATING A TEMPERATURE SENSOR - There is provided a system and method for automatically calibrating a temperature sensor. More specifically, there is provided a system including a temperature sensor that includes a first resistance configured to indicate a temperature of the temperature sensor and a second resistance, in series with the first resistor, wherein the second resistance is adjustable to calibrate the first resistance, and a calibration circuit, coupled to the temperature sensor and configured to automatically calibrate the first resistance. | 01-27-2011 |
20110167193 | SHARING PHYSICAL MEMORY LOCATIONS IN MEMORY DEVICES - A memory structure includes a plurality of address banks where each address bank is operative to store a memory address. In certain embodiments, at least two of the address banks share physical memory locations for at least one redundant most significant bit. Additionally, at least two of the address banks in certain embodiments share physical memory locations for at least one redundant most significant bit and at least one redundant least significant bit. At least two of the address banks in certain embodiments also share physical memory locations for at least one redundant interior bit. | 07-07-2011 |
20140040922 | SYSTEM AND METHOD FOR CONFIGURING DRIVERS - Driver systems and methods are provided, such as those that include identifying a process corner of a driver; and configuring the driver based on the identified process corner. Further embodiments provide a method that includes detecting a process corner of a driver, setting a reference voltage of a calibration circuit based on the process corner detected, and configuring the driver based on the reference voltage. | 02-06-2014 |
20150023386 | SYSTEM AND METHOD FOR AUTOMATICALLY CALIBRATING A TEMPERATURE SENSOR - There is provided a system and method for automatically calibrating a temperature sensor. More specifically, there is provided a system including a temperature sensor that includes a first resistance configured to indicate a temperature of the temperature sensor and a second resistance, in series with the first resistor, wherein the second resistance is adjustable to calibrate the first resistance, and a calibration circuit, coupled to the temperature sensor and configured to automatically calibrate the first resistance. | 01-22-2015 |
20150302907 | APPARATUSES AND METHODS FOR IMPLEMENTING MASKED WRITE COMMANDS - Apparatuses and methods for implementing masked write commands are disclosed herein. An example apparatus may include a memory bank, a local buffer circuit, and an address control circuit. The local buffer circuit may be associated with the memory bank. The address control circuit may be coupled to the memory bank and configured to receive a command and an address associated with the command. The address control circuit may include a global buffer circuit configured to store the address. The address control circuit may further be configured to delay the command using one of a plurality of command paths based, at least in part, on a write latency and to provide the address stored in the global buffer circuit to the local buffer circuit to be stored therein. | 10-22-2015 |