Suh, CA
Bengwon Suh, Cupertino, CA US
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20110153595 | System And Method For Identifying Topics For Short Text Communications - A system and method for identifying topics for short text communications is provided. Tokens are extracted from a short text communication. A query is generated using the extracted tokens. The query is applied to a set of documents. Those documents in the set that match the query are identified as search results. Salient terms associated with each of the search results are identified. A threshold is applied to the identified salient terms. The salient terms that satisfy the threshold are selected as topics for the short text communication. | 06-23-2011 |
Bongwon Suh, Cupertino, CA US
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20110153646 | System And Method For Triaging Of Information Feeds - A system and method for triaging of information feeds is provided. A plurality of information feeds are received. At least one topic is identified from each information feed. At least one topic is presented to a user in topic facet including a plurality of identified topics. A selection of one of the plurality of topics is received from the user. The user interface is updated to display only the feeds that contain the selected topic. | 06-23-2011 |
20110191428 | System And Method For Content Tagging And Distribution Through Email - A system and method for content tagging and distribution through email are provided. A user-to-tag record including content tags, each associated with one or more users, is maintained. An incoming email message with a tag address is received. The tag address is processed to identify a content tag, which is applied to the user-to-tag record. Users associated with the identified content tag are determined. The incoming email message is provided to the associated users. | 08-04-2011 |
20120265771 | SYSTEM AND METHOD FOR IDENTIFYING USERS RELEVANT TO A TOPIC OF INTEREST - A system and method for identifying users relevant to a topic of interest is provided. A query comprising one or more topics is executed against a corpus of messages. Voting users associated with the messages matching the query are identified. A set of candidate users comprising users connected to the voting users is generated. A relevancy score is computed for each candidate user. The candidate users are ranked by their respective relevancy score. | 10-18-2012 |
20130325989 | System And Method For Content-Based Message Distribution - A system and method for content-based message distribution are provided. An incoming message with a recipient address and a tag address including at least one content tag associated with one or more users is received. The content tag within the tag address and a recipient associated with the recipient address are identified. The recipient is added to the content tag as one of the users. The incoming message is displayed to at least one of the users associated with the content tag. | 12-05-2013 |
20140068407 | IDENTIFYING WEB PAGES THAT ARE LIKELY TO GUIDE BROWSING VIEWERS TO IMPROVE CONVERSION RATE - A method and system for extracting from a web log for a given entity information comprising web page events. The information gain in the sequence of navigating from a given web page to a subsequent web page is computed for at least some of the web page events. The information gain is used to determine a set of web pages from which users can decide to navigate to a first web page or a second web page, wherein navigating to the first web page is more likely to lead to a conversion than navigating to the second web page. A list of at least a subset of the set of web pages is transmitted to the entity, which can use the list to determine web pages at which the entity can place advertising material to motivate a user to navigate to the first web page. The computing may be performed by MapReduce processing. | 03-06-2014 |
Changho Suh, Albany, CA US
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20100210295 | Uplink power control for wireless systems - Techniques are described that can be used to determine a transmitter power level of a mobile station at cell edge. To determine transmitter power level, the technique considers at least a balance of power transmitted by mobile stations near cell edge and power transmitted by mobile stations closer to cell center, target mean received power by the base station from mobile stations near center cell, target mean power transmitted from cell edge mobile stations, signal-to-interference-power ratio between signals transmitted from base stations of different cells to the mobile station at cell edge, and channel gain. | 08-19-2010 |
Charles Hyunsang Suh, Irvine, CA US
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20110277820 | Solar Cell Structure Including A Silicon Carrier Containing A By-Pass Diode - A solar cell structure including a silicon carrier defining a front side and a back side, and including an N-type portion having an exposed portion on the front side of the carrier and a P-type portion having an exposed portion on the front side of the carrier, the N-type portion and the P-type portion defining a P-N junction, and a solar cell defining a front side and a back side, wherein the solar cell is connected to the front side of the carrier such that the back side of the solar cell is electrically coupled to the exposed portion of the N-type portion, and wherein the front side of the solar cell is electrically coupled to the exposed portion of the P-type portion. | 11-17-2011 |
Chris Suh, San Jose, CA US
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20090223893 | Method and Device for Desalting an Analyte - The invention provides gel filtration columns for the purification of an analyte (e.g., a biological macromolecule, such as a peptide, protein or nucleic acid) from a sample solution, as well as methods for making and using such columns. The columns typically include a bed of gel filtration media positioned above a bottom frit or between a bottom and top frit. In some embodiments, the columns employ modified pipette tips as column bodies. In some embodiments, the invention provides methods and devices for desalting and/or buffer exchange of a sample. | 09-10-2009 |
20100129873 | Highly Parallel Gel-Free Cloning Method - A highly parallel method for gene cloning is presented. PCR products can be isolated using a solid phase and ligated into a positive selection vector. The cloning method has a very high success rate and can be performed entirely by a liquid handling robot with very little human intervention. | 05-27-2010 |
20100140173 | Method and Device for Gravity Flow Chromatography - The invention provides gravity chromatographic columns for the automated purification of a material (e.g., a biological macromolecule, such as a peptide, protein or nucleic acid) from a sample solution, as well as methods for making and using such columns. The columns typically include a bed of media positioned above a bottom frit or between a bottom and top frit. In some embodiments, the columns employ modified pipette tips as column bodies. In some embodiments, the columns employ modified plates or racks as column bodies. In some embodiments, the invention provides methods and devices for gel filtration, desalting, buffer exchange, ion exchange, ion-pairing, normal phase and reverse phase chromatography. In some embodiments, the invention provides multiplexing gravity flow chromatography on a liquid handling robotic system. | 06-10-2010 |
20100170852 | Method and Device for Gravity Flow Chromatography - The invention provides gravity chromatographic columns for the purification of a material (e.g., a biological macromolecule, such as a peptide, protein or nucleic acid) from a sample solution, as well as methods for making and using such columns. The columns typically include a bed of media positioned above a bottom frit or between a bottom and top frit. In some embodiments, the columns employ modified pipette tips as column bodies. In some embodiments, the columns employ modified plates or racks as column bodies. In some embodiments, the invention provides methods and devices for gel filtration, desalting, buffer exchange, ion exchange, ion-pairing, normal phase and reverse phase chromatography. In some embodiments, the invention provides multiplexing gravity flow chromatography on a liquid handling robotic system. | 07-08-2010 |
20100200509 | METHOD AND DEVICE FOR SAMPLE PREPARATION - The invention provides pipette tip extraction columns for the purification of a DNA vector from un-clarified cell lysate containing cell debris as well as methods for making and using such columns. The columns typically include a bed of extraction media positioned in the pipette tip column, above a bottom frit and with an optional top frit. | 08-12-2010 |
20110195518 | Method and Apparatus for Pipette Tip Columns - An apparatus and method of using a pipette with pipette tip columns were developed in which a pipette is operated with the pipette tip columns inserted into the wells of a microplate. In this configuration the pipette is free standing and is essentially perpendicular to the microplate. The open lower ends of the pipette tip column are approximately centered within the plate well. The columns and plate are designed in such a way that the open lower ends of the pipette tip columns are in contact with liquid in the plate well however, the columns do not seal on the well bottom, preventing flow in and out of the column. The pipette contains the appropriate firmware and software to control flow for all steps of pipette tip column operation. | 08-11-2011 |
20120083598 | Purification of Nucleic acids - The present invention solves the problem of isolating nucleic acids from cells in the presence of the growth medium. The invention is particularly useful for isolating extrachromosomal replicons such as plasmids. Cells are lysed in the presence of the medium in which they were grown and nucleic acids are isolated using a pipette tip column. A liquid handling robot can be used to isolate nucleic acids from multiple samples simultaneously without the need for human intervention. | 04-05-2012 |
20120252115 | METHODS AND DEVICES FOR NUCLEIC ACID PURIFICATION - The invention provides pipette tip columns and automated methods for the purification of nucleic acids such as plasmids from unclarified cell lysates containing cell debris as well as methods for making and using such columns. The columns typically include a bed of medium positioned in the pipette tip column, above a bottom frit and with an optional top frit. | 10-04-2012 |
20130252344 | Method and Device for Sample Preparation - The invention provides pipette tip extraction columns for the purification of a DNA vector from un-clarified cell lysate containing cell debris as well as methods for making and using such columns. The columns typically include a bed of extraction media positioned in the pipette tip column, above a bottom frit and with an optional top frit. | 09-26-2013 |
20140370590 | Purification of Nucleic Acids - The present invention solves the problem of isolating nucleic acids from cells in the presence of the growth medium. The invention is particularly useful for isolating extrachromosomal replicons such as plasmids. Cells are lysed in the presence of the medium in which they were grown and nucleic acids are isolated using a pipette tip column. A liquid handling robot can be used to isolate nucleic acids from multiple samples simultaneously without the need for human intervention. | 12-18-2014 |
20150119563 | METHODS AND DEVICES FOR NUCLEIC ACID PURIFICATION - The invention provides pipette tip columns and automated methods for the purification of nucleic acids such as plasmids from unclarified cell lysates containing cell debris as well as methods for making and using such columns. The columns typically include a bed of medium positioned in the pipette tip column, above a bottom frit and with an optional top frit. | 04-30-2015 |
Chung Yong Suh, San Diego, CA US
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20130134219 | DOCUMENT SCANNER WITH INSTANT RETRIEVAL PROCESS - An improved document scanner for imaging documents and decoding coded indicia such as bar codes and magnetic strips is disclosed. In a preferred embodiment, the scanner incorporates a set of emergency exit instructions so that a user can always retrieve sensitive documents at a moment's notice. These instructions include receiving an emergency exit command from a jamming sensor or from the user, and then attempting mechanical translation toward a first exit and further subsequent translation toward a second exit. If the document is not successfully retrieved, the scanner prepares for manual document extraction as detailed herein. | 05-30-2013 |
Dongwook Suh, Saratoga, CA US
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20100177586 | MEMORY ARCHITECTURE HAVING MULTIPLE PARTIAL WORDLINE DRIVERS AND CONTACTED AND FEED-THROUGH BITLINES - Various embodiments are disclosed relating to a memory circuit architecture. In an example embodiment, which may accommodate a change to a new memory size or cell aspect ratio, while migrating between different process nodes or the same process generation, while retaining at least a portion of the periphery circuitry, a memory circuit architecture may be employed in which the memory array is divided into an upper half and a lower half, thereby splitting the cache Ways among the two halves. The wordline may be split among the two array halves, with each half driven by a half wordline driver. Also, in another embodiment, two sets of bitlines may be provided for each column, including a contacted set of bitlines and a feed-through set of bitlines. | 07-15-2010 |
20120195152 | MEMORY ARCHITECTURE HAVING MULTIPLE PARTIAL WORDLINE DRIVERS AND CONTACTED AND FEED-THROUGH BITLINES - Various embodiments are disclosed relating to a memory circuit architecture. In an example embodiment, which may accommodate a change to a new memory size or cell aspect ratio, while migrating between different process nodes or the same process generation, while retaining at least a portion of the periphery circuitry, a memory circuit architecture may be employed in which the memory array is divided into an upper half and a lower half, thereby splitting the cache Ways among the two halves. The wordline may be split among the two array halves, with each half driven by a half wordline driver. Also, in another embodiment, two sets of bitlines may be provided for each column, including a contacted set of bitlines and a feed-through set of bitlines. | 08-02-2012 |
Eric J. Suh, Pasadena, CA US
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20150044084 | METHODS FOR FABRICATING GRADIENT ALLOY ARTICLES WITH MULTI-FUNCTIONAL PROPERTIES - Systems and methods for fabricating multi-functional articles comprised of additively formed gradient materials are provided. The fabrication of multi-functional articles using the additive deposition of gradient alloys represents a paradigm shift from the traditional way that metal alloys and metal/metal alloy parts are fabricated. Since a gradient alloy that transitions from one metal to a different metal cannot be fabricated through any conventional metallurgy techniques, the technique presents many applications. Moreover, the embodiments described identify a broad range of properties and applications. | 02-12-2015 |
Gookwon Edward Suh, Palo Alto, CA US
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20090083833 | AUTHENTICATION WITH PHYSICAL UNCLONABLE FUNCTIONS - Physical Unclonable Functions (PUFs) for authentication can be implemented in a variety of electronic devices including FPGAs, RFIDs, and ASICs. In some implementations, challenge-response pairs corresponding to individual PUFs can be enrolled and used to determine authentication data, which may be managed in a database. Later when a target object with a PUF is intended to be authenticated a set (or subset) of challenges are applied to each PUF device to authenticate it and thus distinguish it from others. In some examples, authentication is achieved without requiring complex cryptography circuitry implemented on the device. Furthermore, an authentication station does not necessarily have to be in communication with an authority holding the authentication data when a particular device is to be authenticated. | 03-26-2009 |
Gregory D. Suh, San Jose, CA US
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20120124474 | USER PRESENTATION SETTINGS FOR MULTIPLE MEDIA USER INTERFACES - Embodiments provide methods and apparatus for simultaneous presentation of multiple media user interfaces (UIs) based on user presentation settings. In some embodiments, a user may select presentation settings for a specific combination of at least two media UIs. The presentation settings may be stored and then retrieved and used when the specific combination of the at least two media UIs are later selected to be presented simultaneously. In some embodiments, presentation settings for a media UI comprise video and/or audio settings. Video settings may include position and size of a window presenting the media UI. Audio settings may include audio volume setting of the media UI. In some embodiments, each media UI in the combination of at least two media UIs may present a different type of media content (e.g., television content, Internet content, personal content, etc.). | 05-17-2012 |
Han C. Suh, San Diego, CA US
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20130231114 | METHODS AND DEVICES FOR FACILITATING LOCATION APPROXIMATION IN A CDMA 1X NETWORK - Apparatus and methods are disclosed for determining a position of an access terminal within a wireless communication network. In some examples, the access terminal retrieves system information from its current serving cell and stores the retrieved system information in memory along with an associated timestamp. Over time, as the access terminal moves about the network, it can accumulate this system information for a plurality of base stations within its memory. By utilizing the system information for a plurality of base stations rather than only the current serving base station, as well as the associated timestamps, additional position information can be provided to the access terminal. Other aspects, embodiments, and features are also claimed and described. | 09-05-2013 |
Insoo Suh, San Francisco, CA US
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20130178709 | METHODS FOR THE PREVENTION OF SURGICAL SITE INFECTIONS - Several methods to reduce surgical site infections include inserting a surgical access device into an incision, retracting tissue, and introducing fluid into the surgical access device such that the fluid exits the surgical access device and irrigates a surgical site. Other methods do not include introducing fluid into a surgical access device but include suctioning a fluid into the surgical access device and removing the fluid from the body. | 07-11-2013 |
20130178710 | SYSTEMS FOR THE PREVENTION OF SURGICAL SITE INFECTIONS - A surgical access system facilitates access to a surgical site within a patient's body through an incision in the body. Surgical access systems can have at least one retention member and a fluid transportation member configured to deliver fluid to a surgical site or to remove fluid from a surgical site. In some embodiments, a surgical access device irrigates a surgical site to reduce surgical site infections and removes fluid from the surgical site to increase a physician's visibility into the surgical site. | 07-11-2013 |
20130184535 | EXPANDABLE TISSUE RETRACTION DEVICES - A surgical access device facilitates access to a surgical site within a patient's body through an incision in the body. Surgical access devices can have a first retention member and a second retention member with a pliable membrane that extends between the first retention member and the second retention member. A retention member can include at least three linkages pivotably coupled to one another such that expanding the retention member causes at least some of the linkages to pivot relative to one another. The pliable membrane can be configured to expand the incision to facilitate access to the surgical site. | 07-18-2013 |
20130204068 | Apparatus and Methods For Treating Pulmonary Hypertension - A method is described for decreasing activity of at least one sympathetic nerve, nerve fiber or neuron innervating at least one blood vessel in the pulmonary vasculature of a patient to ameliorate pulmonary hypertension. In one embodiment, the method may involve advancing an intravascular treatment device to a target location in a target blood vessel within the pulmonary vasculature of the patient and using the treatment device to decrease activity of at least one sympathetic nerve, nerve fiber or neuron innervating the target blood vessel at or near the target location to ameliorate pulmonary hypertension. | 08-08-2013 |
20140221975 | APPARATUS AND METHODS FOR TREATING PULMONARY HYPERTENSION - A method is described for decreasing activity of at least one sympathetic nerve, nerve fiber or neuron innervating at least one blood vessel in the pulmonary vasculature of a patient to ameliorate pulmonary hypertension. In one embodiment, the method may involve advancing an intravascular treatment device to a target location in a target blood vessel within the pulmonary vasculature of the patient and using the treatment device to decrease activity of at least one sympathetic nerve, nerve fiber or neuron innervating the target blood vessel at or near the target location to ameliorate pulmonary hypertension. | 08-07-2014 |
20140316210 | METHODS AND DEVICES FOR THE PREVENTION OF INCISIONAL SURGICAL SITE INFECTIONS - A surgical access device for facilitating access through an incision to a surgical site in a patient's body has a pliable membrane which is configured to engage and expand the incision. The pliable membrane includes a base layer, a permeable membrane attached to the base layer, and a fluid channel disposed between the layers. The fluid channel is fluidly coupled to a fluid source. The fluid is delivered to the surgical site via the permeable membrane. The surgical access device may also have a locking mechanism for holding the device in a desired configuration. | 10-23-2014 |
20140343366 | METHODS AND APPARATUS FOR REDUCING THE RISK OF SURGICAL SITE INFECTIONS - A surgical access system that facilitates access to a surgical site through an incision in the patient's body includes a surgical retractor and a fluid delivery or fluid evacuation device. The fluid delivery or fluid evacuation device is coupled to the surgical retractor and is adapted to deliver fluid to the surgical site or evacuate fluid from the surgical site. | 11-20-2014 |
20150216592 | APPARATUS AND METHODS FOR TREATING PULMONARY HYPERTENSION - A method is described for decreasing activity of at least one sympathetic nerve, nerve fiber or neuron innervating at least one blood vessel in the pulmonary vasculature of a patient to ameliorate pulmonary hypertension. In one embodiment, the method may involve advancing an intravascular treatment device to a target location in a target blood vessel within the pulmonary vasculature of the patient and using the treatment device to decrease activity of at least one sympathetic nerve, nerve fiber or neuron innervating the target blood vessel at or near the target location to ameliorate pulmonary hypertension. | 08-06-2015 |
20150272565 | METHODS FOR THE PREVENTION OF SURGICAL SITE INFECTIONS - Several methods to reduce surgical site infections include inserting a surgical access device into an incision, retracting tissue, and introducing fluid into the surgical access device such that the fluid exits the surgical access device and irrigates a surgical site. Other methods do not include introducing fluid into a surgical access device but include suctioning a fluid into the surgical access device and removing the fluid from the body. | 10-01-2015 |
Jaemyoung Suh, San Diego, CA US
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20130116171 | METHODS FOR TREATING METABOLIC DISORDERS USING FGF - The method provides methods and compositions for treating metabolic disorders such as impaired glucose tolerance, elevated blood glucose, insulin resistance, dyslipidaemia, obesity, and fatty liver. | 05-09-2013 |
20140171361 | METHODS FOR TREATING METABOLIC DISORDERS USING FGF - The method provides methods and compositions for treating metabolic disorders such as impaired glucose tolerance, elevated blood glucose, insulin resistance, dyslipidaemia, obesity, and fatty liver. | 06-19-2014 |
Jae Myoung Suh, San Diego, CA US
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20140155316 | FIBROBLAST GROWTH FACTOR 1 PROTEIN FRAGMENTS AND METHODS OF USE - The present invention relates to a chimeric protein that includes an N-terminus coupled to a C-terminus, where the N-terminus includes a portion of a paracrine fibroblast growth factor (“FGF”) and the C-terminus includes a C-terminal portion of an FGF19 molecule. The portion of the paracrine FGF is modified to decrease binding affinity for heparin and/or heparan sulfate compared to the portion without the modification. The present invention also relates to pharmaceutical compositions including chimeric proteins according to the present invention, methods for treating a subject suffering from diabetes, obesity, or metabolic syndrome, and methods of screening for compounds with enhanced binding affinity for the βKlotho-FGF receptor complex involving the use of chimeric proteins of the present invention. | 06-05-2014 |
20150065419 | METHODS FOR TREATING METABOLIC DISORDERS USING FGF - The method provides methods and compositions for treating metabolic disorders such as impaired glucose tolerance, elevated blood glucose, insulin resistance, dyslipidaemia, obesity, and fatty liver. | 03-05-2015 |
20150111821 | MUTATED FIBROBLAST GROWTH FACTOR (FGF) 1 AND METHODS OF USE - The present disclosure provides FGF1 mutant proteins, such as those having an N-terminal deletion, point mutation(s), or combinations thereof, which can reduce blood glucose in a mammal. Such mutant FGF1 proteins can be part of a chimeric protein that includes a β-Klotho-binding protein, an FGFR1c-binding protein, a β-Klotho-binding protein and a FGFR1c-binding protein, a C-terminal region from FGF19 or FGF21. In some examples, mutant FGF1 proteins have reduced mitogenic activity. Also provided are nucleic acid molecules that encode such proteins, and vectors and cells that include such nucleic acids. Methods of using the disclosed molecules to reduce blood glucose levels are also provided. | 04-23-2015 |
20150258052 | METHODS OF USING FEXARAMINE AND AGENTS THAT INCREASE SYMPATHETIC NERVOUS SYSTEM ACTIVITY TO PROMOTE BROWNING OF WHITE ADIPOSE TISSUE - Provided are methods of promoting browning of white adipose tissue (WAT) in a subject. Such methods can include administering to a subject (e.g., via the gastrointestinal tract) a therapeutically effective amount of fexaramine in combination with a therapeutically effective amount of a compound that mimics or increases sympathetic nervous system activity (e.g., one or more beta-adrenergic agonists and/or compounds that increase epinephrine secretion). | 09-17-2015 |
20150343022 | METHODS FOR TREATING METABOLIC DISORDERS USING FGF - The method provides methods and compositions for treating metabolic disorders such as impaired glucose tolerance, elevated blood glucose, insulin resistance, dyslipidemia, obesity, and fatty liver. | 12-03-2015 |
Jin-Yoo Suh, Pasadena, CA US
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20080251164 | PROCESS FOR JOINING MATERIALS USING BULK METALLIC GLASSES - Methods and compositions for a novel metal-to-metal or material-to-material joining technique using bulk metallic glasses are provided. The method of the current invention relies on the superior mechanical properties of bulk metallic glasses and/or softening behavior of metallic glasses in the undercooled liquid region of temperature-time process space, enabling joining of a variety of materials at a much lower temperature than typical ranges used for soldering, brazing or welding. | 10-16-2008 |
John W. Suh, Palo Alto, CA US
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20100280678 | METHOD TO RESOLVE A REMOTE ELECTRICAL OUTLET FOR AN ELECTRICALLY-POWERED VEHICLE - A method for operating a charging stall having a known geographic location configured to electrically charge an electrically-powered vehicle includes communicating a first message to a remote access server from a subject vehicle, the first message including geographic location information corresponding to the subject vehicle, detecting a presence of a parked vehicle at the charging stall with a monitoring system signally connected to a monitoring controller, communicating a second message to the remote access server from the monitoring controller, the second message comprising the detected presence of the parked vehicle at the charging stall, resolving that the parked vehicle at the charging stall comprises the subject vehicle based upon the first and second messages, and activating a power access control device at the charging stall to permit electric power flow through a corresponding electric power outlet. | 11-04-2010 |
20120089615 | NEIGHBORHOOD GUIDE FOR SEMANTIC SEARCH SYSTEM AND METHOD TO SUPPORT LOCAL POI DISCOVERY - A neighborhood guide system, related method and associated database for providing information about businesses and other locations to a vehicle driver, or other user, in a more natural and informative manner than traditional IVR systems. When interacting with the user, the neighborhood guide system typically will only provide choices for the user to select from based on a user request that are in the particular vicinity of the user. Further, the neighborhood guide system provides usable information about the selected business by the user, such as hours of operation, cost, ratings, parking, etc. | 04-12-2012 |
20130083061 | FRONT- AND REAR- SEAT AUGMENTED REALITY VEHICLE GAME SYSTEM TO ENTERTAIN & EDUCATE PASSENGERS - In accordance with an exemplary embodiment, an augmented virtual reality game is provided for a vehicle. A method comprises receiving a real-time video image during operation of a vehicle from a camera mounted on the vehicle and merging the real-time video image with one or more virtual images to provide an augmented reality image. The augmented reality image is then transmitted to a display of a gaming device during the operation of the vehicle. A system comprises a camera providing a real-time video image and a controller coupled to the camera. Additionally, a database provides the controller with one or more virtual images so that the controller may provide an augmented reality image by merging the real-time video image with the one or more virtual images. Finally, a transmitter is included for transmitting the augmented reality image to a display of a game device during the operation of the vehicle. | 04-04-2013 |
Junghoon Suh, Kanata, CA US
Jungwon Suh, San Diego, CA US
Patent application number | Description | Published |
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20100237463 | Selective Fabrication of High-Capacitance Insulator for a Metal-Oxide-Metal Capacitor - Methods and devices of a capacitor in a semiconductor device having an increased capacitance are disclosed. In a particular embodiment, a method of forming a capacitor is disclosed. A section of a first insulating material between a first metal contact element and a second metal contact element is removed to form a channel. A second insulating material is deposited in the channel between the first metal contact element and the second metal contact element. | 09-23-2010 |
20110079923 | Vertically Stackable Dies Having Chip Identifier Structures - A vertically stackable die having a chip identifier structure is disclosed. In a particular embodiment, a semiconductor device is disclosed that includes a die comprising a first through silicon via to communicate a chip identifier and other data. The semiconductor device also includes a chip identifier structure that comprises at least two through silicon vias that are each hard wired to an external electrical contact. | 04-07-2011 |
20110079924 | Vertically Stackable Dies Having Chip Identifier Structures - A vertically stackable die having a chip identifier structure is disclosed. In a particular embodiment, a semiconductor device is disclosed that includes a die comprising a first through via to communicate a chip identifier and other data. The semiconductor device also includes a chip identifier structure that comprises at least two through vias that are each hard wired to an external electrical contact. | 04-07-2011 |
20110193212 | Systems and Methods Providing Arrangements of Vias - A semiconductor chip includes an array of electrical contacts and multiple vias coupling at least one circuit in the semiconductor chip to the array of electrical contacts. A first one of the electrical contacts of the array of electrical contacts is coupled to N vias, and a second one of the electrical contacts of the array of electrical contacts is coupled to M vias. M and N are positive integers of different values. | 08-11-2011 |
20110238203 | Method and Apparatus to Provide a Clock Signal to a Charge Pump - A method and apparatus for providing a clock signal to a charge pump is disclosed. In a particular embodiment, the method includes providing a first clock signal to a first charge pump unit of a charge pump. The method further includes providing a second clock signal to a second charge pump unit of the charge pump. A low-to-high transition of the first clock signal occurs substantially concurrently with a high-to-low transition of the second clock signal. Only one clock signal may be at a logic high voltage level at any given time. | 09-29-2011 |
20120033490 | Generating a Non-Reversible State at a Bitcell Having a First Magnetic Tunnel Junction and a Second Magnetic Tunnel Junction - A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. | 02-09-2012 |
20120040712 | System and Method to Initiate a Housekeeping Operation at a Mobile Device - A system and method to initiate a housekeeping operation at a mobile device is disclosed. In a particular embodiment, a method at a mobile device includes modifying a scheduled housekeeping operation in response to determining that the mobile device is in a charging mode. | 02-16-2012 |
20120075906 | Resistance Based Memory Having Two-Diode Access Device - A resistance-based memory has a two-diode access device. In a particular embodiment, a method includes biasing a bit line and a sense line to generate a current through a resistance-based memory element via a first diode or a second diode. A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line. | 03-29-2012 |
20120151299 | Embedded DRAM having Low Power Self-Correction Capability - Apparatuses and methods for low power combined self-refresh and self-correction of a Dynamic Random Access Memory (DRAM) array. During a self-refresh cycle, a first portion of a first row of the DRAM array is accessed and analyzed for one or more errors, wherein a bit width of the first portion is less than a bit width of the first row. If one or more errors are detected, the one or more errors are corrected to form a corrected first portion. The corrected first portion is selectively written back to the first row. If no errors are detected in the first portion, a write back of the first portion to the first row is prevented. | 06-14-2012 |
20120216084 | SERDES POWER THROTTLING AS A FUNCTION OF DETECTED ERROR RATE - A system involves a first SerDes link from a first integrated circuit (IC) to a second IC and a second link from the second IC to the first IC. Power consumption settings in circuitry of the first link are adjusted to control power consumption such that the bit error rate of the first link is maintained in a range, where the lower bound of the range is substantially greater than zero. Power consumption settings in circuitry for the second link are adjusted to control power consumption such that the bit error rate of the second link is maintained in range, where the lower bound of the range is substantially greater than zero. In one example, circuitry in the second IC detects errors in the first link and reports back via the second link. The first IC uses the reported information to determine a bit error rate for the first link. | 08-23-2012 |
20130120050 | LOW-POWER VOLTAGE REFERENCE CIRCUIT - Methods and apparatus for a providing temperature-compensated reference voltage are provided. In an example, a temperature-compensated voltage reference circuit includes a current mirror portion and a temperature-compensated output portion coupled to the current mirror portion. The temperature-compensated output portion comprises a very low threshold voltage (Vt) transistor coupled in series with a negative temperature coefficient transistor. The output portion can further include a positive temperature coefficient element coupled in series with the very low Vt transistor. The positive temperature coefficient element can be an adjustable resistive element. The output portion can further include an output transistor having a gate coupled to the current mirror portion and coupled between a supply voltage and the positive temperature coefficient element. The very low Vt transistor can be a substantially zero Vt n-channel metal-oxide-semiconductor (NMOS) transistor, and can be coupled in a diode configuration. | 05-16-2013 |
20130234340 | VERTICALLY STACKABLE DIES HAVING CHIP IDENTIFIER STRUCTURES - A vertically stackable die having a chip identifier structure is disclosed. In a particular embodiment, a semiconductor device is disclosed that includes a die comprising a first through silicon via to communicate a chip identifier and other data. The semiconductor device also includes a chip identifier structure that comprises at least two through silicon vias that are each hard wired to an external electrical contact. | 09-12-2013 |
20130277861 | VERTICALLY STACKABLE DIES HAVING CHIP IDENTIFIER STRUCTURES - A particular device includes a first die that includes a portion of a chip identifier structure, the portion including a first set of at least two through vias that are each connected to a corresponding external electrical contact of a first set of external electrical contacts. Each of the first set of through vias has a pad configured to be coupled to an adjacent through via of a second die in the chip identifier structure. Each external electrical contact of the first set of external electrical contacts is configured to transmit a chip select signal. The first die further includes at least a portion of a chip communication structure including a second set of at least one through via. Each via of the second set is connected to one external electrical contact of a second set of external electrical contacts. | 10-24-2013 |
20130280863 | VERTICALLY STACKABLE DIES HAVING CHIP IDENTIFIER STRUCTURES - A particular method of making a stacked multi-die semiconductor device includes forming a stack of at least two dies. Each die includes a chip identifier structure that includes a first set of at least two through vias that are each hard wired to a set of external electrical contacts. Each die further includes chip identifier selection logic coupled to the chip identifier structure. Each die further includes a chip select structure that includes a second set of at least two through vias coupled to the chip identifier selection logic. The method further includes coupling each external electrical contact to a voltage source or ground. Each of the first set of through vias has a pad that is coupled to an adjacent through via and each of the second set of through vias is coupled to its own respective pad. | 10-24-2013 |
20130326188 | INTER-CHIP MEMORY INTERFACE STRUCTURE - In an embodiment, a stacked package-on-package system has a memory die and a logic die. The memory die comprises a first memory and a second memory, each operated independently of the other, and each having an inter-chip interface electrically connected to the logic die. The logic die has two independent clock sources, one to provide a first clock signal to the first memory, and the other clock source to provide a second clock signal to the second memory. | 12-05-2013 |
20140010006 | NON-REVERSIBLE STATE AT A BITCELL HAVING A FIRST MAGNETIC TUNNEL JUNCTION AND A SECOND MAGNETIC TUNNEL JUNCTION - A memory device includes a magnetic tunnel junction (MTJ) bitcell. The MTJ bitcell includes a first MTJ and a second MTJ. The memory device further includes programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. The non-reversible state corresponds to a value of the MTJ bitcell that is determined by comparing a first value read at the first MTJ and a second value read at the second MTJ. | 01-09-2014 |
20140119097 | RESISTANCE-BASED MEMORY HAVING TWO-DIODE ACCESS DEVICE - A resistance-based memory includes a two-diode access device. In a particular embodiment, a method includes biasing a bit line with a first voltage. The method further includes biasing the sense line with a second voltage. Biasing the bit line and biasing the sense line generates a current through a resistance-based memory element and through one of a first diode and a second diode. A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line. | 05-01-2014 |
20140177325 | INTEGRATED MRAM MODULE - Systems and methods for integrated magnetoresistive random access memory (MRAM) modules. An integrated circuit includes a processor without a last level cache integrated on a first chip a MRAM module comprising a MRAM last level cache and a MRAM main memory integrated on a second chip, wherein the MRAM module is a unified structure fabricated as monolithic package or a plurality of packages. The second package further includes memory controller logic. A simplified interface structure is configured to couple the first and the second package. The MRAM module is designed for high speed, high data retention, aggressive prefetching between the MRAM last level cache and the MRAM main memory, improved page handling, and improved seal ability. | 06-26-2014 |
20140201435 | HETEROGENEOUS MEMORY SYSTEMS, AND RELATED METHODS AND COMPUTER-READABLE MEDIA FOR SUPPORTING HETEROGENEOUS MEMORY ACCESS REQUESTS IN PROCESSOR-BASED SYSTEMS - Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systems are disclosed. A heterogeneous memory system is comprised of a plurality of homogeneous memories that can be accessed for a given memory access request. Each homogeneous memory has particular power and performance characteristics. In this regard, a memory access request can be advantageously routed to one of the homogeneous memories in the heterogeneous memory system based on the memory access request, and power and/or performance considerations. The heterogeneous memory access request policies may be predefined or determined dynamically based on key operational parameters, such as read/write type, frequency of page hits, and memory traffic, as non-limiting examples. In this manner, memory access request times can be optimized to be reduced without the need to make tradeoffs associated with only having one memory type available for storage. | 07-17-2014 |
20140264836 | SYSTEM-IN-PACKAGE WITH INTERPOSER PITCH ADAPTER - An integrated circuit package is disclosed that includes a first-pitch die and a second-pitch die. The second-pitch die interconnects to the second-pitch substrate through second-pitch substrates. The first-pitch die interconnects through first-pitch interconnects to an interposer adapter. The pitch of the first-pitch interconnects is too fine for the second-pitch substrate. But the interposer adapter interconnects through second-pitch interconnects to the second-pitch substrate and includes through substrate vias so that I/O signaling between the first-pitch die and the second-pitch die can be conducted through the second-pitch substrate and through the through substrate vias in the interposer adapter. | 09-18-2014 |
20140281184 | MIXED MEMORY TYPE HYBRID CACHE - A hybrid cache includes a static random access memory (SRAM) portion and a resistive random access memory portion. Cache lines of the hybrid cache are configured to include both SRAM macros and resistive random access memory macros. The hybrid cache is configured so that the SRAM macros are accessed before the resistive random memory macros in each cache access cycle. While SRAM macros are accessed, the slower resistive random access memory reach a data access ready state. | 09-18-2014 |
20140281327 | SYSTEM AND METHOD TO DYNAMICALLY DETERMINE A TIMING PARAMETER OF A MEMORY DEVICE - A particular method includes receiving, from a processor, a first memory access request at a memory device. The method also includes processing the first memory access request based on a timing parameter of the memory device. The method further includes receiving, from the processor, a second memory access request at the memory device. The method also includes modifying a timing parameter of the memory device based on addresses identified by the first memory access request and the second memory access request to produce a modified timing parameter. The method further includes processing the second memory access request based on the modified timing parameter. | 09-18-2014 |
20140379978 | REFRESH SCHEME FOR MEMORY CELLS WITH WEAK RETENTION TIME - A memory refresh method within a memory controller includes checking a first retention state corresponding to a first memory address and a second retention state corresponding to a second memory address. The memory refresh method also includes performing a refresh operation on a row corresponding to the second memory address when the second retention state indicates a weak retention state. The first memory address corresponds to a refresh counter address, and the second memory address corresponds to a complementary address of the refresh counter address. | 12-25-2014 |
20150016203 | DRAM SUB-ARRAY LEVEL AUTONOMIC REFRESH MEMORY CONTROLLER OPTIMIZATION - A method of refreshing a dynamic random access memory (DRAM) includes detecting an open page of the DRAM at a row of a DRAM bank within an open sub-array of the DRAM bank. The method also includes delaying issuance of a refresh command to a target refresh row of the DRAM bank when the target refresh row of the DRAM bank is within the open sub-array of the DRAM bank. | 01-15-2015 |
20150039848 | METHODS AND APPARATUSES FOR IN-SYSTEM FIELD REPAIR AND RECOVERY FROM MEMORY FAILURES - In a particular embodiment, a device includes memory address remapping circuitry and a remapping engine. The memory address remapping circuitry includes a comparison circuit to compare a received memory address to one or more remapped addresses. The memory address remapping circuitry also includes a selection circuit responsive to the comparison circuit to output a physical address. The physical address corresponds to a location in a random-access memory (RAM). The remapping engine is configured to update the one or more remapped addresses to include a particular address in response to detecting that a number of occurrences of errors at a particular location satisfies a threshold. | 02-05-2015 |
20150067234 | UNIFIED MEMORY CONTROLLER FOR HETEROGENEOUS MEMORY ON A MULTI-CHIP PACKAGE - An enhanced multi chip package (eMCP) is provided including a unified memory controller. The UMC is configured to manage different types of memory, such as NAND flash memory and DRAM on the eMCP. The UMC provides storage memory management, DRAM management, DRAM accessibility for storage memory management, and storage memory accessibility for DRAM management. The UMC also facilitates direct data copying from DRAM to storage memory and vice versa. The direct copying may be initiated by the UMC without interaction from a host, or may be initiated by a host. | 03-05-2015 |
20150085594 | METHOD AND APPARATUS FOR REFRESHING A MEMORY CELL - Memory devices may send information related to refresh rates to a memory controller. The memory controller may instruct the memory devices to refresh based on the received information. | 03-26-2015 |
20150121006 | SPLIT WRITE OPERATION FOR RESISTIVE MEMORY CACHE - A method of reading from and writing to a resistive memory cache includes receiving a write command and dividing the write command into multiple write sub-commands. The method also includes receiving a read command and executing the read command before executing a next write sub-command. | 04-30-2015 |
20150134897 | METHOD AND APPARATUS FOR REFRESHING A MEMORY CELL - A method includes sending a first signal from a memory device to a memory controller. The first signal indicates to the memory controller that particular memory cells of the memory device are to be refreshed by the memory device. | 05-14-2015 |
20150143198 | METHOD AND APPARATUS FOR MULTIPLE-BIT DRAM ERROR RECOVERY - A system for replacing a page stored in system memory when reading the page incurs a multiple-bit error. Upon reading a page in system memory for which a multiple-bit error is detected, backup data in flash memory is loaded into a redundant page in the system memory, and a re-mapper is configured so that future accesses to the page are redirected to the redundant page. | 05-21-2015 |
20150149865 | CACHE STRUCTURE WITH PARITY-PROTECTED CLEAN DATA AND ECC-PROTECTED DIRTY DATA - A method includes generating error detection information associated with data to be stored at a cache in response to determining that the data is clean. The method also includes storing the clean data at a first region of the cache. The method further includes generating error correction information associated with data to be stored at the cache in response to determining that the data is dirty. The method also includes storing the dirty data at a second region of the cache. | 05-28-2015 |
20150162065 | REFRESH SCHEME FOR MEMORY CELLS WITH NEXT BIT TABLE - A memory refresh control technique allows flexible internal refresh rates based on an external 1× refresh rate and allows skipping a refresh cycle for strong memory rows based on the external 1× refresh rate. A memory controller performs a memory refresh by reading a refresh address from a refresh address counter, reading a weak address from a weak address table and generating a next weak address value based at least in part on a next bit sequence combined with the weak address. The memory controller compares the refresh address to the weak address and to the next weak address value. Based on the comparison, the memory controller selects between skipping a refresh cycle, refreshing the refresh address, refreshing the weak address, and refreshing both the refresh address and the weak address. | 06-11-2015 |
20150186279 | SYSTEM AND METHOD TO DEFRAGMENT A MEMORY - A system and method to defragment a memory is disclosed. In a particular embodiment, a method includes loading data stored at a first physical memory address of a memory from the memory into a cache line of a data cache. The first physical memory address is mapped to a first virtual memory address. The method further includes initiating modification, at the data cache, of lookup information associated with the first virtual memory address so that the first virtual memory address corresponds to a second physical memory address of the memory. The method also includes modifying, at the data cache, information associated with the cache line to indicate that the cache line corresponds to the second physical memory address instead of the first physical memory address. | 07-02-2015 |
20150243373 | KERNEL MASKING OF DRAM DEFECTS - Systems, methods, and computer programs are disclosed for kernel masking dynamic random access memory (DRAM) defects. One such method comprises: detecting and correcting a single-bit error associated with a physical address in a dynamic random access memory (DRAM); receiving error data associated with the physical address from the DRAM; storing the received error data in a failed address table located in a non-volatile memory; and retiring a kernel page corresponding to the physical address if a number of errors associated with the physical address exceeds an error count threshold. | 08-27-2015 |
20150261632 | SYSTEMS AND METHODS FOR REDUCING MEMORY FAILURES - Methods and systems for an in-system repair process that repairs or attempts to repair random bit failures in a memory device are provided. In some examples, an in-system repair process may select alternative steps depending on whether the failure is correctable or uncorrectable. In these examples, the process uses communications between a system on chip and the memory to fix the failures during normal operation. | 09-17-2015 |
20150318035 | PRIORITY ADJUSTMENT OF DYNAMIC RANDOM ACCESS MEMORY (DRAM) TRANSACTIONS PRIOR TO ISSUING A PER-BANK REFRESH FOR REDUCING DRAM UNAVAILABILITY - Priority adjustment of dynamic random access memory (DRAM) transactions prior to issuing a per-bank refresh for reducing DRAM unavailability is disclosed. In one aspect, DRAM is refreshed on a per-bank basis. If a queued memory transaction corresponds to a memory bank that will soon be refreshed, the transaction may be delayed if a refresh of the corresponding memory bank begins prior to execution of the transaction. To avoid delaying execution of the transaction while waiting for the corresponding memory bank to be refreshed, a priority of the memory transactions may be adjusted based on a memory bank refresh schedule. The priority of the transaction corresponding to the memory bank to be refreshed may be increased, and the priority of other memory transactions may be decreased, if such an adjustment would avoid or reduce delaying execution due to unavailability of the corresponding memory bank. | 11-05-2015 |
20150332735 | DYNAMIC CONTROL OF SIGNALING POWER BASED ON AN ERROR RATE - Writing to and reading from dynamic random access memory (DRAM) by a system on chip (SoC) over a multiphase multilane memory bus has power consumption optimized based on bit error rate (BER) and one or more thresholds. The bit error rate (BER) may be measured and used to control parameters to achieve optimal balance between power consumption and accuracy. The bit error rate (BER) measurement, purposely adding jitter, and checking against the thresholds is performed during normal mission-mode operation with live traffic. Error detection may cover every memory data transaction that has a block of binary data. | 11-19-2015 |
Kihyun Kevin Suh, Harbor City, CA US
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20140266870 | COMPENSATING FOR A NON-IDEAL SURFACE OF A REFLECTOR IN A SATELLITE COMMUNICATION SYSTEM - A method is provided that includes measuring amplitudes and phases of signals reflected off a reflector of a satellite, with the amplitudes and phases forming a first set of measurements. The method includes calculating an element correlation matrix as a function of the first set of measurements. The element correlation matrix represents a radiated feed element pattern off the reflector. And the method includes adjusting a formed beam pattern of a beamformer based on the element correlation matrix to thereby compensate for a non-ideal surface of the reflector. | 09-18-2014 |
Linda Suh, Palo Verdes Estates, CA US
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20140328085 | System For Projecting a Simulated Liquid Surface - A projector apparatus that may include a first plurality of adjacent translucent lenses on at least one side of an inner lens, said inner lens configured to rotate and translate about an axis (A) of the inner lens; a second plurality of adjacent translucent lenses formed on at least one side of a concave outer lens; a light source configured to direct a portion of light through the rotatable and translatable inner lens and then through the concave outer lens; and a motor configured to rotatably and translatably drive the inner lens in an oscillating manner about and along the axis of the concave inner lens (A); so that the oscillating inner lens imparts a moving textured image for modification through the fixed concave outer lens for display upon a surface, such as a ceiling to simulate a moving liquid surface. | 11-06-2014 |
Linda Suh, Torrance, CA US
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20130225041 | TWILIGHT DEVICE - A device being in the form of a predetermined animal having a light emitting feature. The animal has at least a head and body. A plurality of light emitting members of varying colors being placed within the body, and a plurality of apertures being formed through the top surface of the body. Each aperture being in the shape of a star, and the placement of the apertures forming the pattern of a predetermined constellation. The light emitting members and apertures being formed in a manner such that light shines through the apertures and projects outwardly when the light emitting members are turned on. | 08-29-2013 |
Myoung-Gyun Suh, Pasadena, CA US
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20140105232 | ON-CHIP OPTICAL REFERENCE CAVITY EXHIBITING REDUCED RESONANCE CENTER FREQUENCY FLUCTUATIONS - An optical apparatus comprises a waveguide substrate and an optical reference cavity. The optical reference cavity comprises an optical waveguide formed on the waveguide substrate and arranged to form a closed loop greater than or about equal to 10 cm in length. The RMS resonance frequency fluctuation is less than or about equal to 100 Hz. The Q-factor can be greater than or about equal to 10 | 04-17-2014 |
Myung-Kyung Suh, Los Angeles, CA US
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20140344208 | CONTEXT-AWARE PREDICTION IN MEDICAL SYSTEMS - A method includes receiving contextual data related to at least one of environmental, physiological, behavioral, and historical context, and receiving outcome data related to at least one outcome. The method further includes creating a feature set from the contextual data, selecting a subset of features from the feature set, assigning a score to each feature in the subset of features according to the probability that the feature is a predictor of the at least one outcome, and generating a characteristic curve for the at least one outcome from the subset of features, the characteristic curve being based on the scoring. The method further includes calculating the area under the characteristic curve, and using, the area under the characteristic curve, identifying whether the subset of features is a suitable predictor for the at least one outcome. | 11-20-2014 |
20150234997 | TASK OPTIMIZATION IN REMOTE HEALTH MONITORING SYSTEMS - Systems, methods, and devices are disclosed that monitor the health status of patients. Dynamic task management functions apply data analytics to discretize continuous data values from monitored patients, and apply association rule mining techniques to prioritized required user tasks. Embodiments of the present disclosure minimize the number of daily action items required by patients. The remaining action items maximize information gain, thereby improving the overall level of patient adherence and satisfaction without losing health monitoring effectiveness. | 08-20-2015 |
20150257712 | METHODS AND SYSTEMS FOR CALCULATING AND USING STATISTICAL MODELS TO PREDICT MEDICAL EVENTS - Systems and methods for generalized precursor pattern discovery that work with a wide range of biomedical signals and applications to detect a wide range of medical events are disclosed. In some embodiments, the methods and systems do not require domain-specific knowledge or significant reconfiguration based on the medical event being analyzed, hence it is also possible to discover patterns previously unknown to experts. In some embodiments, to build precursor pattern detection models, the system obtains annotated monitoring data. Positive and negative segments are extracted from the annotated monitoring data, and are preprocessed. Features are extracted from the preprocessed segments, and selected features are chosen from the extracted features. The selected features are classified to create the precursor pattern detection model The precursor pattern detection model may then be used in real time to detect occurrences of the medical event of interest. | 09-17-2015 |
Seong-Youp Suh, San Jose, CA US
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20080238804 | MULTI-BAND HIGHLY ISOLATED PLANAR ANTENNAS INTEGRATED WITH FRONT-END MODULES FOR MOBILE APPLICATIONS - An embodiment of the present invention provides an apparatus, comprising a multi-band highly isolated planar antenna directly integrated with a front-end module (FEM). | 10-02-2008 |
20090058751 | PLATFORM NOISE MITIGATION METHOD USING BALANCED ANTENNA - A balanced antenna is integrated into a wireless mobile device, such as a laptop computer, for improved antenna reception. The antenna is connected to a radio frequency (RF) interconnection cable. A balun is disposed between the antenna and the cable. By using a balanced antenna, the fraction of the noise produced by the motherboard and display of the wireless mobile device that is captured by the antenna is significantly reduced compared to that captured by an unbalanced antenna, and thus not captured by the antenna. | 03-05-2009 |
20090121943 | ANTENNA SYSTEM USING COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TECHNIQUES - Apparatus, system, and method are described for a complementary metal oxide semiconductor (CMOS) integrated circuit device having a first metal layer that includes a radiating element and a second metal layer that includes a first conductor coupled to the radiating element. The first conductor and the radiating element are mutually coupled to form an antenna to wirelessly communicate a signal. | 05-14-2009 |
20100141533 | ANTENNA STRUCTURE - An antenna structure that includes a magnetic film coated on a textured backside of an antenna substrate to reduce the size of antenna from an average size of the antenna for a predetermined frequency band. | 06-10-2010 |
20110025566 | NEAR-HORIZON ANTENNA STRUCTURE AND FLAT PANEL DISPLAY WITH INTEGRATED ANTENNA STRUCTURE - A near-horizon antenna structure includes an upper radiating element having a straight conductive trace disposed on a planar surface of a non-conductive substrate, a rectangular lower radiating element serving as a ground plane disposed on the planar surface, and a feed point provided between the upper and lower radiating elements. When the planar surface is positioned vertically, the far-field effects of horizontal current flowing in opposite directions on the radiating elements cancel to provide an antenna pattern with increased gain in horizontal directions and reduced gain in vertical directions. A flat panel display and a portable communication device are also provided with one or more near-horizon antenna structures integrated therein. | 02-03-2011 |
20110032157 | MULTIPROTOCOL ANTENNA STRUCTURE AND METHOD FOR SYNTHESIZING A MULTIPROTOCOL ANTENNA PATTERN - Embodiments of a planar asymmetric antenna structure with shifted feed position for multi-protocol operations are disclosed The antenna structure includes two elliptically tapering right and left arms, each with a different radius, and an off-center feed point positioned between the right and left arms. One arm has a smaller elliptical tapering than the other arm and the feed point is positioned closer to one arm than the other arm. A method of synthesizing a multiprotocol antenna pattern is also disclosed. The method includes providing substantially equally surface currents on both arms of an antenna structure to generate a near-horizontal pattern in far-field at a lower frequency band, providing greater surface currents on the right arm to generate a far-field pattern with a large horizontal component at a higher frequency band, and providing greater surface currents on the left arm to generate an asymmetric far-field pattern at a middle frequency band. | 02-10-2011 |
Song-Moon Suh, San Jose, CA US
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20140020629 | TWO PIECE SHUTTER DISK ASSEMBLY FOR A SUBSTRATE PROCESS CHAMBER - Shutter disk assemblies for use in process chambers to protect a substrate support disposed below the shutter disk assembly from undesired material deposition are provided herein. In some embodiments, a shutter disk assembly for use in a process chamber to protect a substrate support disposed below the shutter disk assembly may include an upper disk member having a top surface and a bottom surface; and a lower carrier member having at least a portion of the lower carrier member disposed below a portion of the upper disk member to support the upper disk member and to create a protective overlap region that prevents exposure of the substrate support upon deformation of the upper disk member. | 01-23-2014 |
20140251375 | METHODS AND APPARATUS FOR SUBSTRATE EDGE CLEANING - A substrate cleaning apparatus may include a substrate support having a support surface to support a substrate to be cleaned, wherein the substrate support is rotatable about a central axis normal to the support surface; a first nozzle to provide a first cleaning gas to a region of the inner volume corresponding to the position of an edge of the substrate when the substrate is supported by the support surface of the substrate support; a first annular body disposed opposite and spaced apart from the support surface of the substrate support by a gap, the first annular body having a central opening defined by an inner wall shaped to provide a reducing size of the gap between the first annular body and the support surface in a radially outward direction; and a first gas inlet to provide a first gas to the central opening of the first annular body. | 09-11-2014 |
20160005638 | SUBSTRATE TRANSFER ROBOT END EFFECTOR - Embodiments of apparatus for supporting a substrate are disclosed herein. In some embodiments, an apparatus for supporting a substrate includes a support member; and a plurality of substrate contact elements protruding from the support member, wherein each of the plurality of substrate contact elements includes: a first contact surface to support a substrate when placed thereon; and a second contact surface extending from the first contact surface, wherein the second contact surface is adjacent a periphery of the substrate to prevent radial movement of the substrate, wherein the first contact surface is at a first angle with respect to the support member and the second contact surface is at a second angle with respect to the support member, and wherein the first angle is between about 3 degrees and 5 degrees. | 01-07-2016 |
Song-Moon Suh, Sunnyvale, CA US
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20120237693 | IN-SITU CLEAN PROCESS FOR METAL DEPOSITION CHAMBERS - Embodiments of the invention include methods for in-situ chamber dry clean for metal deposition chambers. In one embodiment, a method for in-situ chamber dry clean after a metal deposition process includes placing a substrate in a processing chamber, performing a metal deposition process on the substrate in the processing chamber, removing the substrate from the support pedestal, and performing an in-situ cleaning process by supplying a cleaning gas containing H | 09-20-2012 |
20140196848 | FINNED SHUTTER DISK FOR A SUBSTRATE PROCESS CHAMBER - Shutter disks for use in process chambers are provided herein. In some embodiments, a shutter disk for use in a process chamber may include a body having an outer perimeter, a top surface of the body, wherein the top surface includes a central portion having a substantially horizontal planar surface, and at least one angled structure disposed radially outward of the central portion, each of the at least one angled structure having a top portion and an angled surface disposed at a downward angle in a radially outward direction from the top portion toward the outer perimeter, and a bottom surface of the body. | 07-17-2014 |
20140251374 | METHODS AND APPARATUS FOR CLEANING A SUBSTRATE - A substrate cleaning apparatus may include a substrate support member to support a substrate having a first side and a contaminated second side; a liquid carbon dioxide source; a gaseous carbon dioxide source; and one or more nozzles coupled to the liquid carbon dioxide source and to the gaseous carbon dioxide source, wherein the one or more nozzles are configured to receive liquid carbon dioxide and to discharge a first mixture of solid and gaseous carbon dioxide from the liquid carbon dioxide source to the second side of the substrate and to receive gaseous carbon dioxide and to discharge a second mixture of solid and gaseous carbon dioxide from the gaseous carbon dioxide source to the second side of the substrate. Methods of cleaning a substrate may be performed in the substrate cleaning apparatus. | 09-11-2014 |
Soowan Suh, San Ramon, CA US
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20110317721 | DIFFERENTIAL DELAY COMPENSATION - In one embodiment, a method comprises receiving a plurality of data frames representing at least one virtually concatenated data stream, storing the plurality of data frames in a memory; and recording, for each of a plurality of data frames, a physical write address that indicates a position in the memory and a virtual write address that includes a multiframe indicator and a byte number indicator. | 12-29-2011 |
20130305010 | DIFFERENTIAL DELAY COMPENSATION - In one embodiment, a method comprises receiving a plurality of data frames representing at least one virtually concatenated data stream, storing the plurality of data frames in a memory; and recording, for each of a plurality of data frames, a physical write address that indicates a position in the memory and a virtual write address that includes a multiframe indicator and a byte number indicator. | 11-14-2013 |
20150350114 | DIFFERENTIAL DELAY COMPENSATION - In one embodiment, a method comprises receiving a plurality of data frames representing at least one virtually concatenated data stream, storing the plurality of data frames in a memory; and recording, for each of a plurality of data frames, a physical write address that indicates a position in the memory and a virtual write address that includes a multiframe indicator and a byte number indicator. | 12-03-2015 |
Yelin Suh, Palo Alto, CA US
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20080281192 | METHOD AND APPARATUS FOR REAL-TIME TARGET POSITION ESTIMATION BY COMBINING X-RAY AND EXTERNAL RESPIRATORY SIGNALS - A method and system are disclosed for estimating internal position information of a target in real-time based on a single gantry-mounted x-ray imager and a respiratory signal. The x-ray imaging is done periodically to limit radiation dosage. Initial parameters for the estimation model are determined in a pre-treatment session using four dimensional computed tomography (4D CT) in combination with a respiratory signal acquired from the patient. The model parameters are updated during treatment based on the periodic x-ray image data and the respiratory signal. | 11-13-2008 |
20090041188 | METHOD AND SYSTEM FOR FOUR DIMENSIONAL INTENSITY MODULATED RADIATION THERAPY FOR MOTION COMPENSATED TREATMENTS - A deliverable four dimensional (4D) intensity modulated radiation therapy (IMRT) planning method is disclosed, for delivery using a linear accelerator with a dynamic multi-leaf collimator (DMLC). A 4D computed tomography (CT) scan is used for segmenting tumor anatomy on a reference phase of periodic motion of the tumor. Deformable registration of the 4D CT data is used to generate corresponding anatomical structures on other phases. Preferably, the collimator for each beam position is aligned using the gross tumor volume (GTV) centroid motion corresponding to the periodic motion of the tumor, as determined from the two dimensional (2D) projection of a given beam position. A deliverable IMRT plan is created on the 4D CT image set in which the MLC leaf positions and beam on/off status can vary as a function of respiratory phase by solving a four dimensional optimization problem. The mechanical constraints of the MLC leaves are included in the optimization. | 02-12-2009 |
20110081002 | METHOD AND SYSTEM FOR FOUR DIMENSIONAL INTENSITY MODULATED RADIATION THERAPY FOR MOTION COMPENSATED TREATMENTS - A deliverable four dimensional (4D) intensity modulated radiation therapy (IMRT) planning method is disclosed, for delivery using a linear accelerator with a dynamic multi-leaf collimator (DMLC). A 4D computed tomography (CT) scan is used for segmenting tumor anatomy on a reference phase of periodic motion of the tumor. Deformable registration of the 4D CT data is used to generate corresponding anatomical structures on other phases. Preferably, the collimator for each beam position is aligned using the gross tumor volume (GTV) centroid motion corresponding to the periodic motion of the tumor, as determined from the two dimensional (2D) projection of a given beam position. A deliverable IMRT plan is created on the 4D CT image set in which the MLC leaf positions and beam on/off status can vary as a function of respiratory phase by solving a four dimensional optimization problem. The mechanical constraints of the MLC leaves are included in the optimization. | 04-07-2011 |