Patent application number | Description | Published |
20080230786 | High temperature performance capable gallium nitride transistor - A transistor device capable of high performance at high temperatures. The transistor comprises a gate having a contact layer that contacts the active region. The gate contact layer is made of a material that has a high Schottky barrier when used in conjunction with a particular semiconductor system (e.g., Group-III nitrides) and exhibits decreased degradation when operating at high temperatures. The device may also incorporate a field plate to further increase the operating lifetime of the device. | 09-25-2008 |
20100025730 | Normally-off Semiconductor Devices and Methods of Fabricating the Same - Normally-off semiconductor devices are provided. A Group III-nitride buffer layer is provided. A Group III-nitride barrier layer is provided on the Group III-nitride buffer layer. A non-conducting spacer layer is provided on the Group III-nitride barrier layer. The Group III-nitride barrier layer and the spacer layer are etched to form a trench. The trench extends through the barrier layer and exposes a portion of the buffer layer. A dielectric layer is formed on the spacer layer and in the trench and a gate electrode is formed on the dielectric layer. Related methods of forming semiconductor devices are also provided herein. | 02-04-2010 |
20100155746 | HIGH VOLTAGE LOW CURRENT SURFACE-EMITTING LED - A monolithic LED chip is disclosed comprising a plurality of junctions or sub-LEDs (“sub-LEDs”) mounted on a submount. The sub-LEDs are serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. Methods for fabricating a monolithic LED chip are also disclosed with one method comprising providing a single junction LED on a submount and separating the single junction LED into a plurality of sub-LEDs. The sub-LEDs are then serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of the serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. | 06-24-2010 |
20100252840 | HIGH VOLTAGE LOW CURRENT SURFACE EMITTING LED - An LED chip comprising a plurality of sub-LEDs on a submount. Electrically conductive and electrically insulating features are included that serially interconnect the sub-LEDs such that an electrical signal applied to the serially interconnected sub-LEDs along the electrically conductive features spreads to the serially interconnected sub-LEDs. A via is included that is arranged to electrically couple one of the sub-LEDs to the submount. The sub-LED can be interconnected by more than one of the conductive features, with each one of the conductive features capable of spreading an electrical signal between the two of the sub-LEDs. | 10-07-2010 |
20100276698 | GATE ELECTRODES FOR MILLIMETER-WAVE OPERATION AND METHODS OF FABRICATION - A transistor device having a tiered gate electrode fabricated with methods using a triple layer resist structure. The triple layer resist stack is deposited on a semiconductor structure. An exposure pattern is written onto the resist stack using an e-beam writer, for example. The exposure dose is non-uniform across the device. Portions of the three resist layers are removed with a sequential development process, resulting in tiered resist structure. A conductive material is deposited to form the gate electrode. The resulting “Air-T” gate also has a three-tiered structure. The fabrication process is well-suited for the production of gates small enough for use in millimeter wave devices. | 11-04-2010 |
20110031579 | LOW VOLTAGE DIODE WITH REDUCED PARASITIC RESISTANCE AND METHOD FOR FABRICATING - A method of making a diode begins by depositing an Al | 02-10-2011 |
20110049546 | HIGH REFLECTIVITY MIRRORS AND METHOD FOR MAKING SAME - A composite high reflectivity mirror (CHRM) with at least one relatively smooth interior surface interface. The CHRM includes a composite portion, for example dielectric and metal layers, on a base element. At least one of the internal surfaces is polished to achieve a smooth interface. The polish can be performed on the surface of the base element, on various layers of the composite portion, or both. The resulting smooth interface(s) reflect more of the incident light in an intended direction. The CHRMs may be integrated into light emitting diode (LED) devices to increase optical output efficiency. | 03-03-2011 |
20110057232 | SEMICONDUCTOR DEVICES INCLUDING SHALLOW IMPLANTED REGIONS AND METHODS OF FORMING THE SAME - Methods of forming a semiconductor device include forming a dielectric layer on a Group III-nitride semiconductor layer, selectively removing portions of the dielectric layer over spaced apart source and drain regions of the semiconductor layer, implanting ions having a first conductivity type directly into the source and drain regions of the semiconductor layer, annealing the semiconductor layer and the dielectric layer to activate the implanted ions, and forming metal contacts on the source and drain regions of the semiconductor layer. | 03-10-2011 |
20110263102 | Methods of Fabricating Normally-Off Semiconductor Devices - Normally-off semiconductor devices are provided. A Group III-nitride buffer layer is provided. A Group III-nitride barrier layer is provided on the Group III-nitride buffer layer. A non-conducting spacer layer is provided on the Group III-nitride barrier layer. The Group III-nitride barrier layer and the spacer layer are etched to form a trench. The trench extends through the barrier layer and exposes a portion of the buffer layer. A dielectric layer is formed on the spacer layer and in the trench and a gate electrode is formed on the dielectric layer. Related methods of forming semiconductor devices are also provided herein. | 10-27-2011 |
20110278608 | High Voltage Low Current Surface Emitting LED - A monolithic LED chip is disclosed comprising a plurality of junctions or sub-LEDs (“sub-LEDs”) mounted on a submount. The sub-LEDs are serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. Methods for fabricating a monolithic LED chip are also disclosed with one method comprising providing a single junction LED on a submount and separating the single junction LED into a plurality of sub-LEDs. The sub-LEDs are then serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of the serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. | 11-17-2011 |
20120043563 | High Voltage Low Current Surface Emitting Light Emitting Diode - A light emitting diode chip includes a submount, a reflective layer on the submount, an insulating layer on the reflective layer opposite the submount, and a plurality of sub-LEDs on the insulating layer. Each of the sub-LEDs includes a first face adjacent to the submount and a transparent contact on the first face between the sub-LED and the insulating layer and electrical interconnects between adjacent ones of the sub-LEDs. | 02-23-2012 |
20120199843 | HIGH REFLECTIVE BOARD OR SUBSTRATE FOR LEDS - Light emitting devices and methods are disclosed that provide improved light output. The devices have an LED mounted to a substrate, board or submount characterized by improved reflectivity, which reduces the absorption of LED light. This increases the amount of light that can emit from the LED device. The LED devices also exhibit improved emission characteristics by having a reflective coating on the submount that is substantially non-yellowing. One embodiment of a light emitting device according to the present invention comprises a submount having a circuit layer. A reflective coating is included between at least some of the elements of the circuit layer. A light emitting diode mounted to the circuit layer, the reflective coating being reflective to the light emitted by the light emitting diode. In some embodiments, the reflective coating comprises a carrier with scattering particles having a different index of refraction than said carrier material. | 08-09-2012 |
20120228675 | HIGH TEMPERATURE PERFORMANCE CAPABLE GALLIUM NITRIDE TRANSISTOR - A transistor device capable of high performance at high temperatures. The transistor comprises a gate having a contact layer that contacts the active region. The gate contact layer is made of a material that has a high Schottky barrier when used in conjunction with a particular semiconductor system (e.g., Group-III nitrides) and exhibits decreased degradation when operating at high temperatures. The device may also incorporate a field plate to further increase the operating lifetime of the device. | 09-13-2012 |
20120235160 | Normally-Off Semiconductor Devices - Normally-off semiconductor devices are provided. A Group III-nitride buffer layer is provided. A Group III-nitride barrier layer is provided on the Group III-nitride buffer layer. A non-conducting spacer layer is provided on the Group III-nitride barrier layer. The Group III-nitride barrier layer and the spacer layer are etched to form a trench. The trench extends through the barrier layer and exposes a portion of the buffer layer. A dielectric layer is formed on the spacer layer and in the trench and a gate electrode is formed on the dielectric layer. Related methods of forming semiconductor devices are also provided herein. | 09-20-2012 |
20120326159 | LED STRUCTURE WITH ENHANCED MIRROR REFLECTIVITY - Embodiments of the present invention are generally related to LED chips having improved overall emission by reducing the light-absorbing effects of barrier layers adjacent mirror contacts. In one embodiment, a LED chip comprises one or more LEDs, with each LED having an active region, a first contact under the active region having a highly reflective mirror, and a barrier layer adjacent the mirror. The barrier layer is smaller than the mirror such that it does not extend beyond the periphery of the mirror. In another possible embodiment, an insulator is further provided, with the insulator adjacent the barrier layer and adjacent portions of the mirror not contacted by the active region or by the barrier layer. In yet another embodiment, a second contact is provided on the active region. In a further embodiment, the barrier layer is smaller than the mirror such that the periphery of the mirror is at least 40% free of the barrier layer, and the second contact is below the first contact and accessible from the bottom of the chip. | 12-27-2012 |
20130126894 | LOW VOLTAGE DIODE WITH REDUCED PARASITIC RESISTANCE AND METHOD FOR FABRICATING - A method of making a diode begins by depositing an Al | 05-23-2013 |
20130328073 | LED PACKAGE WITH MULTIPLE ELEMENT LIGHT SOURCE AND ENCAPSULANT HAVING PLANAR SURFACES - LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with a plurality of LEDs, which emit different colors of light, and a blanket conversion material layer on the LEDs and the submount. The encapsulant can be on the submount, over the LEDs, and light reflected within the encapsulant will reach the conversion material to be absorbed and emitted omnidirectionally. Reflected light can now escape the encapsulant, allowing for efficient emission and a broader emission profile, when compared to conventional packages with hemispheric encapsulants or lenses. The LED package can have a higher chip area to LED package area ratio. By using an encapsulant with planar surfaces, the LED package provides unique dimensional relationships between the features and LED package ratios, enabling more flexibility with different applications. | 12-12-2013 |
20130328074 | LED PACKAGE WITH MULTIPLE ELEMENT LIGHT SOURCE AND ENCAPSULANT HAVING PLANAR SURFACES - LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with one or a plurality of LEDs. In packages with a plurality of LEDs, each LED can emit the same or different wavelengths of light. A blanket conversion material layer can be included on at least some of the LEDs and the submount. The encapsulant with planar surfaces can be on the submount, over at least some of the LEDs, with the planar surfaces causing total internal reflection of light within the package. TIR light within the encapsulant can reach the conversion material, where it can be absorbed and emitted omnidirectionally. TIR light can now escape from the encapsulant and allow for efficient emission and a broader emission profile when compared to conventional packages with hemispheric encapsulants. | 12-12-2013 |
20130329425 | LED PACKAGE WITH ENCAPSULANT HAVING PLANAR SURFACES - LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with one or more LEDs, and a blanket conversion material layer on the LEDs and the submount. The encapsulant can be on the submount, over the LEDs, and light reflected within the encapsulant will reach the conversion material, where it is absorbed and emitted omnidirectionally. Reflected light can now escape the encapsulant, allowing for efficient emission and a broader emission profile, when compared to conventional packages with hemispheric encapsulants or lenses. In certain embodiments, the LED package provides a higher chip area to LED package area ratio. By using an encapsulant with planar surfaces, the LED package can provide unique dimensional relationships between the various features and the LED package ratios, enabling more flexibility with different applications. | 12-12-2013 |
20130341634 | LIGHT EMITTING DIODE DIELECTRIC MIRROR - A high efficiency LED chip is disclosed that comprises an active LED structure comprising an active layer between two oppositely doped layers. A first reflective layer can be provided adjacent to one of the oppositely doped layers, with the first layer comprising a material with a different index of refraction than the active LED structure. The difference in IR between the active LED structure and the first reflective layer increases TIR of light at the junction. In some embodiments the first reflective layer can comprise an IR lower than the semiconductor material, increasing the amount of light that can experience TIR. Some embodiments of LED chips according to the present invention can also comprise a second reflective layer or metal layer on and used in conjunction with the first reflective layer such that light passing through the first reflective layer can be reflected by the second reflective layer. | 12-26-2013 |
20140167065 | LED STRUCTURE WITH ENHANCED MIRROR REFLECTIVITY - Embodiments of the present invention are generally related to LED chips having improved overall emission by reducing the light-absorbing effects of barrier layers adjacent mirror contacts. In one embodiment, a LED chip comprises one or more LEDs, with each LED having an active region, a first contact under the active region having a highly reflective mirror, and a barrier layer adjacent the mirror. The barrier layer is smaller than the mirror, such that it does not extend beyond the periphery of the mirror. In another possible embodiment, an insulator is further provided, with the insulator adjacent the barrier layer and adjacent portions of the mirror not contacted by the active region or by the barrier layer. In yet another embodiment, a second contact is provided on the active region. In a further embodiment, the barrier layer is smaller than the mirror such that the periphery of the mirror is at least 40% free of the barrier layer, and the second contact is below the first contact and accessible from the bottom of the chip. | 06-19-2014 |
20140217443 | CHIP WITH INTEGRATED PHOSPHOR - This disclosure relates to light emitting devices and methods of manufacture thereof, including side and/or multi-surface light emitting devices. Embodiments according to the present disclosure include the use of a functional layer, which can comprise a stand-off distance with one or more portions of the light emitter to improve the functional layer's stability during further device processing. The functional layer can further comprise winged portions allowing for the coating of the lower side portions of the light emitter to further interact with emitted light and a reflective layer coating on the functional layer to further improve light extraction and light emission uniformity. Methods of manufacture including methods utilizing virtual wafer structures are also disclosed. | 08-07-2014 |
20140268771 | LED LUMINAIRE WITH IMPROVED THERMAL MANAGEMENT AND NOVEL LED INTERCONNECTING ARCHITECTURE - A LED lamp includes an optically transmissive enclosure and a base connected to the enclosure. LEDs are mounted on a ribbon for emitting light when energized though an electrical path from the base. The mounting ribbon for the LEDs has a surface that is positioned adjacent an interior surface of the enclosure for transmitting heat from the plurality of LEDs to the enclosure. | 09-18-2014 |