Patent application number | Description | Published |
20080242097 | Selective deposition method - The invention refers to a selective deposition method. A substrate comprising at least one structured surface is provided. The structured surface comprises a first area and a second area. The first area is selectively passivated regarding reactants of a first deposition technique and the second area is activated regarding the reactants the first deposition technique. A passivation layer on the second area is deposited via the first deposition technique. The passivation layer is inert regarding a precursors selected from a group of oxidizing reactants. A layer is deposited in the second area using a second atomic layer deposition technique as second deposition technique using the precursors selected form the group of oxidizing reactants. | 10-02-2008 |
20090020821 | DUAL WORKFUNCTION SEMICONDUCTOR DEVICE - A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device. | 01-22-2009 |
20090159972 | METHOD OF FABRICATING MULTI-GATE SEMICONDUCTOR DEVICES WITH IMPROVED CARRIER MOBILITY - A method of fabricating a multi-gate device is disclosed. In one aspect, the method includes providing a substrate having a first semiconductor layer with a first carrier mobility enhancing parameter, an insulating layer, a second semiconductor layer with a second carrier mobility enhancing parameter different from the first carrier mobility enhancing parameter. A first and second dielectric layer are then provided on the substrate. A first trench is formed in a first active region through the dielectric layers, the second semiconductor layer and the buried insulating layer. A first fin is formed in the first trench, protruding above the first dielectric layer and having the first carrier mobility enhancing parameter. A second trench is formed in a second active region through the dielectric layers. A second fin is formed in the second trench, protruding above the first dielectric layer and having the second mobility enhancing parameter. | 06-25-2009 |
20090194410 | Electrode of an Integrated Circuit - The present invention refers to an electrode comprising a first metallic layer and a compound comprising at least one of a nitride, oxide, and oxynitride of a second metallic material. | 08-06-2009 |
20100090264 | INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICES - One embodiment relates to an integrated circuit formed on a semiconductor body having interconnect between source/drain regions of a first and second transistor. The interconnect includes a metal body arranged underneath the surface of the semiconductor body. A contact element establishes electrical contact between the metal body and the source/drain regions of the first and second transistor. The contact element extends along a connecting path between the source/drain regions of the first and second transistors. Other methods, devices, and systems are also disclosed. | 04-15-2010 |
20110068375 | MULTI-GATE SEMICONDUCTOR DEVICES WITH IMPROVED CARRIER MOBILITY - A multi-gate device is disclosed. In one aspect, the device includes a substrate having a first semiconductor layer of a first carrier mobility enhancing parameter, a buried insulating layer, and a second semiconductor layer with a second carrier mobility enhancing parameter. The device also includes a first active region electrically isolated from a second active region in the substrate. The first active region has a first fin grown on the first semiconductor layer and having the first mobility enhancing parameter. The second active region has a second fin grown on the second semiconductor layer and having the second mobility enhancing parameter. The device also includes a dielectric layer over the second semiconductor layer which is located between the first fin and the second fin. The first and second fins protrude through and above the dielectric layer. | 03-24-2011 |