Patent application number | Description | Published |
20090045503 | Multidirectional Semiconductor Device Package Thermal Enhancement Systems and Methods - The invention provides thermally-enhanced semiconductor device package systems and associated methods for reducing thermal resistance for improved heat egress. In one disclosed embodiment of the invention, a semiconductor device package system includes a packaged semiconductor device having operable contacts for external electrical coupling. The packaged device has an exposed surface, and a heat spreader is affixed to the exposed device surface. The heat spreader includes a portion extending in a configuration coplanar with the device contacts. In another example of a preferred embodiment of the invention, a semiconductor device package system includes an external heat sink affixed to a heat spreader, the heat spreader having a portion extending in a configuration coplanar with the device contacts. According to exemplary systems and methods of the invention package systems are provided with a heat spreader so configured that the junction-to-board thermal resistance and junction-to-case thermal resistance are both reduced. | 02-19-2009 |
20090115053 | Semiconductor Package Thermal Performance Enhancement and Method - A semiconductor device package and related method are disclosed for providing a semiconductor device encapsulated in a protective package body. The device has an exposed surface to which a thermal compound is applied for improving a thermal path for the egress of heat from the device. Preferred embodiments are disclosed in which a removable cover is attached to the thermal compound for further improved protection during handling. | 05-07-2009 |
20090186453 | Power Semiconductor Devices Having Integrated Inductor - An electronic device ( | 07-23-2009 |
20100001382 | MANUFACTURING METHOD FOR INTEGRATING A SHUNT RESISTOR INTO A SEMICONDUCTOR PACKAGE - An integrated circuit package that comprises a lead frame, an integrated circuit located on the lead frame and a shunt resistor coupled to the lead frame and to the integrated circuit. The shunt resistor has a lower temperature coefficient of resistance than the lead frame, and the lead frame has a lower resistivity than the shunt resistor. The shunt resistor has a low-resistance coupling to external leads of the lead frame, or, the shunt resistor has its own integrated external leads. | 01-07-2010 |
20100091472 | SEMICONDUCTOR PACKAGE - Various exemplary embodiments provide components, devices, and methods of semiconductor packaging. The disclosed packaging component can include a mold material disposed around a lead frame and at least an integrated circuit (IC), wherein the IC is electrically connected with one side of the lead frame. The opposite side of the lead frame including, for example, lead segments, can be exposed from the mold material. A variety of other components, devices, and packages can then be assembled, e.g., over the disclosed packaging component, through the exposed regions so as to improve packaging densities. | 04-15-2010 |
20100197045 | Power Semiconductor Devices Having Integrated Inductor - An electronic device ( | 08-05-2010 |
20100295161 | Method for Semiconductor Leadframes in Low Volume and Rapid Turnaround - A method for fabricating a leadframe for a QFN/SON semiconductor device by selecting ( | 11-25-2010 |
20100301496 | Structure and Method for Power Field Effect Transistor - A packaged semiconductor device has a metal plate ( | 12-02-2010 |
20110024895 | Semiconductor Package Thermal Performance Enhancement and Method - A semiconductor device package and related method are disclosed for providing a semiconductor device encapsulated in a protective package body. The device has an exposed surface to which a thermal compound is applied for improving a thermal path for the egress of heat from the device. Preferred embodiments are disclosed in which a removable cover is attached to the thermal compound for further improved protection during handling. | 02-03-2011 |
20110033985 | Manufacturing Method for Integrating a Shunt Resistor into a Semiconductor Package - An integrated circuit package that comprises a lead frame, an integrated circuit located on the lead frame and a shunt resistor coupled to the lead frame and to the integrated circuit. The shunt resistor has a lower temperature coefficient of resistance than the lead frame, and the lead frame has a lower resistivity than the shunt resistor. The shunt resistor has a low-resistance coupling to external leads of the lead frame, or, the shunt resistor has its own integrated external leads. | 02-10-2011 |
20110248392 | Ball-Grid Array Device Having Chip Assembled on Half-Etched metal Leadframe - A ball grid array device ( | 10-13-2011 |
20120015479 | Semiconductor Package with a Mold Material Encapsulating a Chip and a Portion of a Lead Frame - Various exemplary embodiments provide components, devices, and methods of semiconductor packaging. The disclosed packaging component can include a mold material disposed around a lead frame and at least an integrated circuit (IC), wherein the IC is electrically connected with one side of the lead frame. The opposite side of the lead frame including, for example, lead segments, can be exposed from the mold material. A variety of other components, devices, and packages can then be assembled, e.g., over the disclosed packaging component, through the exposed regions so as to improve packaging densities. | 01-19-2012 |
20120086112 | Multi-Component Electronic System Having Leadframe with Support-Free Cantilever Leads | 04-12-2012 |
20120126383 | METHOD FOR SEMICONDUCTOR LEADFRAMES IN LOW VOLUME AND RAPID TURNAROUND - An apparatus comprising a metallic leadframe including a pad and a plurality of leads. Each having a first and a parallel second surface and sidewalls normal to the surfaces. The pad and each lead having a core of a first metal and layers of a second metal different from the first metal on each surface. The first metal exposed at the sidewalls and at portions of the first surface of the pad. A semiconductor chip is assembled on the leadframe. Portions of the assembled chip and the leadframe are packaged in a polymeric encapsulation compound. | 05-24-2012 |
20120126385 | METHOD FOR SEMICONDUCTOR LEADFRAMES IN LOW VOLUME AND RAPID TURNAROUND - A leadframe for a QFN/SON semiconductor device comprising a strip of a first metal as the leadframe core with a plurality of leads and a pad. a layer of a second metal over both surfaces of the strip. There are sidewalls normal to the surfaces. The first metal exposed at the sidewalls and at portions of a surface of the pad. | 05-24-2012 |
20120217044 | HIGH PIN COUNT, SMALL SON/QFN PACKAGES HAVING HEAT-DISSIPATING PAD - A plastic SON/QFN package ( | 08-30-2012 |
20130034936 | STRUCTURE AND METHOD FOR POWER FIELD EFFECT TRANSISTOR - Methods for fabricating a packaged semiconductor device includes providing a metal plate having a single flat first surface and a parallel second surface. The flat first surface ending in four sawed plate sides. The plate having on the second surface at least one mesa of the same metal and a linear array of insular mesas. The at least one mesa is raised from the second surface. A single terminal of a semiconductor chip is attached to the second plate surface. | 02-07-2013 |
20130192655 | THERMOELECTRIC DEVICE EMBEDDED IN A PRINTED CIRCUIT BOARD - A circuit board with an embedded thermoelectric device with hard thermal bonds. A method of embedding a thermoelectric device in a circuit board and forming hard thermal bonds. | 08-01-2013 |
20130221455 | Methods for Embedding Controlled-Cavity MEMS Package in Integration Board - An embedded micro-electro-mechanical system (MEMS) ( | 08-29-2013 |
20140054795 | Electronic Assembly With Three Dimensional Inkjet Printed Traces - One method of making an electronic assembly includes mounting one electrical substrate on another electrical substrate with a face surface on the one substrate oriented transversely of a face surface of the other substrate. The method also includes inkjet printing on the face surfaces a conductive trace that connects an electrical contact on the one substrate with an electrical connector on the other substrate. An electronic assembly may include a first substrate having a generally flat surface with a first plurality of electrical contacts thereon; a second substrate having a generally flat surface with a second plurality of electrical contacts thereon, the surface of the second substrate extending transversely of the surface of said first substrate; and at least one continuous conductive ink trace electrically connecting at least one of the first plurality of electrical contacts with at least one of the second plurality of electrical contacts. | 02-27-2014 |
20140124939 | DISCRETE DEVICE MOUNTED ON SUBSTRATE - A method of making an electronic device having a discrete device mounted on a surface of an electronic die with both the discrete device and the die connected by heat cured conductive ink and covered with cured encapsulant including placing the discrete device on the die; and keeping the temperature of each of the discrete device and the die below about 200° C. Also disclosed is a method of electrically attaching a discrete device to a substrate that includes placing the device on the substrate, applying conductive ink that connects at least one terminal on the device to at least one contact on the substrate and curing the conductive ink. Also disclosed is an IC package with a discrete electrical device having electrical terminals; an electrical substrate having contact pads on a surface thereof; and cured conductive ink connecting at least one of the electrical terminals with at least one of the contact pads. | 05-08-2014 |
20140127856 | Electronic Assembly with Three Dimensional Inkjet Printed Traces - One method of making an electronic assembly includes mounting one electrical substrate on another electrical substrate with a face surface on the one substrate oriented transversely of a face surface of the other substrate. The method also includes inkjet printing on the face surfaces a conductive trace that connects an electrical contact on the one substrate with an electrical connector on the other substrate. An electronic assembly may include a first substrate having a generally flat surface with a first plurality of electrical contacts thereon; a second substrate having a generally flat surface with a second plurality of electrical contacts thereon, the surface of the second substrate extending transversely of the surface of said first substrate; and at least one continuous conductive ink trace electrically connecting at least one of the first plurality of electrical contacts with at least one of the second plurality of electrical contacts. | 05-08-2014 |
20140175599 | INTEGRATED CIRCUIT PACKAGE WITH PRINTED CIRCUIT LAYER - An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die. | 06-26-2014 |
20140270057 | X-RAY SENSOR AND SIGNAL PROCESSING ASSEMBLY FOR AN X-RAY COMPUTED TOMOGRAPHY MACHINE - An apparatus having an X-ray sensor assembly with X-ray blocking pixels divided by X-ray transmitting gaps with the X-ray blocking pixels casting an X-ray blocking shadow; and a die containing signal processing electronics, with the signal processing electronics positioned substantially entirely within the X-ray blocking shadow. A method for detecting the alignment between the X-ray sensor assembly and the die is disclosed. Also disclosed is an X-ray computed tomography machine having a printed circuit board (“PCB”), a die embedded in the PCB, and a signal source wherein signals are routed to and from the die by traces on at least one of the surfaces of the PCB. | 09-18-2014 |
20140321601 | ACTIVE SHIELD FOR X-RAY COMPUTED TOMOGRAPHY MACHINE - An active shield for an X-ray computed tomography machine includes a radiation shielding substrate and a flexible circuit board wrapped around the substrate. | 10-30-2014 |
20140345915 | HIGH PIN COUNT, SMALL SON/QFN PACKAGES - A plastic SON/QFN package for high power has a pair of oblong metal pins exposed from a surface of the plastic, the pins straddling a corner of the package; each pin has a long axis, the long axes of the pair forming a non-orthogonal angle. | 11-27-2014 |
20140361402 | INTEGRATED CIRCUIT PACKAGE WITH PRINTED CIRCUIT LAYER - An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die. | 12-11-2014 |
20150036719 | THERMOMETER DEVICE AND METHOD OF MAKING - A method of manufacturing a thermometer probe includes: obtaining a hollow housing having an open end and a curved inner surface; obtaining a flexible detecting component having an adhesive layer; obtaining an insertion component; detachably attaching the flexible detecting component to the insertion component; inserting the insertion component, having the flexible detecting component attached thereto, through the open end of the hollow housing and into the hollow housing such that the adhesive layer is disposed between the insertion component and the inner surface; and adhering, via the adhesive layer, the flexible detecting component to the curved inner surface. | 02-05-2015 |