Patent application number | Description | Published |
20140145762 | POWER SUPPLY SENSING CIRCUITS IN INTEGRATED CIRCUITS - Integrated Circuits (ICs) comprising circuits configured to generate a power on reset (POR) pulse are disclosed. An IC comprises a power supply sense circuit configured to generate a sense signal in response to a transition of a power supply signal from a first level to a second level, and a pulse generation circuit coupled with the power supply sense circuit. The pulse generation circuit is configured to generate a power on reset (POR) pulse of a threshold duration based on the sense signal. The IC further includes a reset generation circuit coupled with the pulse generation circuit to receive the POR pulse. The reset generation circuit is configured to generate a reset pulse based on the POR signal and of at least one control signal, where the reset pulse is configured to be utilized to perform a reset of one or more elements of the integrated circuit. | 05-29-2014 |
20140145767 | PULSE GENERATION CIRCUITS IN INTEGRATED CIRCUITS - Integrated Circuits (ICs) comprising circuits configured to generate a power on reset (POR) pulse are disclosed. An IC comprises a power supply sense circuit configured to generate a sense signal in response to a transition of a power supply signal from a first level to a second level, and a pulse generation circuit coupled with the power supply sense circuit. The pulse generation circuit is configured to generate a power on reset (POR) pulse of a threshold duration based on the sense signal. The IC further includes a reset generation circuit coupled with the pulse generation circuit to receive the POR pulse. The reset generation circuit is configured to generate a reset pulse based on the POR signal and of at least one control signal, where the reset pulse is configured to be utilized to perform a reset of one or more elements of the integrated circuit. | 05-29-2014 |
20140285014 | METHODS AND APPARATUS FOR A SINGLE INDUCTOR MULTIPLE OUTPUT (SIMO) DC-DC CONVERTER CIRCUIT - In some embodiments, an apparatus includes a single-inductor multiple-output (SIMO) direct current (DC-DC) converter circuit, with the SIMO DC-DC converter circuit having a set of output nodes. The apparatus also includes a panoptic dynamic voltage scaling (PDVS) circuit operatively coupled to the SIMO DC-DC converter circuit, where the PDVS circuit has a set of operational blocks with each operational block from the set of operational blocks drawing power from one supply voltage rail from a set of supply voltage rails. Additionally, each output node from the set of output nodes is uniquely associated with a supply voltage rail from the set of supply voltage rails. | 09-25-2014 |
20150207411 | LOW INPUT VOLTAGE BOOST CONVERTER WITH PEAK INDUCTOR CURRENT CONTROL AND OFFSET COMPENSATED ZERO DETECTION - The low input voltage boost converter with peak inductor current control and offset compensated zero detection provide a boost converter scheme to harvest energy from sources with small output voltages. Some embodiments described herein includes a thermoelectric boost converter that combines an I | 07-23-2015 |
20150214894 | LOW VOLTAGE CRYSTAL OSCILLATOR (XTAL) DRIVER WITH FEEDBACK CONTROLLED DUTY CYCLING FOR ULTRA LOW POWER - A low voltage crystal oscillator (XTAL) driver with feedback controlled duty cycling for ultra low power biases an amplifier for an XTAL in the sub-threshold operating regime. A feedback control scheme can be used to bias the amplifier for an XTAL biased in the sub-threshold operating regime. The amplifier of a XTAL oscillator can be duty cycled to save power, e.g., the XTAL driver can be turned off to save power when the amplitude of the XTAL oscillation reaches a maximum value in range; but be turned back on when the amplitude of the XTAL oscillation starts to decay, to maintain the oscillation before it stops. In addition or alternatively, a feedback control scheme to duty cycle the amplifier of a XTAL oscillator can be used to monitor the amplitude of the oscillation. | 07-30-2015 |
20150214955 | LOW POWER CLOCK SOURCE - An ultra-low power clock source includes a compensated oscillator and an uncompensated oscillator coupled by a comparator circuit. In an example, the compensated oscillator is more stable than the uncompensated oscillator with respect to changes in one or more of temperature, voltage, age, or other environmental parameters. The uncompensated oscillator includes a configuration input configured to adjust an operating characteristic of the uncompensated oscillator. In an example, the uncompensated oscillator is adjusted using information from the comparator circuit about a comparison of output signals from the compensated oscillator and the uncompensated oscillator. | 07-30-2015 |
20160041570 | METHODS AND APPARATUS FOR LOW INPUT VOLTAGE BANDGAP REFERENCE ARCHITECTURE AND CIRCUITS - In some embodiments, an apparatus includes a bandgap reference circuit having a first bipolar junction transistor (BJT) that can receive a current from a node having a terminal voltage and can output a base emitter voltage. The apparatus also includes a second bipolar junction transistor (BJT) having a device width greater than a device width of the first BJT. The second BJT can receive a current from a node having a terminal voltage and output a base emitter voltage. In such embodiments, the apparatus also includes a reference generation circuit operatively coupled to the first BJT and the second BJT, where the reference generation circuit can generate a bandgap reference voltage based on the base emitter voltage of the first BJT and the base emitter voltage of the second BJT. | 02-11-2016 |
Patent application number | Description | Published |
20120209749 | SNAP MOBILE PAYMENT APPARATUSES, METHODS AND SYSTEMS - The SNAP MOBILE PAYMENT APPARATUSES, METHODS AND SYSTEMS (“SNAP”) transform real-time-generated merchant-product Quick Response codes via SNAP components into virtual wallet card-based transaction purchase notifications. In one embodiment, the SNAP obtains a snapshot of a QR code presented on a display screen of a point-of-sale device from a mobile device. The SNAP decodes the QR code to obtain product information included in a checkout request of the user, and merchant information for processing a user purchase transaction with a merchant providing the QR code. The SNAP accesses a user virtual wallet to obtain user account information to process the user purchase transaction with the merchant. Using the product information, merchant information and user account information, the SNAP generates a card authorization request, and which the SNAP provides to a payment network for transaction processing. Also, the SNAP obtains a purchase receipt confirming processing of the user purchase transaction. | 08-16-2012 |
20130024364 | CONSUMER TRANSACTION LEASH CONTROL APPARATUSES, METHODS AND SYSTEMS - The Consumer Transaction Leash Control Apparatuses, Methods And Systems (“C-LEASH”) transform touchscreen inputs into a virtual wallet mobile application interface including payment control parameters configuration via C-LEASH components into transaction receipts/alerts. In one implementation, the C-LEASH provides, a transaction payment control processor-implemented method, comprising: obtaining, from a user device, payment control parameters via a user interface; storing the payment control parameters with an account; receiving a transaction payment request including payment account information and purchase information; retrieving the stored payment control parameters based on the payment account information; determining when the purchase information of the transaction payment request violates one or more of the stored payment control parameters; and suspending the transaction payment request and sending an alert message to the user device. | 01-24-2013 |
20140019352 | MULTI-PURPOSE VIRTUAL CARD TRANSACTION APPARATUSES, METHODS AND SYSTEMS - The MULTI-PURPOSE VIRTUAL CARD TRANSACTION APPARATUSES, METHODS AND SYSTEMS (“WIP”) transform wallet in proxy card generation requests and purchase inputs via WIP components into wallet in proxy card generation notifications and wallet in proxy card-based transaction purchase notifications. In one implementation, the WIP server may receive a transaction authentication request associated with a proxy payment identifier, and then determine that the proxy payment identifier is associated with an electronic wallet. The WIP sever may further obtain a payment identifier associated with the electronic wallet, and authenticate the transaction using the obtained payment identifier associated with the electronic wallet. | 01-16-2014 |
20140337175 | Universal Electronic Payment Apparatuses, Methods and Systems - The UNIVERSAL ELECTRONIC PAYMENT APPARATUS, METHODS AND SYSTEMS (“UEP”) transform touchscreen inputs into a virtual wallet mobile application interface via UEP components into purchase transaction triggers and receipt notices. In one implementation the UEP provides, via a user device, a product information search request; and obtains, in response to the product information search request, information on a first product for sale by a first merchant and a second product for sale by a second merchant. The UEP generates a single purchase transaction request, using the information on the first product for sale by the first merchant and the second product for sale by the second merchant. The UEP provides, via the user device, the single purchase transaction request for payment processing. Also, the UEP obtains an electronic purchase receipt for the first product for sale by the first merchant and the second product for sale by the second merchant. | 11-13-2014 |
20150248664 | Snap Mobile Payment Apparatuses, Methods and Systems - The SNAP MOBILE PAYMENT APPARATUSES, METHODS AND SYSTEMS (“SNAP”) transform real-time-generated merchant-product Quick Response codes via SNAP components into virtual wallet card-based transaction purchase notifications. Payment information and VAS data can also be provided based on location. A request for payment information can be received. A location can be determined, and a merchant associated with the location can also be determined. Payment information and/or VAS data can be selected based on the merchant and/or location, and can be provided for a payment transaction. | 09-03-2015 |
Patent application number | Description | Published |
20100003195 | KDR AND VEGF/KDR BINDING PEPTIDES AND THEIR USE IN DIAGNOSIS AND THERAPY - The present invention provides polypeptides, peptide dimer, and multimeric complexes comprising at least one binding moiety for KDR or VEGF/KDR complex, which have a variety of uses wherever treating, detecting, isolating or localizing angiogenesis is advantageous. Particularly disclosed are synthetic, isolated polypeptides capable of binding KDR or VEGF/KDR complex with high affinity (e.g., having a K | 01-07-2010 |
20140107041 | KDR AND VEGF/KDR BINDING PEPTIDES AND THEIR USE IN DIAGNOSIS AND THERAPY - The present invention provides polypeptides, peptide dimer, and multimeric complexes comprising at least one binding moiety for KDR or VEGF/KDR complex, which have a variety of uses wherever treating, detecting, isolating or localizing angiogenesis is advantageous. Particularly disclosed are synthetic, isolated polypeptides capable of binding KDR or VEGF/KDR complex with high affinity (e.g., having a K | 04-17-2014 |
Patent application number | Description | Published |
20110070165 | MULTIVALENT CONSTRUCTS FOR THERAPEUTIC AND DIAGNOSTIC APPLICATIONS - The invention provides compositions and methods for therapeutic and diagnostic applications. | 03-24-2011 |
20110097275 | KDR AND VEGF/KDR BINDING PEPTIDES AND THEIR USE IN DIAGNOSIS AND THERAPY - The present invention provides polypeptides, peptide dimers, and multimeric complexes comprising at least one binding moiety for KDR or VEGF/KDR complex, which have a variety of uses wherever treating, detecting, isolating or localizing angiogenesis is advantageous. Particularly disclosed are synthetic, isolated polypeptides capable of binding KDR or VEGF/KDR complex with high affinity (e.g., having a K | 04-28-2011 |
20110286929 | MULTIVALENT CONSTRUCTS FOR THERAPEUTIC AND DIAGNOSTIC APPLICATIONS - The invention provides compositions and methods for therapeutic and diagnostic applications. | 11-24-2011 |
20140161732 | KDR AND VEGF/KDR BINDING PEPTIDES AND THEIR USE IN DIAGNOSIS AND THERAPY - The present invention provides polypeptides, peptide dimers, and multimeric complexes comprising at least one binding moiety for KDR or VEGF/KDR complex, which have a variety of uses wherever treating, detecting, isolating or localizing angiogenesis is advantageous. Particularly disclosed are synthetic, isolated polypeptides capable of binding KDR or VEGF/KDR complex with high affinity (e.g., having a K | 06-12-2014 |
20140205545 | MULTIVALENT CONSTRUCTS FOR THERAPEUTIC AND DIAGNOSTIC APPLICATIONS - The invention provides compositions and methods for therapeutic and diagnostic applications. | 07-24-2014 |
20140286864 | KDR AND VEGF/KDR BINDING PEPTIDES AND THEIR USE IN DIAGNOSIS AND THERAPY - The present invention provides polypeptides, peptide dimer, and multimeric complexes comprising at least one binding moiety for KDR or VEGF/KDR complex, which have a variety of uses wherever treating, detecting, isolating or localizing angiogenesis is advantageous. Particularly disclosed are synthetic, isolated polypeptides capable of binding KDR or VEGF/KDR complex with high affinity (e.g., having a K | 09-25-2014 |
20150374843 | MULTIVALENT CONSTRUCTS FOR THERAPEUTIC AND DIAGNOSTIC APPLICATIONS - The invention provides compositions and methods for therapeutic and diagnostic applications. | 12-31-2015 |
Patent application number | Description | Published |
20090248991 | Termination of Prefetch Requests in Shared Memory Controller - A real request from a CPU to the same memory bank as a prior prefetch request is transmitted to the per-memory bank logic along with a kill signal to terminate the prefetch request. This avoids waiting for a prefetch request to complete before sending the real request to the same memory bank. The kill signal gates off any acknowledgement of completion of the prefetch request. This invention reduces the latency for completion of a high priority real request when a low priority speculative request to a different address in the same memory bank has already been dispatched. | 10-01-2009 |
20090248992 | Upgrade of Low Priority Prefetch Requests to High Priority Real Requests in Shared Memory Controller - A prefetch controller implements an upgrade when a real read access request hits the same memory bank and memory address as a previous prefetch request. In response per-memory bank logic promotes the priority of the prefetch request to that of a read request. If the prefetch request is still waiting to win arbitration, this upgrade in priority increases the likelihood of gaining access generally reducing the latency. If the prefetch request had already gained access through arbitration, the upgrade has no effect. This thus generally reduces the latency in completion of a high priority real request when a low priority speculative prefetch was made to the same address. | 10-01-2009 |
20090249105 | Hardware Controlled Power Management of Shared Memories - This invention manages power down and wakeup of shared memories in a multiprocessor system. A register for each shared memory has bits corresponding to each master. When a master wants to power down a memory, it sets its corresponding bit in the register. A hardware power down controller for the memory bank powers the memory bank if any processor signals powering the memory bank. The hardware power down controller for the memory bank powers down the memory bank only if all processor signal powering down the memory bank. waits for all masters to set their corresponding bits in the register before initiating power down of the memories. Software running on any processor has a view of the shared memory independent of the other processors and no inter-processor communication is needed. | 10-01-2009 |
20120079247 | DUAL REGISTER DATA PATH ARCHITECTURE - A processor includes a first and second execution unit each of which is arranged to execute multiply instructions of a first type upon fixed point operands and to execute multiply instructions of a second type upon floating point operands. A register file of the processor stores operands in registers that are each addressable by instructions for performing the first and second types of operations. An instruction decode unit is responsive to the at least one multiply instruction of the first type and the at least one multiply instruction of the second type to at the same time enable a first data path between the first set of registers and the first execution unit and to enable a second data path between a second set of registers and the second execution unit. | 03-29-2012 |
Patent application number | Description | Published |
20130135040 | HIGHLY LINEAR, LOW-POWER, TRANSCONDUCTOR - Systems and methods which implement a transconductor replica feedback (TRF) block in a transconductor circuit are shown. In accordance with embodiments, the TRF block comprises a feedback transistor disposed as a replica of a corresponding transconductance transistor of the transconductor circuit. The TRF block provides enhanced looking-in degeneration impedance for the transconductor circuit, thereby allowing for higher linearity and lower power at the same time. TRF transconductors of embodiments can be implemented in, or otherwise applied to, various different circuits such as LNAs, filters, etc. | 05-30-2013 |
20130144544 | SYSTEMS AND METHODS FOR TESTING CIRCUITRY PROGRAMMABILITY - Systems and methods in which circuitry programmability is tested through observing a change in voltage on a circuit node that is affected by the programmability under test. For example, one or more particular circuit node may be identified at which some measurable change in voltage occurs upon a change in state of a programmable circuit under test (PCUT). Thus, by detecting a change in voltage at such a circuit node in association with a programmable state change, embodiments may determine that respective circuit programmability is functional. Test circuitry of embodiments provides for circuitry programmability testing, through observing a change in voltage on a circuit node that is affected by the programmability under test, suitable for testing digital programmability which is deeply embedded in analog circuitry. | 06-06-2013 |
Patent application number | Description | Published |
20120199878 | Drain Extended Field Effect Transistors and Methods of Formation Thereof - In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. The retrograde well has a shallower layer with a first peak doping and a deeper layer with a second peak doping higher than the first peak doping. The device further includes a drain region having the second doping type over the retrograde well. An extended drain region is disposed in the retrograde well, and couples the channel region with the drain region. An isolation region is disposed between a gate overlap region of the extended drain region and the drain region. A length of the drain region is greater than a depth of the isolation region. | 08-09-2012 |
20130140626 | Field-Effect Device and Manufacturing Method Thereof - Embodiments relate to a field-effect device that includes a body region, a first source/drain region of a first conductivity type, a second source/drain region, and a pocket implant region adjacent to the first source/drain region, the pocket implant region being of a second conductivity type, wherein the second conductivity type is different from the first conductivity type. The body region physically contacts the pocket implant region. | 06-06-2013 |
20140015010 | Drain Extended Field Effect Transistors and Methods of Formation Thereof - In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. The retrograde well has a shallower layer with a first peak doping and a deeper layer with a second peak doping higher than the first peak doping. The device further includes a drain region having the second doping type over the retrograde well. An extended drain region is disposed in the retrograde well, and couples the channel region with the drain region. An isolation region is disposed between a gate overlap region of the extended drain region and the drain region. A length of the drain region is greater than a depth of the isolation region. | 01-16-2014 |
20140145265 | High Voltage Semiconductor Devices - In one embodiment, the semiconductor device includes a first source of a first doping type disposed in a substrate. A first drain of the first doping type is disposed in the substrate. A first gate region is disposed between the first source and the first drain. A first channel region of a second doping type is disposed under the first gate region. The second doping type is opposite to the first doping type. A first extension region of the first doping type is disposed between the first gate and the first drain. The first extension region is part of a first fin disposed in or over the substrate. A first isolation region is disposed between the first extension region and the first drain. A first well region of the first doping type is disposed under the first isolation region. The first well region electrically couples the first extension region with the first drain. | 05-29-2014 |
20150255450 | Field-Effect Device and Manufacturing Method Thereof - Embodiments relate to a field-effect device that includes a body region, a first source/drain region of a first conductivity type, a second source/drain region, and a pocket implant region adjacent to the first source/drain region, the pocket implant region being of a second conductivity type, wherein the second conductivity type is different from the first conductivity type. The body region physically contacts the pocket implant region. | 09-10-2015 |
20150340442 | Drain Extended Field Effect Transistors and Methods of Formation Thereof - In an embodiment of the invention, a semiconductor device includes a first region having a first doping type, a channel region having the first doping type disposed in the first region, and a retrograde well having a second doping type. The second doping type is opposite to the first doping type. The retrograde well has a shallower layer with a first peak doping and a deeper layer with a second peak doping higher than the first peak doping. The device further includes a drain region having the second doping type over the retrograde well. An extended drain region is disposed in the retrograde well, and couples the channel region with the drain region. An isolation region is disposed between a gate overlap region of the extended drain region and the drain region. A length of the drain region is greater than a depth of the isolation region. | 11-26-2015 |
Patent application number | Description | Published |
20120159248 | DIAGNOSTIC FRAMEWORK FOR USE WITH APPLICATION SERVERS AND VIRTUAL MACHINES - Described herein are systems and methods for providing diagnostic information between an application server (e.g., a WebLogic server), and a virtual machine (VM) (e.g., a JRockit VM). In accordance with an embodiment, the system includes a diagnostic monitoring component adapted to obtain diagnostic data indicative of all available data on an application server, including diagnostic information from one or more application server components running on the application server, obtain diagnostic data from the virtual machine, and persists the diagnostic data obtained from the application server and the virtual machine into a diagnostic data image file. The system further includes a console that provides access to the diagnostic data persisted into the diagnostic image file. | 06-21-2012 |
20120311098 | SYSTEM AND METHOD FOR COLLECTING REQUEST METRICS IN AN APPLICATION SERVER ENVIRONMENT - Described herein are systems and methods for collecting and surfacing metrics with respect to their classification; and the use of the metrics by a workload manager and other application monitoring tools to provide quality-of-service and workload management. Each request is classified, either by the application server or another process. A request classification identifier (RCID) is associated with each request, and thereafter flows with that request as it is being processed. The RCID value is used by data collectors at various points in the system to aggregate the metrics, and a workload manager collects the metrics. The collected metrics are then processed by a rules engine at the workload manager, which analyzes the metrics and generates adjustment recommendations to provide quality-of-service and workload management. | 12-06-2012 |
20120311138 | SYSTEM AND METHOD FOR USING QUALITY OF SERVICE WITH WORKLOAD MANAGEMENT IN AN APPLICATION SERVER ENVIRONMENT - Described herein are systems and methods for collecting and surfacing metrics with respect to their classification; and the use of the metrics by a workload manager and other application monitoring tools to provide quality-of-service and workload management. Each request is classified, either by the application server or another process. A request classification identifier (RCID) is associated with each request, and thereafter flows with that request as it is being processed. The RCID value is used by data collectors at various points in the system to aggregate the metrics, and a workload manager collects the metrics. The collected metrics are then processed by a rules engine at the workload manager, which analyzes the metrics and generates adjustment recommendations to provide quality-of-service and workload management. | 12-06-2012 |
20150372887 | SYSTEM AND METHOD FOR MONITORING AND DIAGNOSTICS IN A MULTITENANT APPLICATION SERVER ENVIRONMENT - A system and method for monitoring and diagnostics in an application server environment. A system can comprise one or more computers, which can include an application server environment executing thereon, together with a plurality of deployable resources configured to be used within the application server environment, and a plurality of partitions, wherein each partition provides an administrative and runtime subdivision of a domain. A diagnostic framework, such as a WebLogic Diagnostic Framework (WLDF) can also be provided, wherein the diagnostic framework is configured to perform at least one action from the group consisting of partition scoped logging, partition scoped monitoring, and partition scoped diagnostic imaging. | 12-24-2015 |
20160092342 | SYSTEM AND METHOD FOR DYNAMIC DEBUGGING IN A MULTITENANT APPLICATION SERVER ENVIRONMENT - In accordance with an embodiment, described herein is a system and method for dynamic debugging in an application server environment. An exemplary method can provide, at one or more computers, including an application server environment executing thereon, a plurality of deployable resources which can be used within the application server environment, one or more running managed servers, the one or more managed servers being within a domain, and a debug framework, the debug framework comprising a debug patch directory, the debug patch directory containing one or more debug patches. The method can activate a selected debug patch within the domain, the selected debug patch comprising at least one class, the selected debug patch designed to gather information about the problem within the domain. The managed servers, upon activation of the selected debug patch, can remain running. The method can also deactivate the selected debug patch without requiring a restart. | 03-31-2016 |
20160094635 | SYSTEM AND METHOD FOR RULE-BASED ELASTICITY IN A MULTITENANT APPLICATION SERVER ENVIRONMENT - In accordance with an embodiment, described herein is a system and method rule-based elasticity support in an application server environment. The method can begin with providing, at one or more computers, including an application server environment executing thereon, a plurality of deployable resources which can be used within the application server environment, one or more partitions, an administration server, the administration server comprising a diagnostic framework, a rules framework, and an elastic service manager, and a dynamic cluster for use by the one or more partitions. The method can continue with monitoring, by the diagnostic framework, metrics associated with the one or more partition and the dynamic cluster. The method can then trigger, by the rules framework, the action based upon a comparison between one of the one or more rules and the monitored metrics associated with the one or more partitions and the dynamic cluster. | 03-31-2016 |
Patent application number | Description | Published |
20100286955 | SYSTEM AND METHOD FOR PREDICTING MAXIMUM COOLER AND RACK CAPACITIES IN A DATA CENTER - A system and method for evaluating equipment in a data center, the equipment including a plurality of equipment racks, and at least one cooling provider. In one aspect, a method includes receiving data regarding each of the plurality of equipment racks and the at least one cooling provider, the data including a layout of the equipment racks and the at least one cooling provider, a power draw value for each of the equipment racks, and a maximum cooler capacity value for the at least one cooling provider; storing the received data; determining cooling performance of at least one of the plurality of equipment racks based on the layout; determining a cooling load for the at least one cooler and a difference between the cooling load and the maximum cooler capacity value; for each equipment rack, determining a maximum rack capacity based on the layout and the difference between the cooling load and the maximum cooler capacity value; and displaying an indication of the maximum rack capacity for each equipment rack. | 11-11-2010 |
20100287018 | SYSTEM AND METHOD FOR ARRANGING EQUIPMENT IN A DATA CENTER - A system and method for providing a layout of equipment in a data center, the equipment including a plurality of equipment racks, and at least one rack-based cooling provider. In one aspect, the method includes receiving data regarding airflow consumption for each of the plurality of equipment racks and cooling capacity of the at least one cooling provider, storing the received data, determining a layout of the data center, displaying the layout of the data center. In the method determining a layout can include pairing each equipment rack of the plurality of equipment racks with another equipment rack of the plurality of equipment racks based on airflow consumption of each of the plurality of equipment racks to create a plurality of pairs of equipment racks, determining a combined airflow consumption value for each of the pairs of equipment racks, arranging the pairs of equipment racks to form a two-row cluster of equipment racks based on the combined airflow consumption value of the equipment racks, wherein each pair includes an equipment rack in a first row of the cluster and an equipment rack in a second row of the cluster, and determining a location of the at least one cooling provider in the cluster. | 11-11-2010 |
20120059628 | SYSTEM AND METHOD FOR EVALUATING EQUIPMENT RACK COOLING PERFORMANCE - Aspects of the invention are directed to systems and methods for designing and analyzing data centers. One aspect is directed to a method of determining cooling characteristics of a data center. The method includes receiving data related to a configuration of equipment in the data center, identifying rack clusters in the configuration of equipment, and determining a capture index for at least one equipment rack of at least one rack cluster. | 03-08-2012 |
20130046514 | SYSTEM AND METHOD FOR ARRANGING EQUIPMENT IN A DATA CENTER - A system and method for providing a layout of equipment in a data center, the equipment including a plurality of equipment racks, and at least one rack-based cooling provider. In one aspect, the method includes receiving data regarding airflow consumption for each of the plurality of equipment racks and cooling capacity of the at least one cooling provider, determining a layout of the data center, displaying the layout of the data center. In the method determining a layout can include pairing each equipment rack of the plurality of equipment racks with another equipment rack of the plurality of equipment racks based on airflow consumption of each of the plurality of equipment racks to create a plurality of pairs of equipment racks, arranging the pairs of equipment racks to form a two-row cluster of equipment racks based on the airflow consumption value of the equipment racks. | 02-21-2013 |
Patent application number | Description | Published |
20130204593 | Computational Fluid Dynamics Systems and Methods of Use Thereof - The present invention generally relates to systems and methods for evaluating and/or predicting thermodynamic behavior within a particular area, and more specifically, to systems and methods which, at least in some embodiments, use computational fluid dynamics to compute and/or predict thermodynamic behavior of data centers and the like. Embodiments of the present invention include the ability to validate the calibration of computational models in order to improve output accuracy. | 08-08-2013 |
20150066219 | THERMAL CAPACITY MANAGEMENT - Embodiment of the present invention generally relate to the field of thermal capacity management within data centers, and more specifically, to methods and systems which provide feedback based on thermal information associated with parts of a data center. In an embodiment, the present invention is a method comprising the steps of using temperature measurements and power meter readings to provide real-time capacity usage information in a given data center and to use that information to perform moves/adds/changes with a particular level of confidence. | 03-05-2015 |
20160073555 | Cooling Control for Data Centers with Cold Aisle Containment Systems - Embodiments of the present invention generally relate to the field of data center cooling and energy management. In an embodiment of the present invention, multiple PODs within a data center are controlled by a controller via active dampers. | 03-10-2016 |
Patent application number | Description | Published |
20100250750 | CONSISTENT CLUSTER OPERATIONAL DATA IN A SERVER CLUSTER USING A QUORUM OF REPLICAS - A method and system for increasing server cluster availability by requiring at a minimum only one node and a quorum replica set of replica members to form and operate a cluster. Replica members maintain cluster operational data. A cluster operates when one node possesses a majority of replica members, which ensures that any new or surviving cluster includes consistent cluster operational data via at least one replica member from the immediately prior cluster. Arbitration provides exclusive ownership by one node of the replica members, including at cluster formation, and when the owning node fails. Arbitration uses a fast mutual exclusion algorithm and a reservation mechanism to challenge for and defend the exclusive reservation of each member. A quorum replica set algorithm brings members online and offline with data consistency, including updating unreconciled replica members, and ensures consistent read and update operations. | 09-30-2010 |
20110238813 | CONSISTENT CLUSTER OPERATIONAL DATA IN A SERVER CLUSTER USING A QUORUM OF REPLICAS - A method and system for increasing server cluster availability by requiring at a minimum only one node and a quorum replica set of replica members to form and operate a cluster. Replica members maintain cluster operational data. A cluster operates when one node possesses a majority of replica members, which ensures that any new or surviving cluster includes consistent cluster operational data via at least one replica member from the immediately prior cluster. Arbitration provides exclusive ownership by one node of the replica members, including at cluster formation, and when the owning node fails. Arbitration uses a fast mutual exclusion algorithm and a reservation mechanism to challenge for and defend the exclusive reservation of each member. A quorum replica set algorithm brings members online and offline with data consistency, including updating unreconciled replica members, and ensures consistent read and update operations. | 09-29-2011 |
20110238842 | CONSISTENT CLUSTER OPERATIONAL DATA IN A SERVER CLUSTER USING A QUORUM OF REPLICAS - A method and system for increasing server cluster availability by requiring at a minimum only one node and a quorum replica set of replica members to form and operate a cluster. Replica members maintain cluster operational data. A cluster operates when one node possesses a majority of replica members, which ensures that any new or surviving cluster includes consistent cluster operational data via at least one replica member from the immediately prior cluster. Arbitration provides exclusive ownership by one node of the replica members, including at cluster formation, and when the owning node fails. Arbitration uses a fast mutual exclusion algorithm and a reservation mechanism to challenge for and defend the exclusive reservation of each member. A quorum replica set algorithm brings members online and offline with data consistency, including updating unreconciled replica members, and ensures consistent read and update operations. | 09-29-2011 |