Patent application number | Description | Published |
20120249914 | DISPLAY APPARATUS HAVING IMPROVED STATIC DISCHARGE CHARACTERISTICS - A display apparatus includes a first substrate including a plurality of pixels, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. Each pixel includes a gate electrode, a gate insulating layer, a semiconductor pattern, a source electrode, a drain electrode, a first electrode, and a second electrode. The first electrode includes a first portion overlapping the drain electrode and a second portion outside the first portion, and the second electrode does not overlap the first portion of the first electrode. The first electrode or the second electrode is formed as a single unitary structure. | 10-04-2012 |
20140009707 | DISPLAY APPARATUS HAVING IMPROVED STATIC DISCHARGE CHARACTERISTICS - A display apparatus includes a first substrate including a plurality of pixels, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. Each pixel includes a gate electrode, a gate insulating layer, a semiconductor pattern, a source electrode, a drain electrode, a first electrode, and a second electrode. The first electrode includes a first portion overlapping the drain electrode and a second portion outside the first portion, and the second electrode does not overlap the first portion of the first electrode. The first electrode or the second electrode is formed as a single unitary structure. | 01-09-2014 |
20150277176 | DISPLAY APPARATUS - A display apparatus includes a first substrate, a second substrate, a liquid crystal layer, and a spacer. The first substrate includes a gate line extending in a first direction, a data line extending in a second direction substantially perpendicular to the first direction, and a gate electrode branched from the gate line. The spacer is disposed on the second substrate and protrudes toward the first substrate and includes a first spacer and a second spacer with different heights that are connected to each other. The first spacer makes contact with the first substrate and the second substrate, and the second spacer makes contact with the second substrate and is spaced apart from the first substrate. | 10-01-2015 |
Patent application number | Description | Published |
20120199835 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - The present invention relates to a thin film transistor array panel and a manufacturing method thereof, and a thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a first conductive layer disposed on the substrate; a second conductive layer overlapping at least a portion of the edge of the first conductive layer on the first conductive layer and including a first portion overlapping the first conductive layer and a second portion not overlapping the first conductive layer; a first insulating layer disposed on the second conductive layer and having a contact hole exposing at least a portion of a boundary between the first portion and the second portion; and a third conductive layer disposed on the first insulating layer and simultaneously contacting the first portion and the second portion that are exposed through the contact hole. | 08-09-2012 |
20150194116 | DISPLAY PANEL, METHOD OF MANUFACTURING THE DISPLAY PANEL AND DISPLAY APPARATUS - A display panel includes a plurality of pixels disposed in an active area and arranged substantially in a matrix form including a pixel row and a pixel column, a first gate line disposed adjacent to a first side n of the pixel row and connected to a first pixel in the pixel row, a second gate line disposed adjacent to a second side of the pixel row and connected to a second pixel in the pixel row, a plurality of data lines crossing the first and second gate lines, where the pixels in a pair of adjacent pixel columns are connected to a same data line, and a blocking pattern which overlaps a pixel column disposed in an end portion of the active area. | 07-09-2015 |
20150195924 | DISPLAY PANEL AND DISPLAY APPARATUS HAVING THE SAME - A display panel includes a first substrate, a second substrate which faces the first substrate, is smaller than the first substrate so that an edge of the first substrate is exposed in a plan view, a fixing member disposed on the exposed edge of the first substrate, and a bonding member disposed between the first substrate and the fixing member. | 07-09-2015 |
20150268525 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a first substrate; a gate line and a common voltage line that are on the first substrate; a gate insulating layer on the gate line and the common voltage line; a semiconductor layer on the gate insulating layer; a data line and a drain electrode that are on the semiconductor layer; a pixel electrode on the data line and the drain electrode; a passivation layer on the pixel electrode; a common electrode on the passivation layer; a second substrate; and a liquid crystal layer interposed between the first and second substrates. The pixel electrode contacts the drain electrode via a first contact hole, the common electrode contacts the common voltage line via a second contact hole in the gate insulating layer and the passivation layer, and the first and second contact holes are adjacently disposed in a thin film transistor forming region. | 09-24-2015 |
Patent application number | Description | Published |
20100117670 | CONNECTING UNIT TO TEST SEMICONDUCTOR CHIPS AND APPARATUS TO TEST SEMICONDUCTOR CHIPS HAVING THE SAME - A connecting unit to test a semiconductor chip and an apparatus to test the semiconductor chip having the same include a plurality of connectors, on which a semiconductor chip having a certain pattern of electrical connection terminals, having a plurality of holes, cables configured to electrically connect the electrical connection terminals to the exterior, and coupling units configured to selectively electrically connect the cables to the electrical connection terminals through the holes. Therefore, it is possible to perform electrical tests of semiconductor chips having various patterns of electrical connection terminals and receive the semiconductor chips in a tray at a time. | 05-13-2010 |
20110004861 | METHOD OF DESIGNING A PRINTED CIRCUIT BOARD, AND PACKAGE TEST DEVICE HAVING THE PRINTED CIRCUIT BOARD - In a method of designing a printed circuit board, a package capacitance, a package inductance, and a chip capacitance of an actual memory device are calculated. A signal line capacitance and a signal line inductance per unit length of a signal line are calculated based on characteristics of the printed circuit board. A length of the signal line for each pin is determined based on the package capacitance and the signal line capacitance. | 01-06-2011 |
20120229158 | APPARATUS FOR TESTING A SEMICONDUCTOR DEVICE AND METHOD OF TESTING A SEMICONDUCTOR DEVICE - An apparatus for testing a semiconductor device includes a test socket, a test board, an ID reader, and an accumulator. The test socket comprises an ID information pattern and is configured to receive the semiconductor device. The test board is configured to detachably receive the test socket and electrically connect to the test socket. The ID reader is configured to read the ID information pattern and generate an ID signal corresponding to the test socket each time a semiconductor test is performed in the test socket. The accumulator is electrically connected to the ID reader and is configured to accumulate a plurality of ID signals, and store a test number equal to the number of times the test socket is used to perform the semiconductor test. The test number is based on the accumulated ID signals. | 09-13-2012 |
20130088250 | CONTACT APPARATUS AND SEMICONDUCTOR TEST EQUIPMENT USING THE SAME - A contact apparatus includes a pusher having first and second surfaces, the first surface being connected to a pressure unit, stoppers protruding from edges of the second surface of the pusher away from the pressure unit, a pusher block having first and second surfaces facing each other, the first surface facing the pusher, and the second surface being connected to a semiconductor device, coupling members connecting the pusher to the pusher block, and a connector disposed between the pusher and the pusher block, at least part of a surface of the connector being circular, and the circular surface making a point contact with the pusher or the pusher block. | 04-11-2013 |