# Samer Hijazi, Bethlehem US

## Samer Hijazi, Bethlehem, PA US

Patent application number | Description | Published |
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20090083352 | METHODS AND APPARATUS FOR PERFORMING REDUCED COMPLEXITY DISCRETE FOURIER TRANSFORMS USING INTERPOLATION - Methods and apparatus arc provided for performing reduced complexity discrete Fourier transforms using interpolation An input sequence of length N is transformed by extending the input sequence to an extended input sequence of length M, where M is greater than N (a power of two greater than N); performing a discrete Fourier Transform (DFT), such as a power-of-two DFT, on the extended input sequence to obtain an interpolated sequence; and applying a conversion matrix to the interpolated sequence to obtain a DFT output for the input sequence of length N. The input sequence of length N can be extended to an extended input sequence of length M, for example, by employing a zero padding technique, a cyclic extension technique, a windowing of a cyclic extended sequence technique or a resampling-based interpolation technique to extend the input sequence The conversion matrix is substantially a spar se matrix. | 03-26-2009 |

20100138463 | Digital Signal Processor Having Instruction Set With One Or More Non-Linear Functions Using Reduced Look-Up Table - A digital signal processor and method are disclosed having an instruction set with one or more non-linear functions using a look-up table of reduced size. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values for the non-linear function that are near the value, x, from at least one look-up table, wherein the at least one look-up table stores a subset of values for the non-linear function; and interpolating the two or more obtained values to obtain a result, y. The interpolation may comprise, for example, a linear interpolation or a polynomial interpolation. In a further variation, a modulo arithmetic operation can be employed for a periodic non-linear function. | 06-03-2010 |

20100138464 | Digital Signal Processor Having Instruction Set With One Or More Non-Linear Functions Using Reduced Look-Up Table With Exponentially Varying Step-Size - A digital signal processor and method are disclosed having an instruction set with one or more non-linear functions using a look-up table of reduced size and exponentially varying step-sizes. A digital signal processor evaluates a non-linear function for a value, x, by obtaining at least two values from at least one look-up table for the non-linear function that are near the value, x, wherein the at least one look-up table stores a subset of values for the non-linear function using exponentially-varying step sizes; and interpolating the at least two obtained values lo to obtain a result, y. A position of a leading zero in the value, x, can be used as an index into the at least one look-up table. The interpolation can comprise, for example, a linear interpolation or a polynomial interpolation. A modulo arithmetic operation can optionally be employed for a periodic non-linear function. | 06-03-2010 |

20100138465 | Digital Signal Processor With One Or More Non-Linear Functions Using Factorized Polynomial Interpolation - A digital signal processor and method are disclosed with one or more non-linear functions using factorized polynomial interpolation. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values from at least one look-up table for said non-linear function that are near said value, x; and interpolating said two or more obtained values to obtain a value, y, using a factorized polynomial interpolation. | 06-03-2010 |

20100138468 | Digital Signal Processor Having Instruction Set With One Or More Non-Linear Complex Functions - Methods and apparatus are provided for a digital signal processor having an instruction set with one or more non-linear complex functions. A method is provided for a processor. One or more non-linear complex software instructions are obtained from a program. The non-linear complex software instructions have at least one complex number as an input. One or more non-linear complex functions are applied from a predefined instruction set to the at least one complex number. An output is generated comprised of one complex number or two real numbers. A functional unit can implement the one or more non-linear complex functions. In one embodiment, a vector-based digital signal processor is disclosed that processes a complex vector comprised of a plurality of complex numbers. The processor can process the plurality of complex numbers in parallel. | 06-03-2010 |

20100198893 | Digital Signal Processor Having Instruction Set With An Xk Function Using Reduced Look-Up Table - A digital signal processor is provided having an instruction set with an x | 08-05-2010 |

20100198894 | Digital Signal Processor Having Instruction Set With An Exponential Function Using Reduced Look-Up Table - A digital signal processor is provided having an instruction set with an exponential function that uses a reduced look-up table. The disclosed digital signal processor evaluates an exponential function for an input value, x, by decomposing the input value, x, to an integer part, N, a first fractional part, q | 08-05-2010 |

20100198895 | Digital Signal Processor Having Instruction Set With A Logarithm Function Using Reduced Look-Up Table - A digital signal processor is provided having an instruction set with a logarithm function that uses a reduced look-up table. The disclosed digital signal processor evaluates a logarithm function for an input value, x, by decomposing the input value, x, to a first part, N, a second part, q, and a remaining part, r, wherein the first part, N, is identified by a position of a most significant bit of the input value, x, and the second part, q, is comprised of a number of bits following the most significant bit, wherein the number is small relative to a number of bits in the input value, x; obtaining a value | 08-05-2010 |

20100245136 | Methods and Apparatus for Whitening Quantization Noise in a Delta-Sigma Modulator Using Dither Signal - Methods and apparatus are provided for whitening quantization noise in a delta-sigma modulator using a dither signal. An input signal is quantized using a predictive delta-sigma modulator by quantizing the input signal using a quantizer; adding a dither signal at a first location of the predictive delta-sigma modulator; determining a quantization error associated with the quantizer; removing the dither signal at a second location of the predictive delta-sigma modulator (for example, by subtracting a substantially similar version of the dither signal at the second location); generating an error prediction value using an error predictive filter; and subtracting the error prediction value from the input signal. The dither signal may be a white noise signal and may optionally be generated using a pseudo-random number generator. | 09-30-2010 |

20100245137 | Methods and Apparatus for Look-Ahead Block Processing in Predictive Delta-Sigma Modulators - Methods and apparatus are provided for look-ahead block processing in predictive delta-sigma modulators. An input signal is quantized using a predictive delta-sigma modulator by generating error prediction values for a current block of input values based on a linear combination of error prediction values from one or more previous blocks, input values of one or more previous blocks, quantized values of one or more previous blocks and the current block of input values; computing speculative error prediction values for at least one input value in the current block, wherein the speculative error prediction values are computed for a plurality of possible quantizer output values; selecting one of the speculative error prediction values based on a quantized value from the current block; and subtracting the error prediction values for the current block from the corresponding current block of input values. | 09-30-2010 |

20100245138 | METHODS AND APPARATUS FOR DECORRELATING QUANTIZATION NOISE IN A DELTA-SIGMA MODULATOR - Methods and apparatus are provided for decorrelating quantization noise in a delta-sigma modulator. An input signal is quantized using a predictive delta-sigma modulator, by quantizing the input signal using a quantizer; determining a quantization error associated with the quantizer by subtracting an input to the quantizer from an output of the quantizer; measuring a correlation coefficient between the quantization error and an input to the quantizer; reducing the measured correlation by subtracting a multiple of the input to the quantizer from the quantization error, wherein the multiple is based on the correlation coefficient; generating an error prediction value using an error predictive filter; and subtracting the error prediction value from the input signal. | 09-30-2010 |

20100304687 | METHODS AND APPARATUS FOR SIMULTANEOUS ESTIMATION OF FREQUENCY OFFSET AND CHANNEL RESPONSE FOR MU-MIMO OFDMA - Methods and apparatus are provided for simultaneous estimation of frequency offset and channel response for a communication system, such as a MU-MIMO communication system. An iterative method is provided for estimating frequency offset and channel response for a plurality of frequency resources. The channel response is estimated for a set of users sharing a given one of the frequency resources. In addition, the frequency offset is estimated for the users in the set, wherein the channel response and frequency offset of users not in the set are maintained at their latest updated values. Initially, the channel response of a user can be an ideal channel response and the frequency offset can be approximately zero. | 12-02-2010 |

20110051867 | METHODS AND APPARATUS FOR WIRELESS CHANNEL ESTIMATION USING INTERPOLATION ELIMINATION IN THE EIGEN DOMAIN - Methods and apparatus are provided for wireless channel estimation using interpolation elimination in the Eigen domain. Channel components at known OFDM symbol locations are interpolated to other OFDM symbol locations. Methods and apparatus are provided for interpolating in the Eigen domain between reference signals (i.e., training signals) to estimate the equalizer coefficients with a reduced complexity. In particular, one aspect of the present invention performs the required interpolation before a required matrix inversion in the Eigen domain. | 03-03-2011 |

20110310944 | LONG TERM EVOLUTION (LTE) UPLINK CANONICAL CHANNEL ESTIMATION - A method and system for canonical channel estimation in the Long Term Evolution uplink where a multi-frequency signal is generated and then converted to frequency spectrum which is then convolved in the frequency domain with a truncated window function to obtain a time domain channel impulse response. The time domain channel impulse response can be then transformed to a frequency domain to produce a down sampled user channel response, which can be then linearly interpolated to provide a channel estimate for a plurality of subcarriers. Such an approach achieves channel estimation within Long Term Evolution at only canonical locations to reduce complexity without loss in channel entropy. | 12-22-2011 |

20130080855 | METHODS AND APPARATUS FOR SEARCH SPHERE LINEAR BLOCK DECODING - A search sphere-based linear block decoder is provided. A received vector, v, is decoded by computing a syndrome vector, S, corresponding to the received vector, v; (S=vH); obtaining a set of all possible error vectors, e, corresponding to the computed syndrome vector, S, wherein the set of all possible error vectors, e, is obtained from a pre-computed error table and has a specified maximum number of bit errors; calculating a set of all possible received vectors, x, based on the received vector, v, and the set of all possible error vectors, e; determining a k-bit code-vector x that is closest to the received vector, v; and determining an n-bit data-vector, d, associated with the k-bit code-vector x. The pre-computed error table can be generated by multiplying all possible error vectors by a Syndrome Matrix, to obtain all possible syndrome vectors associated with all possible error vectors. | 03-28-2013 |