Patent application number | Description | Published |
20110010434 | STORAGE SYSTEM - A pseudo peer-to-peer network system including several clients, each adapted to execute a path driver program. A path driver program is provided, including the steps of locating storage peers connected to the network via a network interface for storing or accessing data items provided in memories of storage peers by means of a global address table. The global address table is updated periodically by at least one configuration server of the pseudo peer-to-peer network. The network further includes at least one time server, which generates a global time clock to which local time clocks of all storage peers of the pseudo peer-to-peer network are synchronized such that a global address table updated by the configuration server is activated by all storage peers at the same scheduled time to be consistent throughout the pseudo peer-to-peer network at all times. | 01-13-2011 |
20110029715 | WRITE-ERASE ENDURANCE LIFETIME OF MEMORY STORAGE DEVICES - A memory management system and method for managing memory blocks of a memory device of a computer. The system includes a free block data structure including free memory blocks for writing, and sorting the free memory blocks in a predetermined order based on block write-erase endurance cycle count and receiving new user-write requests to update existing data and relocation write requests to relocate existing data separately, a user-write block pool for receiving youngest blocks holding user-write data (i.e., any page being updated frequently) from the free block data structure, a relocation block pool for receiving oldest blocks holding relocation data (i.e., any page being updated infrequently) from the free block data structure, and a garbage collection pool structure for selecting at least one of user-write blocks and relocation blocks for garbage collection, wherein the selected block is moved back to the free block data structure upon being relocated and erased. | 02-03-2011 |
20110131369 | LOGIC DEVICE - A logic device for communicating with a memory package with a first protocol, communicating with a memory controller with a second protocol, and for performing a protocol conversion between the first and the second protocol. | 06-02-2011 |
20110131472 | SOLID-STATE STORAGE SYSTEM WITH PARALLEL ACCESS OF MULTIPLE FLASH/PCM DEVICES - Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate. | 06-02-2011 |
20110145475 | REDUCING ACCESS CONTENTION IN FLASH-BASED MEMORY SYSTEMS - Exemplary embodiments include a method for reducing access contention in a flash-based memory system, the method including selecting a chip stripe in a free state, from a memory device having a plurality of channels and a plurality of memory blocks, wherein the chip stripe includes a plurality of pages, setting the ship stripe to a write state, setting a write queue head in each of the plurality of channels, for each of the plurality of channels in the flash stripe, setting a write queue head to a first free page in a chip belonging to the channel from the chip stripe, allocating write requests according to a write allocation scheduler among the channels, generating a page write and in response to the page write, incrementing the write queue head, and setting the chip stripe into an on-line state when it is full. | 06-16-2011 |
20110202708 | Integrating A Flash Cache Into Large Storage Systems - An I/O enclosure module is provided with one or more I/O enclosures having a plurality of slots for receiving electronic devices. A host adapter is connected a first slot of the I/O enclosure module and is configured to connect a host to the I/O enclosure. A device adapter is connected to a second slot of the I/O enclosure module and is configured to connect a storage device to the I/O enclosure module. A flash cache is connected to a third slot of the I/O enclosure module and includes a flash-based memory configured to cache data associated with data requests handled through the I/O enclosure module. A primary processor complex manages data requests handled through the I/O enclosure module by communicating with the host adapter, device adapter, and flash cache to manage to the data requests. | 08-18-2011 |
20110296085 | CACHE MEMORY MANAGEMENT IN A FLASH CACHE ARCHITECTURE - Provided are a system, method, and computer program product for managing cache memory to cache data units in at least one storage device. A cache controller is coupled to at least two flash bricks, each comprising a flash memory. Metadata indicates a mapping of the data units to the flash bricks caching the data units, wherein the metadata is used to determine the flash bricks on which the cache controller caches received data units. The metadata is updated to indicate the flash brick having the flash memory on which data units are cached. | 12-01-2011 |
20120166749 | DATA MANAGEMENT IN SOLID-STATE STORAGE DEVICES AND TIERED STORAGE SYSTEMS - A method for managing data in a data storage system having a solid-state storage device and alternative storage includes identifying data to be moved in the solid-state storage device for internal management of the solid-state storage; moving at least some of the identified data to the alternative storage instead of the solid-state storage; and maintaining metadata indicating the location of data in the solid-state storage device and the alternative storage. | 06-28-2012 |
20120179918 | METHOD AND A SYSTEM FOR PROVIDING A DEPLOYMENT LIFECYCLE MANAGEMENT OF CRYPTOGRAPHIC OBJECTS - A system and a method for cryptographic objects (CO) deployment life-cycle management comprising: at least one execution unit ( | 07-12-2012 |
20120260150 | DATA MANAGEMENT IN SOLID STATE STORAGE SYSTEMS - Methods and apparatus are provided for controlling data management operations including storage of data in solid state storage of a solid state storage system. Input data is stored in successive groups of data write locations in the solid state storage. Each group comprises a set of write locations in each of a plurality of logical subdivisions of the solid state storage. The input data to be stored in each group is encoded in accordance with first and second linear error correction codes. The encoding is performed by constructing from the input data to be stored in each group a logical array of rows and columns of data symbols. The rows and columns are respectively encoded in accordance with the first and second linear error correction codes to produce an encoded array in which all rows correspond to respective first codewords and columns correspond to respective second codewords. | 10-11-2012 |
20120266050 | Data Management in Solid State Storage Devices - A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory, An indication of validity of data stored in each data write location is also maintained, Prior to erasing a block, valid input data is recovered from the or each said group containing write locations in that block. The recovered data is then re-stored as new input data. | 10-18-2012 |
20120278544 | FLASH MEMORY CONTROLLER - A Flash memory controller is coupled to a first Flash memory package through a first Flash memory interface and to a second Flash memory package through the first Flash memory interface. The Flash memory controller is designed to receive a first instruction relating to the first Flash memory package and to perform a first process depending on the first instruction. The Flash memory controller is further designed to receive a second instruction relating to the second Flash memory package and to perform a second process depending on the second instruction. The Flash memory controller is further adapted for splitting the first process into at least two first sub-steps and for splitting the second process into at least two second sub-steps. The Flash memory controller is further adapted for executing the first and second sub-steps, and for interleaving execution of first and second sub-steps. | 11-01-2012 |
20120290779 | DATA MANAGEMENT IN SOLID-STATE STORAGE DEVICES AND TIERED STORAGE SYSTEMS - A method for managing data in a data storage system having a solid-state storage device and alternative storage includes identifying data to be moved in the solid-state storage device for internal management of the solid-state storage; moving at least some of the identified data to the alternative storage instead of the solid-state storage; and maintaining metadata indicating the location of data in the solid-state storage device and the alternative storage. | 11-15-2012 |
20120297128 | REDUCING ACCESS CONTENTION IN FLASH-BASED MEMORY SYSTEMS - Exemplary embodiments include a method for reducing access contention in a flash-based memory system, the method including selecting a chip stripe in a free state, from a memory device having a plurality of channels and a plurality of memory blocks, wherein the chip stripe includes a plurality of pages, setting the ship stripe to a write state, setting a write queue head in each of the plurality of channels, for each of the plurality of channels in the flash stripe, setting a write queue head to a first free page in a chip belonging to the channel from the chip stripe, allocating write requests according to a write allocation scheduler among the channels, generating a page write and in response to the page write, incrementing the write queue head, and setting the chip stripe into an on-line state when it is full. | 11-22-2012 |
20120303919 | WRITE-ERASE ENDURANCE LIFETIME OF MEMORY STORAGE DEVICES - A memory management system and method for managing memory blocks of a memory device of a computer. The system includes a free block data structure including free memory blocks for writing, and sorting the free memory blocks in a predetermined order based on block write-erase endurance cycle count and receiving new user-write requests to update existing data and relocation write requests to relocate existing data separately, a user-write block pool for receiving youngest blocks holding user-write data (i.e., any page being updated frequently) from the free block data structure, a relocation block pool for receiving oldest blocks holding relocation data (i.e., any page being updated infrequently) from the free block data structure, and a garbage collection pool structure for selecting at least one of user-write blocks and relocation blocks for garbage collection, wherein the selected block is moved back to the free block data structure upon being relocated and erased. | 11-29-2012 |
20130013980 | Data Management in Solid State Storage Devices - A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory. An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the or each said group containing write locations in that block. The recovered data is then re-stored as new input data. | 01-10-2013 |
20130046930 | OPTIMIZING LOCATIONS OF DATA ACCESSED BY CLIENT APPLICATIONS INTERACTING WITH A STORAGE SYSTEM - A method for optimizing locations of physical data accessed by one or more client applications interacting with a storage system, with the storage system comprising at least two redundancy groups having physical memory spaces and data bands. Each of the data bands corresponds to physical data stored on several of the physical memory spaces. A virtualized logical address space includes client data addresses utilizable by the one or more client applications. A storage controller is configured to map the client data addresses onto the data bands, such that a mapping is obtained, wherein the one or more client applications can access physical data corresponding to the data bands. | 02-21-2013 |
20130046931 | OPTIMIZING LOCATIONS OF DATA ACCESSED BY CLIENT APPLICATIONS INTERACTING WITH A STORAGE SYSTEM - A method for optimizing locations of physical data accessed by one or more client applications interacting with a storage system, with the storage system comprising at least two redundancy groups having physical memory spaces and data bands. Each of the data bands corresponds to physical data stored on several of the physical memory spaces. A virtualized logical address space includes client data addresses utilizable by the one or more client applications. A storage controller is configured to map the client data addresses onto the data bands, such that a mapping is obtained, wherein the one or more client applications can access physical data corresponding to the data bands. | 02-21-2013 |
20130124794 | LOGICAL TO PHYSICAL ADDRESS MAPPING IN STORAGE SYSTEMS COMPRISING SOLID STATE MEMORY DEVICES - The present idea provides a high read and write performance from/to a solid state memory device. The main memory of the controller is not blocked by a complete address mapping table covering the entire memory device. Instead such table is stored in the memory device itself, and only selected portions of address mapping information are buffered in the main memory in a read cache and a write cache. A separation of the read cache from the write cache enables an address mapping entry being evictable from the read cache without the need to update the related flash memory page storing such entry in the flash memory device. By this design, the read cache may advantageously be stored on a DRAM even without power down protection, while the write cache may preferably be implemented in nonvolatile or other fail-safe memory. This leads to a reduction of the overall provisioning of nonvolatile or fail-safe memory and to an improved scalability and performance. | 05-16-2013 |
20130145089 | CACHE MEMORY MANAGEMENT IN A FLASH CACHE ARCHITECTURE - Provided is a method for managing cache memory to cache data units in at least one storage device. A cache controller is coupled to at least two flash bricks, each comprising a flash memory. Metadata indicates a mapping of the data units to the flash bricks caching the data units, wherein the metadata is used to determine the flash bricks on which the cache controller caches received data units. The metadata is updated to indicate the flash brick having the flash memory on which data units are cached. | 06-06-2013 |
20130166827 | WEAR-LEVEL OF CELLS/PAGES/SUB-PAGES/BLOCKS OF A MEMORY - The invention is directed to a method for wear-leveling cells or pages or sub-pages or blocks of a memory such as a flash memory, the method comprising:—receiving (S | 06-27-2013 |
20130346538 | MANAGING CACHE MEMORIES - A method for managing cache memories includes providing a computerized system including a shared data storage system (CS) configured to interact with several local servers that serve applications using respective cache memories, and access data stored in the shared data storage system; providing cache data information from each of the local servers to the shared data storage system, the cache data information comprising cache hit data representative of cache hits of each of the local servers, and cache miss data representative of cache misses of each of the local servers; aggregating, at the shared data storage system, at least part of the cache hit and miss data received and providing the aggregated cache data information to one or more of the local servers; and at the local servers, updating respective one or more cache memories used to serve respective one or more applications based on the aggregated cache data information. | 12-26-2013 |
20140006802 | ORDERED DELETION OF CONTENT IN STORAGE SYSTEMS | 01-02-2014 |
20140330817 | TAPE DRIVE SYSTEM SERVER - A tape drive system server includes a non-volatile memory used as a cache memory for storing data files, at least part of the cache memory comprising a first region managed using a First In First Out policy management and a second region managed using a Least Recently Used policy management; a file system interface for interacting with data files stored on a tape drive system; an interface for allowing one or more remote systems reading and writing data stored on the cache memory; the server configured to: receive from the one or more remote systems one or more write requests for writing one or more data files; interpret attributes associated to data files instructed to be written by the one or more remote systems; and store data files instructed to be written by the remote systems according to the interpreted attributes. | 11-06-2014 |
20150052413 | DECODING OF LDPC CODE - It is provided a method for decoding a sequence of bits encoded by a LPDC code. The method comprises providing a set of bit states, including a first state and a second state, and a set of conditions to change a bit state including a first condition 5 and a second condition. The first condition and the second condition are different. The method comprises reading the value of each bit of the sequence, associating each bit to a respective state of the set according to the values as read, determining that an evaluated condition is met and changing the state of the target bit as a result of the condition being met. The method may then set the value of the target bit of the 10 sequence according to the state thereof. Such a method provides a solution for decoding a sequence of bits encoded by a LDPC code with better performance than the classic bit-flipping algorithm with only a slight increase in complexity. | 02-19-2015 |
20150074343 | LOGIC DEVICE - A logic device for communicating with a memory package with a first protocol, communicating with a memory controller with a second protocol, and for performing a protocol conversion between the first and the second protocol. | 03-12-2015 |
Patent application number | Description | Published |
20110022931 | MEMORY MANAGEMENT IN A NON-VOLATILE SOLID STATE MEMORY DEVICE - A computer-implemented method of managing a memory of a non-volatile solid state memory device by balancing write/erase cycles among blocks to level block usage. The method includes: monitoring an occurrence of an error during a read operation in a memory unit of the device, wherein the error is correctable by error-correcting code; and programming the memory unit according to the monitored occurrence of the error; wherein the step of monitoring the occurrence of an error is carried out for at least one block; and wherein said step of programming comprises wear-leveling the monitored block according the error monitored for the monitored block. A computer system and a computer program-product is also provided. | 01-27-2011 |
20120110247 | MANAGEMENT OF CACHE MEMORY IN A FLASH CACHE ARCHITECTURE - A method for managing cache memory in a flash cache architecture. The method includes providing a storage cache controller, at least a flash memory comprising a flash controller, and at least a backend storage device, and maintaining read cache metadata for tracking on the flash memory cached data to be read, and write cache metadata for tracking on the flash memory data expected to be cached. | 05-03-2012 |
20120131381 | Operating a Data Storage System - A data storage system including at least one memory device array including memory devices for storing data; and a storage subsystem controller for performing a method for operating the memory devices within the memory device array by relocating parity entities from a first memory device to a spare memory device replacing a failed memory device, and by storing one or more of reconstructed data entities on the first memory device. | 05-24-2012 |
20120284231 | DISTRIBUTED, ASYNCHRONOUS AND FAULT-TOLERANT STORAGE SYSTEM - Methods and systems for reading from and writing to a distributed, asynchronous and fault-tolerant storage system. The storage system includes storage nodes communicating with clients. The method includes a first client writing an object to the storage system and a second client reading the object from the storage system. For the first client, previous transient metadata relating to a previously written version of the object is retrieved and a new version of the object together with new transient metadata is stored. For the second client, a set of transient metadata from a third set of nodes amongst storage nodes is retrieved, a specific version of the object as stored on the storage system is determined, and a specific version of the corresponding object from a fourth set of nodes amongst storage nodes is retrieved. Two sets of nodes amongst all sets have at least one node in common. | 11-08-2012 |
20120323851 | DISTRIBUTED, ASYNCHRONOUS AND FAULT-TOLERANT STORAGE SYSTEM - Methods and systems for reading from and writing to a distributed, asynchronous and fault-tolerant storage system. The storage system includes storage nodes communicating with clients. The method includes a first client writing an object to the storage system and a second client reading the object from the storage system. For the first client, previous transient metadata relating to a previously written version of the object is retrieved and a new version of the object together with new transient metadata is stored. For the second client, a set of transient metadata from a third set of nodes amongst storage nodes is retrieved, a specific version of the object as stored on the storage system is determined, and a specific version of the corresponding object from a fourth set of nodes amongst storage nodes is retrieved. Two sets of nodes amongst all sets have at least one node in common. | 12-20-2012 |
20130117600 | MEMORY MANAGEMENT IN A NON-VOLATILE SOLID STATE MEMORY DEVICE - A computer-implemented method of managing a memory of a non-volatile solid state memory device by balancing write/erase cycles among blocks to level block usage. The method includes monitoring an occurrence of an error during a read operation in a memory unit of the device, where the error is correctable by error-correcting code, and programming the memory unit according to the monitored occurrence of the error, where the step of monitoring the occurrence of an error is carried out for at least one block, and wherein said step of programming includes wear-leveling the monitored block according the error monitored for the monitored block. | 05-09-2013 |
20130138912 | SCHEDULING REQUESTS IN A SOLID STATE MEMORY DEVICE - An apparatus and method for a memory controller for managing scheduling requests in a solid state memory device. The memory includes a set of units wherein a unit within the set of units is erasable as a whole by a unit reclaiming process resulting in a free unit available for writing data to. The memory controller further includes a first queue for queuing user requests for reading and/or writing data from/to the memory, and a second queue for queuing unit reclaiming requests for executing the unit reclaiming process. A scheduler is provided for selecting user requests from the first queue and unit reclaiming requests from the second queue for execution according to a defined ratio. The defined ratio is a variable ratio, is dependent on the current number of free units, and permits the memory controller to select requests from both the first queue and the second queue. | 05-30-2013 |
20130159609 | PROCESSING UNIT RECLAIMING REQUESTS IN A SOLID STATE MEMORY DEVICE - An apparatus and method for processing unit reclaiming requests in a solid state memory device. The present invention provides a method of managing a memory which includes a set of units. The method includes selecting a unit from the set of units having plurality of subunits. The method further includes determining a number of valid subunits m to be relocated from the units selected for a batch operation where m is at least 2. The selecting is carried out by a unit reclaiming process. | 06-20-2013 |
20130191704 | MEMORY MANAGEMENT IN A NON-VOLATILE SOLID STATE MEMORY DEVICE - A non-volatile solid state memory device and method for balancing write/erase cycles among blocks to level block usage. The non-volatile solid state memory device includes a memory unit having data stored therein and a controller with logic for programming the memory unit according to a monitored occurrence of an error during a read operation. The method includes monitoring an occurrence of an error during a read operation in a memory unit of the device and programming the memory unit according to the monitored occurrence of the error. | 07-25-2013 |
Patent application number | Description | Published |
20090055681 | INTRA-DISK CODING SCHEME FOR DATA-STORAGE SYSTEMS - Exemplary embodiments of the present invention comprise a method for the use of an intra-disk redundancy storage protection operation for the scrubbing of a disk. The method comprises initiating a disk scrubbing operation upon each disk of a plurality of disks that are comprised within a storage disk array, issuing a disk scrubbing command for a predetermined segment of the disks that are comprised within the storage disk array at a predetermined time interval, and identifying an unrecoverable segment on a disk. The method further comprises determining if unrecoverable sectors comprised within the unrecoverable segment can be reconstructed, and reconstructing the unrecoverable sectors of the unrecoverable segment and relocating the segment to a spare storage location on the disk in the event that the segment cannot be reconstructed within its original storage location. | 02-26-2009 |
20090222924 | OPERATING A NETWORK MONITORING ENTITY - Network flow records from various administrative domains are provided to a network monitoring entity. The network monitoring entity analyzes the network flow records in a way to locate a source of malicious network flow. | 09-03-2009 |
20090245519 | RENEWAL MANAGEMENT FOR DATA ITEMS - A system, method apparatus, and computer readable medium for managing renewal of a dynamic set of data items. Each data item has an associated renewal deadline, in a data item management system. A renewal schedule allocates to each data item a renewal interval for renewal of the data item. On addition of a new data item, if a potential renewal interval having a duration required for renewal of the data item, and having an ending at the renewal deadline for that item does not overlap a time period in the schedule during which the system is busy, the renewal schedule is automatically updated by allocating the potential renewal interval to the new data item. If the potential renewal interval does overlap a busy period, the renewal schedule is automatically updated by selecting an earlier renewal interval for at least one data item in the set. | 10-01-2009 |
20090316907 | SYSTEM AND METHOD FOR AUTOMATED VALIDATION AND EXECUTION OF CRYPTOGRAPHIC KEY AND CERTIFICATE DEPLOYMENT AND DISTRIBUTION - A method for automated validation and execution of cryptographic key and certificate deployment and distribution includes providing one or more keys; providing one or more key deployment points; and distributing the one or more keys to the one or more key deployment points in an automated manner based on a matrix or pattern mapping of each of the one or more keys to be distributed to each of the one or more key deployment points. | 12-24-2009 |
20100185922 | HAMMING RADIUS SEPARATED DEDUPLICATION LINKS - A method of de-duplicating duplicate data in a data storage system that includes identifying a plurality of portions of data, comparing each portion of the data to identify duplicate data and identifying a link associated with each duplicate data, determining whether a Hamming link-separation-distance between the identified link and all other existing links is greater than twice the Hamming radius of an error correction code in the data storage system, and then replacing the duplicate data with the identified link. | 07-22-2010 |
20110246821 | RELIABILITY SCHEME USING HYBRID SSD/HDD REPLICATION WITH LOG STRUCTURED MANAGEMENT - In one embodiment, a method of storing data includes storing a first copy of data in a solid state memory and storing a second copy of the data in a hard disk drive memory substantially simultaneously with the storing the first copy. In another embodiment, a system for storing data includes a solid state memory, at least one hard disk drive memory, and a controller for controlling storage of data in the solid state memory and the hard disk drive memory. Other methods, systems, and computer program products are also described according to various embodiments. | 10-06-2011 |
20120210192 | HAMMING RADIUS SEPARATED DEDUPLICATION LINKS - A data storage system includes a data storage array configured for de-duplication of duplicate data therein by: identification of a plurality of portions of data; a comparison of each portion of the data to identify duplicate data and identification of a link associated with each duplicate data; a determination of whether a Hamming link-separation-distance of the identified link is greater than twice a Hamming radius of an error correction code in the data storage system; and replacement of the duplicate data with the identified link when it is determined that the Hamming link-separation-distance is greater than twice the Hamming radius. | 08-16-2012 |
20130111106 | PROMOTION OF PARTIAL DATA SEGMENTS IN FLASH CACHE | 05-02-2013 |
20130111131 | DYNAMICALLY ADJUSTED THRESHOLD FOR POPULATION OF SECONDARY CACHE | 05-02-2013 |
20130111133 | DYNAMICALLY ADJUSTED THRESHOLD FOR POPULATION OF SECONDARY CACHE | 05-02-2013 |
20130111134 | MANAGEMENT OF PARTIAL DATA SEGMENTS IN DUAL CACHE SYSTEMS | 05-02-2013 |
20130111146 | SELECTIVE POPULATION OF SECONDARY CACHE EMPLOYING HEAT METRICS | 05-02-2013 |
20130111160 | SELECTIVE SPACE RECLAMATION OF DATA STORAGE MEMORY EMPLOYING HEAT AND RELOCATION METRICS | 05-02-2013 |
20130185512 | MANAGEMENT OF PARTIAL DATA SEGMENTS IN DUAL CACHE SYSTEMS - For movement of partial data segments within a computing storage environment having lower and higher levels of cache by a processor, a whole data segment containing one of the partial data segments is promoted to both the lower and higher levels of cache. Requested data of the whole data segment is split and positioned at a Most Recently Used (MRU) portion of a demotion queue of the higher level of cache. Unrequested data of the whole data segment is split and positioned at a Least Recently Used (LRU) portion of the demotion queue of the higher level of cache. The unrequested data is pinned in place until a write of the whole data segment to the lower level of cache completes. | 07-18-2013 |
20130205077 | PROMOTION OF PARTIAL DATA SEGMENTS IN FLASH CACHE - For efficient track destage in secondary storage in a more effective manner, for temporal bits employed with sequential bits for controlling the timing for destaging the track in a primary storage, the temporal bits and sequential bits are transferred from the primary storage to the secondary storage. The temporal bits are allowed to age on the secondary storage. | 08-08-2013 |
20130232294 | ADAPTIVE CACHE PROMOTIONS IN A TWO LEVEL CACHING SYSTEM - Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache. | 09-05-2013 |
20130232295 | ADAPTIVE CACHE PROMOTIONS IN A TWO LEVEL CACHING SYSTEM - Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache. | 09-05-2013 |
20140181383 | RELIABILITY SCHEME USING HYBRID SSD/HDD REPLICATION WITH LOG STRUCTURED MANAGEMENT - In one embodiment, a method of managing data includes managing a first copy of data in a solid state memory using a controller of the solid state memory, and managing a second copy of the data in a hard disk drive memory using the controller. In another embodiment, a system for storing data includes a solid state memory, at least one hard disk drive memory, and a controller for controlling storage of data in both the solid state memory and the hard disk drive memory. Other methods, systems, and computer program products are also described according to various embodiments. | 06-26-2014 |
20140201448 | MANAGEMENT OF PARTIAL DATA SEGMENTS IN DUAL CACHE SYSTEMS - For movement of partial data segments within a computing storage environment having lower and higher levels of cache by a processor, a whole data segment containing one of the partial data segments is promoted to both the lower and higher levels of cache. Requested data of the whole data segment is split and positioned at a Most Recently Used (MRU) portion of a demotion queue of the higher level of cache. | 07-17-2014 |
20140359309 | DELETION OF CONTENT IN STORAGE SYSTEMS - The invention notably relates to a computerized system ( | 12-04-2014 |