Patent application number | Description | Published |
20150155494 | ORGANIC ELECTRONIC DEVICE COMPRISING AN ORGANIC SEMICONDUCTORS FORMULATION - The invention generally relates to organic semiconductor formulations for use in organic semiconductor layers of organic electronic devices, and more specifically in organic field effect transistors, to organic semiconductor layers prepared from such formulations, and to organic electronic devices and organic field effect transistors encompassing such organic semiconductor layers. | 06-04-2015 |
20150243914 | ORGANIC SEMICONDUCTOR FORMULATIONS - Embodiments in accordance with the present invention relate generally to formulations for use in organic semiconductor layers of organic electronic devices, and more specifically in organic field effect transistors, to organic semiconductor layers prepared from such formulations, and to organic electronic devices and organic field effect transistors encompassing such organic semiconductor layers. | 08-27-2015 |
20150270318 | METHOD FOR PRODUCING ORGANIC ELECTRONIC DEVICES WITH BANK STRUCTURES, BANK STRUCTURES AND ELECTRONIC DEVICES PRODUCED THEREWITH - The present invention relates to a process for producing an organic electronic device, wherein a layer is selectively swelled with a swelling solvent so as to form bank structures allowing the deposition of the semiconductor material in a specific and well-defined area. The present invention further relates to bank structures, organic electronic devices and products or assemblies produced by said process. | 09-24-2015 |
Patent application number | Description | Published |
20110225527 | CONFIGURABLE HIGHLIGHTS PANEL FOR DISPLAY OF DATABASE RECORDS - Systems and methods for configuring a UI display layout for displaying record fields in a multi-tenant on-demand database service. A data record is initially displayed on a first portion of a user interface display, and an identification of a set of one or more fields of the data record is received, e.g., from a user. A selection of a display configuration for the set of identified fields is also received, e.g., from a user. The display configuration may include one or more columns, each column having one or more rows, wherein the display configuration identifies, for each of the set of fields, in which column and row the field is to be displayed. Data for the set of fields based on the selected display configuration is then displayed on a second portion of the user interface display which may include a collapsible display panel. | 09-15-2011 |
20110296336 | SIDE TAB NAVIGATION AND PAGE VIEWS PERSONALIZATION SYSTEMS AND METHODS - Systems and methods for displaying tab elements representing viewable page elements. A set of one or more main tabs are displayed on a first portion of a display, each main tab defining a link to a database object stored in a database. A user selection of a first one of the main tabs is received (e.g., to determine which tab provides default display), and two or more side tabs are displayed in a first, default order on a second portion of the display, each said side tab defining a link to an element or portion of a first object. In certain aspects, a user selection of a new order for the two or more side tabs is received, and thereafter the two or more side tabs are displayed in the new order, and the new order is stored to the database, wherein upon later access of the first object by the user, the two or more side tabs are automatically displayed in the new order. | 12-01-2011 |
20140237414 | TAB NAVIGATION AND PAGE VIEW PERSONALIZATION - In some implementations, a system causes a set of main tabs to be displayed at a first portion of a display. The system is configured to receive a user selection of a selected main tab. In response, the system causes a set of secondary tabs to be displayed at a second portion of the display. The system is configured to receive user input to manipulate the secondary tabs causing a rearrangement of the secondary tabs into a new order and/or causing one or more of the secondary tabs to be hidden. Based on the user input, the system causes the manipulated set of secondary tabs to be displayed and stores information defining the manipulated set of secondary tabs. Upon a subsequent access by the user of a database object associated with the selected main tab, the system causes the manipulated set of secondary tabs to be displayed. | 08-21-2014 |
Patent application number | Description | Published |
20130323690 | PROVIDING AN UNINTERRUPTED READING EXPERIENCE - An uninterrupted reading experience can be provided by calculating a vocabulary level for a user in a first language and comparing difficulty levels of words within a document in the first language to the vocabulary level of the user in the first language. Each word of the document having a difficulty level that exceeds the vocabulary level of the user in the first language can be selected. | 12-05-2013 |
20130323693 | PROVIDING AN UNINTERRUPTED READING EXPERIENCE - An uninterrupted reading experience can be provided by calculating a vocabulary level for a user in a first language and comparing difficulty levels of words within a document in the first language to the vocabulary level of the user in the first language. Each word of the document having a difficulty level that exceeds the vocabulary level of the user in the first language can be selected. | 12-05-2013 |
20140052842 | MEASURING PROBLEMS FROM SOCIAL MEDIA DISCUSSIONS - Embodiments of the present invention provide a system, method, and program product to measure problems from a social media discussion. In exemplary embodiments, a computer extracts one or more problems from the social media discussion. The computer extracts one or more severity indicators and one or more complexity indicators from the social media discussion. The computer clusters the one or more problems into one or more sets of unique problems in a manner that related problems are clustered together into the one or more unique problems. The computer determines an overall severity and an overall complexity of the sets of unique problems. | 02-20-2014 |
20140289229 | USING CONTENT FOUND IN ONLINE DISCUSSION SOURCES TO DETECT PROBLEMS AND CORRESPONDING SOLUTIONS - A method for detecting solutions to a problem using content in online discussion sources. The method includes receiving a request, such request identifying a problem, and searching multiple online discussion sources for content related to the problem. Responsive to finding content related to the problem, the method searches the multiple online discussion sources for a plurality of solutions to the problem. Responsive to finding a plurality of solutions to the problem, the method forms groups containing the solutions from each of the multiple online discussion sources. The method then determines a likeliness to solve the problem for each of the groups and ranks the groups based on the determined likeliness to solve the problem. The method then determines that the rank of at least one group meets a threshold value, wherein the threshold value is based on a confidence in the likeliness to solve the problem. | 09-25-2014 |
Patent application number | Description | Published |
20090168479 | THREE PORT CONTENT ADDRESSABLE MEMORY - A novel schematic for executing search, write and valid bit clear operations in one cycle in a CAM system that includes a plurality of CAM blocks is disclosed. In one embodiment, the plurality of CAM blocks are organized into at least one rectangular array having rows each having a plurality of CAM blocks, a group of CAM cells and associated read/write bit lines connecting the group of CAM cells to an addressed search circuit. The write operation depends on the output of the search operation, wherein the same data is written in to the CAM when the search operation results in a miss in a given cycle. Further, during the same cycle a valid bit clear operation is also performed. The resulting CAM cell provides a high speed three port operation. | 07-02-2009 |
20100046309 | RESET CIRCUIT FOR TERMINATION OF TRACKING CIRCUITS IN SELF TIMED COMPILER MEMORIES - A method and circuit for termination of internal cycle and its associated tracking circuits in high performance self timed compiler memories is disclosed. In one embodiment, a method of timing the precharging of BLs in a self timed compiler memory array includes initiating an internal clock during the start of a read/write cycle by a control block, triggering DWL and WLs to go high upon initiating the internal clock by the control block, triggering DBL and BLs to go low upon the DWL and WLs going high by the control block, generating a reset BL signal upon the DWL going high and the DBL going low by the tracking circuit, disabling the DBL from going further low upon receiving the reset BL signal by the tracking circuit, and precharging the DBL to go high upon receiving the reset BL signal by the precharge circuit. | 02-25-2010 |
20100165690 | SEGMENTED TERNARY CONTENT ADDRESSABLE MEMORY SEARCH ARCHITECTURE - A segmented ternary content addressable memory (TCAM) search architecture is disclosed. In one embodiment, a TCAM device with a row of TCAM cells includes a first segment of the TCAM cells for determining a match of corresponding search bits of a search string with a first portion of a stored string in the first segment of the TCAM cells, an evaluation module for generating a search enable signal if the match of the corresponding search bits with the first portion of the stored string is determined, and a second segment of the TCAM cells for determining a match of remaining search bits of the search string with a remaining portion of the stored string in response to the search enable signal. | 07-01-2010 |
20150092475 | PSEUDO RETENTION TILL ACCESS MODE ENABLED MEMORY - A memory configurable to be used in an RTA mode includes an input latch configured to receive an input address bus and to generate a latched address bus that corresponds to a memory location. An address flop is configured to save the latched address and to generate a flopped address. A first block address pre-decoder stage is configured to generate a pre-decoded latched address to an RTA generation logic in response to the latched address bus; and a second block address pre-decoder configured to generate a pre-decoded flopped address to the RTA generation logic in response to the flopped address. The RTA generation logic generates an RTA enable signal one clock cycle before a memory block access, to activate a memory block corresponding to the memory location, such that an array supply voltage of the memory block starts charging one clock cycle before a memory block access. | 04-02-2015 |