Ramachandrarao
Ragu T. Ramachandrarao, Bangalore IN
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20140100837 | INTEGRATION VERIFICATION SYSTEM - A verification system for an integrated device includes a plurality of detailed subsystem virtual prototypes, a plurality of fast subsystem virtual prototypes, and a test controller. The plurality of detailed system virtual prototypes include simulation information for core functionality of subsystems of the device. The plurality of fast system level prototypes include simulation information to facilitate overall functionality of the combined subsystems of the device. | 04-10-2014 |
Vijay Ramachandrarao, Portland, OR US
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20100276763 | LGA SUBSTRATE AND METHOD OF MAKING SAME - A transistor comprises a gate ( | 11-04-2010 |
Vijayakumar Ramachandrarao, Portland, OR US
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20090324928 | Forming ultra low dielectric constant porous dielectric films and structures formed thereby - Methods of forming a microelectronic structure are described. Embodiments of those methods include removing a portion of at least one of Si—C bonds and CHx bonds in a dielectric material comprising a porogen material by reaction with a wet chemical, wherein the portion of Si—C and CHx bonds are converted to Si—H bonds. The Si—H bonds may be further hydrolyzed to form SiOH linkages. The SiOH linkages may then be removed by a radiation based cure, wherein a portion of the porogen material is also removed. | 12-31-2009 |
Vijayakumar S. Ramachandrarao, Portland, OR US
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20090001594 | AIRGAP INTERCONNECT SYSTEM - A method may comprise assembling a first dielectric ensemble that comprises a first dielectric layer exhibiting a first porosity, a second dielectric layer exhibiting a second porosity and a third dielectric layer exhibiting a third porosity, and fabricating a first metal line in the dielectric ensemble. A chemical may be applied on the third layer to pass through and dissolve a portion of the second layer. The third layer acts to prevent a via that is partially landed on the dielectric from exposing the air gap underneath. | 01-01-2009 |
20090241988 | PHOTORESIST AND ANTIREFLECTIVE LAYER REMOVAL SOLUTION AND METHOD THEREOF - An aqueous solution composition may include an organic base hydroxide, potassium hydroxide, a compound selected from the group of compounds consisting of 2-mercaptobenzimidazole, 1-Phenyl-1H-tetrazole-5-thiol and 2-MerCaptoBenzoThiazole, hydrogen peroxide and deionized water. A method for removing photoresist and anti-reflective coating from a wafer using such a solution is also disclosed. | 10-01-2009 |
Vijayakumar S. Ramachandrarao, Hillsboro, OR US
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20080220380 | Enhancing photoresist performance using electric fields - Electric fields may be advantageously used in various steps of photolithographic processes. For example, prior to the pre-exposure bake, photoresists that have been spun-on the wafer may be exposed to an electric field to orient aggregates or other components within the unexposed photoresist. By aligning these aggregates or other components with the electric field, line edge roughness may be reduced, for example in connection with 193 nanometer photoresist. Likewise, during exposure, electric fields may be applied through uniquely situated electrodes or using a radio frequency coil. In addition, electric fields may be applied at virtually any point in the photolithography process by depositing a conductive electrode, which is subsequently removed during development. Finally, electric fields may be applied during the developing process to improve line edge roughness. | 09-11-2008 |
Vijayakumar Subramanyarao Ramachandrarao, Portland, OR US
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20100190347 | REMOVAL CHEMISTRY FOR SELECTIVELY ETCHING METAL HARD MASK - Embodiments of the present invention describe a removal chemistry for removing hard mask. The removal chemistry is a wet-etch solution that removes a metal hard mask formed on a dielectric layer, and is highly selective to a metal conductor layer underneath the dielectric layer. The removal chemistry comprises an aqueous solution of hydrogen peroxide (H | 07-29-2010 |