Priewasser
Franz Priewasser, St. Georgen AT
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20100276293 | ANTI-CORROSION SYSTEM FOR METALS AND PIGMENT THEREFOR - The invention relates to an anti-corrosion system for metals consisting of at least one finish or coating that can be applied to a metal, said finish or coating comprising an organic matrix. The organic matrix also contains anti-corrosion pigments, which are finely distributed throughout the organic matrix. The anti-corrosion pigments are formed from a metal alloy of at least two metals and optionally from inevitable impurities. The invention also relates to a corresponding anti-corrosion pigment. | 11-04-2010 |
Karl Priewasser, Munich DE
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20080248730 | WAFER PROCESSING METHOD - A wafer processing method including the step of removing a ringlike reinforcing portion formed along the outer circumference of a wafer on the back side thereof. The ringlike reinforcing portion is ground by a grinding stone in such a manner that the locus of the grinding stone rotating intersects the ringlike reinforcing portion as viewed in plan. The grinding of the ringlike reinforcing portion is ended when the ground surface of the ringlike reinforcing portion becomes higher by 20 to 1 μm than the upper surface of a metal film deposited on the back side of a device area of the wafer. It is unnecessary to accurately align the grinding stone to the ringlike reinforcing portion on the upper side thereof, so that the position control can be easily performed. Further, the grinding of the ringlike reinforcing portion is ended when the difference in height between the ground surface of the ringlike reinforcing portion and the upper surface of the metal film becomes 20 to 1 μm, so that there is no possibility that the metal film may be damaged. | 10-09-2008 |
Karl Priewasser, Muenchen DE
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20130115861 | PROCESSING METHOD FOR WAFER HAVING CHAMFERED PORTION ALONG THE OUTER CIRCUMFERENCE THEREOF - A wafer processing method for reducing the thickness of a wafer to a predetermined thickness, the wafer having a chamfered portion along the outer circumference thereof. The wafer processing method includes a stacked wafer forming step of attaching a support substrate to the front side of the wafer to thereby form a stacked wafer, and a chamfered portion removing step of positioning a cutting blade having a rotation axis parallel to the stacking direction of the stacked wafer formed by the stacked wafer forming step so that the outer circumference of the cutting blade faces the chamfered portion of the wafer, and then making the cutting blade cut into the wafer from the outer circumference toward the center thereof to thereby partially remove the chamfered portion in the range corresponding to the predetermined thickness from the front side of the wafer. | 05-09-2013 |
20130302969 | WAFER PROCESSING METHOD - A ring adhesive tape having an annular adhesive layer in a peripheral area thereof is attached to the front side of a wafer having a device area and a peripheral area surrounding the device area. The annular adhesive layer of the ring adhesive tape is positioned so as to correspond to the peripheral marginal area of the wafer, so that the annular adhesive layer does not adhere to the device area. In peeling the ring adhesive tape from the front side of the wafer after forming modified layers inside the wafer, it is possible to prevent damage to the device area due to the adhesive force of the annular adhesive layer. | 11-14-2013 |
20140004658 | RESIN SEALING METHOD FOR SEMICONDUCTOR CHIPS | 01-02-2014 |
Karl Heinz Priewasser, Muenchen DE
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20140084423 | PROTECTIVE MEMBER AND WAFER PROCESSING METHOD - A wafer processing method including a fixing step of providing a wafer on a protective member so that a device area of the wafer faces an unevenness absorbing member provided in a recess of the protective member and providing an adhesive outside the device area to thereby fix the protective member and the wafer, a grinding step of holding the protective member on a holding table in the condition where the back side of the wafer is exposed and next grinding the back side of the wafer by using a grinding unit to thereby reduce the thickness of the wafer to a predetermined thickness, and a removing step of removing the protective member from the wafer. The adhesive is locally provided outside of the device area, so that the protective member can be easily removed from the wafer without leaving the adhesive on the front side of each device. | 03-27-2014 |
Robert Priewasser, Klagenfurt AT
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20100268918 | ASIP ARCHITECTURE FOR EXECUTING AT LEAST TWO DECODING METHODS - A system for execution of a decoding method is disclosed. The system is capable of executing at least two data decoding methods which are different in underlying coding principle, wherein at least one of the data decoding methods requires data shuffling operations on the data. In one aspect, the system includes at least one application specific processor having an instruction set having arithmetic operators excluding multiplication, division and power. The processor is selected for execution of approximations of each of the at least two data decoding methods. The system also includes at least a first memory unit, e.g. background memory, for storing data. The system also includes a transfer unit for transferring data from the first memory unit towards the at least one programmable processor. The transfer unit includes a data shuffler. The system may also include a controller for controlling the data shuffler independent from the processor. | 10-21-2010 |
20110115453 | NONLINEAR CONTROL LOOP FOR DC-DC CONVERTERS - A nonlinear converter, such as a DC-DC converter, includes a nonlinear controller configured to receive an output voltage and a current, and configured to generate a PWM signal. The PWM signal is generated based on setting the converter to a first phase associated with both buck and boost modes when a clock signal is asserted, and selecting a second phase associated with the buck mode of the converter, if a sliding function signal achieves a first predetermined relationship with respect to a buck threshold before a next clock signal is asserted, or selecting a third phase associated with the boost mode of the converter, if the sliding function signal achieves a second predetermined relationship with respect to a boost threshold before a next clock signal is asserted. The nonlinear converter may include a power stage configured to provide the output voltage and a coil current to the nonlinear controller. | 05-19-2011 |
20110210707 | PULSE MODULATION CONTROL IN A DC-DC CONVERTER CIRCUIT - In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters. | 09-01-2011 |
20130043852 | Digital Controller for DC/DC Converters - An embodiment switching converter includes a power stage that receives an input voltage for converting it into an output voltage and provides a load current to a load operably coupled to the power stage. The power stage includes an inductor carrying an inductor current and a digital controller configured to regulate the output voltage to a level close to a reference voltage using a pulse width modulated (PWM) signal supplied to the power stage. | 02-21-2013 |
20140139296 | PULSE MODULATION CONTROL IN A DC-DC CONVERTER CIRCUIT - In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters. | 05-22-2014 |