Po-Chun
Po-Chun Chang, Taipei TW
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20090269336 | ANTI-VEGF MONOCLONAL ANTIBODY - The present invention provides novel monoclonal antibodies with a high binding affinity to all five isoforms of human VEGF. | 10-29-2009 |
20110033468 | Ophthalmic Drug Delivery System Containing Phospholipid and Cholesterol - An ophthalmic drug delivery system that contains phospholipid and cholesterol for prolonging drug lifetime in the eyes. | 02-10-2011 |
Po-Chun Chang, Hsinchu City TW
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20140163716 | BRIDGE DEVICE, AUTOMATED PRODUCTION SYSTEM AND METHOD THEREOF FOR STORAGE DEVICE - A bridge device for manufacturing a storage device, including a first transmission interface, a second transmission interface, a mode select unit, a power control unit, and a bridge controller is provided. The mode select unit generates a mode select signal responsive to a manufacturing process command. The power control unit controls powering operation of the storage device. The bridge controller receives the manufacturing process command through the first transmission interface. When the bridge controller detects the presence of the storage device, drives the power control unit turning off the storage device. After a first predetermined period, the bridge controller drives the mode select unit transmitting the mode select signal to the storage device through unused pin of the second transmission interface. The bridge controller drives the power control unit turning on the storage device after a second predetermined period to have the storage device entering a predefined mode. | 06-12-2014 |
Po-Chun Chang, Hsin-Chu TW
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20160070897 | TOUCH APPARATUS AND UNLOCKING METHOD THEREOF - A touch apparatus and an unlocking method thereof are provided. It is determined whether to unlock the touch apparatus according to touch sensing data and biometric sensing data. | 03-10-2016 |
Po-Chun Chang, Miao-Li County TW
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20100241887 | Touch display system and control method thereof - A control method is applied to a touch display system. The touch display system includes a display module, a touch module, and a programmable circuit. The programmable circuit is electrically connected between the touch module and the display module for executing the control method. The method includes: the touch module providing a first sense area; detecting whether the first sense area being touched or not; the display module displaying an boot image when the first sense area being touched; providing a second sense area after the boot image being displayed; detecting whether the second sense area being touched or not; and the display module displaying an on-screen display menu when the second sense area being touched, wherein the on-screen display menu includes a power item and a plurality of function items. | 09-23-2010 |
Po-Chun Chang, Taipei City TW
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20150147320 | Ophthalmic Drug Delivery System Containing Phospholipid and Cholesterol - An ophthalmic drug delivery system that contains phospholipid and cholesterol for prolonging drug lifetime in the eyes. | 05-28-2015 |
20150174069 | METHODS OF TREATING ARTHRITIS - Disclosed herein are methods of treating arthritis, comprising administering a sustained release composition comprising liposomes comprising one or more phospholipids, cholesterol, and a therapeutic agent. The sustained release composition can be administered intraarticularly. | 06-25-2015 |
Po-Chun Chen, Tainan City TW
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20120264306 | Method of Forming Opening on Semiconductor Substrate - The present invention provides a method of forming an opening on a semiconductor substrate. First, a substrate is provided. Then a dielectric layer and a cap layer are formed on the substrate. A ratio of a thickness of the dielectric layer and a thickness of the cap layer is substantially between 15 and 1.5. Next, a patterned boron nitride layer is formed on the cap layer. Lastly, an etching process is performed by using the patterned hard mask as a mask to etch the cap layer and the dielectric layer so as to form an opening in the cap layer and the dielectric layer. | 10-18-2012 |
20120306028 | SEMICONDUCTOR PROCESS AND STRUCTURE THEREOF - A semiconductor process is provided, including: a substrate is provided, a buffer layer is formed, and a dielectric layer having a high dielectric constant is formed, wherein the methods of forming the buffer layer include: (1) an oxidation process is performed; and a baking process is performed; Alternatively, (2) an oxidation process is performed; a thermal nitridation process is performed; and a plasma nitridation process is performed; Or, (3) a decoupled plasma oxidation process is performed. Furthermore, a semiconductor structure fabricated by the last process is also provided. | 12-06-2012 |
20130009288 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a dielectric layer on the substrate, wherein the dielectric layer comprises metal interconnects therein; forming a top metal layer on the dielectric layer; and forming a passivation layer on the top metal layer through high-density plasma chemical vapor deposition (HDPCVD) process. | 01-10-2013 |
20130012012 | SEMICONDUCTOR PROCESS - A semiconductor process includes the following steps. A substrate having an oxide layer thereon is provided. A high temperature process higher than 1000° C. is performed to form a melting layer between the substrate and the oxide layer. A removing process is performed to remove the oxide layer and the melting layer. | 01-10-2013 |
20130045594 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE HAVING METAL GATE - A manufacturing method for a semiconductor device having a metal gate includes providing a substrate having at least a first semiconductor device formed thereon, forming a first gate trench in the first semiconductor device, forming a first work function metal layer in the first gate trench, and performing a decoupled plasma oxidation to the first work function metal layer. | 02-21-2013 |
20130075874 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor structure includes a substrate, an oxide layer, a metallic oxynitride layer and a metallic oxide layer. The oxide layer is located on the substrate. The metallic oxynitride layer is located on the oxide layer. The metallic oxide layer is located on the metallic oxynitride layer. In addition, the present invention also provides a semiconductor process for forming the semiconductor structure. | 03-28-2013 |
20140106568 | METHOD OF FORMING OPENING ON SEMICONDUCTOR SUBSTRATE - The present invention provides a method of forming an opening on a semiconductor substrate. First, a substrate is provided. Then a dielectric layer and a cap layer are formed on the substrate. A ratio of a thickness of the dielectric layer and a thickness of the cap layer is substantially between 15 and 1.5. Next, a patterned boron nitride layer is formed on the cap layer. Lastly, an etching process is performed by using the patterned hard mask as a mask to etch the cap layer and the dielectric layer so as to form an opening in the cap layer and the dielectric layer. | 04-17-2014 |
Po-Chun Chen, Ruifang Town TW
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20100177260 | LCD APPARATUS WITH EDGE-ENGAGING ASSEMBLY AND METHOD OF FABRICATING SUCH EDGE-ENGAGING ASSEMBLY - The invention provides an LCD apparatus including a backlight assembly, an LCD panel assembly and an edge-engaging assembly. In particular, the edge-engaging assembly comprises N edge-engaging members, wherein N is an integer ranging from 1 to 4. Each of the N edge-engaging members has a respective inner wall adapted to engage the corresponding edge portions of the backlight assembly and the LCD assembly. | 07-15-2010 |
Po-Chun Chen, Taipei TW
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20090083299 | METHOD AND APPARATUS FOR MANAGING A CONTACT LIST - A method of managing a contact list in a communication system includes: a) in response to user manipulation, generating a contact identification (ID) representing a contact person in the communication system, and presenting the contact ID on the contact list; b) keeping track of a contact frequency between the user and the contact person; c) selecting an attribute in accordance with the contact frequency; and d) presenting the attribute on the contact list, such that the attribute is associated with the contact ID. An apparatus for managing a contact list in a communication system is also disclosed. | 03-26-2009 |
Po-Chun Chen, Taipei County TW
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20080225556 | FASTENING APPARATUS FOR A BACKLIGHT ASSEMBLY - The fastening apparatus utilizes a hanger and a hook disposed on the first side of a base of the fastening apparatus for hanging and fixing the fastening apparatus on a back cover of the LCD device. A groove divides the base into two parts and the outer part of the base as well as the hook is flexible relative to the inner part of the base. Two crack arresters are disposed at the end of the groove for preventing cracking of the fastening apparatus when repeated bending movement is needed while installing the fastening apparatus. | 09-18-2008 |
Po-Chun Chen, Tu-Cheng TW
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20120287478 | SCANNER - A scanner includes a scanning module and a base. The scanning module includes a loading panel and a driving module. The base includes a bottom panel, a sliding portion, and a first resisting tab extending from the bottom panel. A sliding slot is defined in the sliding portion to receive the scanning module. The first resisting tab includes a first tab body extending from the bottom panel and a first resilient absorbing portion connected to the first tab body. The first resilient absorbing portion resists the loading panel to prevent movement of the loading panel when the loading panel moves to a first side of the sliding slot. | 11-15-2012 |
20120287480 | SCANNER - A scanner includes a base and a scanning module. The base includes a bottom panel and a sliding portion extending from the bottom panel. A sliding slot is defined in the sliding portion. The sliding slot defines a longer side surface and a first shorter side surface extending from the longer side surface. A plurality of first teeth slots is defined in the longer side surface and a plurality of second teeth slots defined in the shorter side surface. The scanning module includes a loading panel and a driving module. The driving module includes a worm gear assembly engaging the first teeth slots and is capable of moving along the longer side surface. The worm gear assembly engage the plurality of second teeth slots to prevent the scanning module from moving when the scanning module moves to the first shorter side surface along the longer side surface. | 11-15-2012 |
20120288314 | PRINTING DEVICE AND METHOD THEREOF - A printing device includes a paper tray for supporting paper, a paper delivering module, a control module connected to the paper delivering module, a printing module configured to print on one or more sheets of the paper, and a detecting module connected to the control module and the paper delivering module. The paper delivering module includes a paper delivering channel connected to the paper tray. The control module sends instructions to control the paper delivering module. The detecting module detects whether the paper pass through the channel one by one and the printing process may be halted if necessary. A printing method based upon the printing device is also disclosed. | 11-15-2012 |
Po-Chun Chen, New Taipei TW
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20140341531 | DYNAMIC VIDEO STORING METHOD AND NETWORK SECURITY SURVEILLANCE APPARATUS - A dynamitic video storing method and a network security surveillance apparatus are provided. The dynamitic video storing method is performed on the network security surveillance apparatus through a network. The network security surveillance apparatus includes a video capturing unit, a storage unit, and a processing unit. The network security surveillance apparatus executes the dynamitic video storing method including the following steps. First, receive a video signal. Then, determine whether a connecting status is disconnected, and determine a residual capacity of a storage unit when the connecting status is disconnected. Finally, store the video signal according to a video parameter after the video parameter for the video signal is set according to the residual capacity. | 11-20-2014 |
Po-Chun Chen, Hsin-Chu TW
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20150062969 | BACKLIGHT MODULE - A backlight module includes a back bezel, at least one frame, at least one fastener, a cushion and a light guide plate. The back bezel includes a bottom plate and at least one lateral plate. The lateral plate is adjoined to the bottom plate. The frame presses against the lateral plate. The fastener fastens the frame and the back bezel. The cushion is disposed on the bottom plate, and includes a cavity. Part of the fastener is located in the cavity. The light guide plate is disposed on one side of the cushion opposite to the bottom plate. | 03-05-2015 |
20160062184 | DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A display device includes a display panel and a backlight module. The display panel is bent in a first direction and a second direction perpendicular to the first direction. The backlight module is disposed on one side of the display panel. | 03-03-2016 |
Po-Chun Chiu, Taipei TW
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20150288940 | PIXEL ARRAY WITH CLEAR AND COLOR PIXELS EXHIBITING IMPROVED BLOOMING PERFORMANCE - This disclosure provides pixel arrays made up of a clear pixel and a color pixel. The color pixel includes a first photo-detecting element and a color pixel access transistor to selectively couple the first photo-detecting element to a first charge-storage node. The clear pixel includes a second photo-detecting element and a clear pixel access transistor to selectively couple the second photo-detecting element to a second charge-storage node. The color pixel access transistor transfers a first charge per unit time between the first photo-detecting element and the first charge-storage node. The clear pixel access transistor transfers a second charge per unit time between the clear pixel access transistor and the second charge-storage node. The first charge per unit time is less than the second charge per unit time to mitigate blooming. In other embodiments, the clear pixel includes an excess-charge transfer path that couples the clear pixel to a DC supply node to mitigate blooming. | 10-08-2015 |
Po-Chun Chuang, Tao-Yuan TW
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20110070500 | Electrode Material, Forming Method and Application Thereof - An electrode material includes a particle-shaped crystalline metal oxide and further includes a particle-shaped amorphous metal oxide that is porous with a pore volume greater than or equal to 0.5 cm | 03-24-2011 |
Po-Chun Chung, Pingtung County TW
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20090304076 | MEMORY ARRANGEMENT METHOD AND SYSTEM FOR AC/DC PREDICTION IN VIDEO COMPRESSION APPLICATIONS BASED ON PARALLEL PROCESSING - A memory arrangement method and system for AC/DC prediction in video compression applications based on parallel processing is disclosed. The method and system achieves optimum operating efficiency for data operation and reading based on parallel computing characteristics (Single Instruction Multiple Data (SIMD)) of an operation unit of the system. Additionally, the method transplants a VC-1 video compression system running in an operating system (the Windows operating system, for example) to a system platform using a digital signal processor (DSP) as an operation unit and implements a real-time VC-1 encoder according to parallel computing characteristics of a hardware core of the system platform. | 12-10-2009 |
Po-Chun Hsu, New Taipei City TW
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20150235598 | BACKLIGHT MODULE AND DISPLAY APPARATUS - A backlight module including a light guide plate, light source sets, and controlling circuits is provided. The light guide plate has a plurality of regions, and each region of the light guide plate has a light incident surface correspondingly. Each light source set is disposed at the light incident surface of one of the regions of the light guide plate, and each light source set has at least one middle light source and at least one edge light source. The middle light source is disposed in a middle region of the light source set and the edge light source is disposed at an edge of the light source set. Each controlling circuit is electrically connected to the middle light source of one of the light source sets, and the edge light source of each light source set is electrically connected to the controlling circuit of the adjacent light source set. | 08-20-2015 |
Po-Chun Hsu, Tu-Cheng TW
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20090098856 | SECURITY SYSTEM AND METHOD FOR A MOBILE PHONE - A security system for a mobile phone is disclosed for securing private information of the mobile phone. The system may set at least two PIN numbers for a super user and a general user, encrypt a phone book system of the mobile phone by setting a security status for each contact in a phone book system of the mobile phone. The system also may start a secure work mode if a user of the mobile phone is a super user and starting a non-secure work mode if the user is a general user of the mobile phone. A security method for a mobile phone is also disclosed. | 04-16-2009 |
Po-Chun Hsu, Shetou Township TW
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20090217105 | Debug device for embedded systems and method thereof - A debug device of embedded systems is provided. The embedded system includes an embedded processor for reading a bootloader from a flash memory through a data flash interface. The debug device includes a memory transmission interface, a dada storage module, a data control module and a display module. The memory transmission interface is configured to couple the data flash interface for receiving data to the data storage module. The data control module determines whether the data stored in the data storage module is data from a data bus or from the data flash interface according to whether a data control signal of the data flash interface has been triggered. The display module displays the data of the data storage module. | 08-27-2009 |
Po-Chun Huang, Hsin-Chu TW
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20110286235 | BACKLIGHT MODULE - A backlight module includes a back plate, a light guide plate, a heat insulation layer, a heat dissipation member, and a light source device. The back plate has a first surface, a second surface opposite to the first surface, and an opening passing through the back plate. The light guide plate is disposed on the first surface, the heat insulation layer is disposed on the second surface, and the heat dissipation member is disposed on the heat insulation layer. The light source device is connected to the heat dissipation member and protrudes from the first surface to face the light guide plate through the opening. | 11-24-2011 |
Po-Chun Huang, Hsinchu City TW
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20130094491 | COMMUNICATIONS APPARATUSES AND METHOD FOR MULTI-LEVEL TRANSMISSION POWER CONTROL THEREOF - A communications apparatus is provided. A radio module transmits first packets before establishing a connection with a peer communications device. A transmission power utilized for transmitting the first packets is adjustable, so that multiple levels of transmission power are utilized for transmitting the first packets. | 04-18-2013 |
20150187616 | MECHANISMS OF ADJUSTABLE LASER BEAM FOR LASER SPIKE ANNEALING - Mechanisms of adjustable laser beams for LSA (Laser Spike Annealing) are provided. A computing device receives input mask information relative to a silicon wafer, and analyzes the input mask information so as to generate a control signal. A laser generator generates a laser beam, and adjusts a beam length of the laser beam according to the control signal. Such mechanisms of the disclosure effectively eliminate the stitch effect on the silicon wafer and further increase the wafer yield. | 07-02-2015 |
Po-Chun Huang, Taipei City TW
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20080282900 | Ingenious Lid Structure for Infusion Drinks Percolator - A lid structure includes a lower lid slightly flared at the upper fringe, and having an engagement flange formed around it with a claw provided on its upper edge. A cutting tube of an upper lid is extended down from the center of the upper lid and inserted into the lower lid. The bottom of the cutting tube is also tilted. A detent is formed on the inner surface at the lower end of the upper lid to engage with the claw of the engagement flange so as to couple tightly the two lids. Several gaskets are provided around the inner side wall of the upper lid. An infusion drink material is filled into the cutting tube of the upper lid, and a film is used to seal the bottom of the lower lid. | 11-20-2008 |
Po-Chun Huang, Miao-Li County 351 TW
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20140062979 | BIDIRECTIONAL SCANNING DRIVING CIRCUIT - The invention provides a bidirectional scanning driving circuit, which comprises N stages of driving modules. Driving module comprises an output unit, a forward input unit, and a reverse input unit. For the n-th stage driving module, the forward input unit receives a first input voltage and a front forward scan signal of any of the driving modules lower than or equal to (n−2)th stage for charging or discharging a control node of the output unit. The reverse input unit receives a second input voltage and a back reverse scan signal of any of the driving modules higher than or equal to (n+2)th stage for charging or discharging the control node of the output unit. When the forward input unit is charging the output unit, the output unit outputs a forward scan signal; when the reverse input unit is charging the output unit, the output unit outputs a reverse scan signal. | 03-06-2014 |
Po-Chun Huang, Dacun Township TW
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20150224624 | ABRASIVE ARTICLE, CONDITIONING DISK AND METHOD FOR FORMING ABRASIVE ARTICLE - In accordance with some embodiments, an abrasive article is provided. The abrasive article includes a carrier. The abrasive article further includes a matrix layer on the carrier. The matrix layer includes a copper-titanium-tin alloy, wherein the copper-titanium-tin alloy includes from about 70 wt % to about 90 wt % of copper, from about 5 wt % to about 15 wt % of titanium, and from about 5 wt % to about 15 wt % of tin. The abrasive article also includes at least one abrasive particle partially embedded in the matrix layer. The abrasive particle includes carbon. | 08-13-2015 |
Po-Chun Huang, Kaohsiung City TW
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20120002561 | METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION USED IN COMMUNICATION SYSTEM HAVING TIME SLOTS - An apparatus used in a communication system having a plurality of time slots includes a signal processing circuit, a signal detector, and a controlling circuit. The signal processing circuit receives an input signal. The signal detector detects the input signal to generate a detection result. The controlling circuit controls the signal processing circuit according to the detection result. When the detection result does not meet a predetermined criterion, the controlling circuit adjusts the signal processing circuit for reducing power consumption of the signal processing circuit. | 01-05-2012 |
Po-Chun Huang, New Taipei TW
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20120284450 | FLASH MEMORY SYSTEM AND MANAGING AND COLLECTING METHODS FOR FLASH MEMORY WITH INVALID PAGE MESSAGES THEREOF - A flash memory system and managing and collecting methods for flash memory with invalid page messages thereof are described. When the valid data pages of the flash memory are changed to invalid data pages, a recording area is used to record the message of the invalid data pages to effectively collect the occupied space of the invalid data pages in the flash memory. Further, while garbage collecting step is performed, a block is rapidly selected according to the message of the recording area and the valid data pages in the selected block are correctly identified, copied and removed. | 11-08-2012 |
Po-Chun Kuo, Tainan Hsien TW
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20080216669 | GRILL DEVICE WITH A REMOVABLE GRILL PLATE - A grill member of a grill device includes a housing, a grill plate, a heating unit, and a handle unit. The housing is formed with a latch hole. The grill plate is made of a heat-conductive material and is disposed removably on the housing. The heating unit is mounted on the housing and is operable so as to generate heat that is conducted to the grill plate. The handle unit is movably retained on the grill plate and is operable so as to engage releasably the latch hole in the housing, thereby locking releasably the grill plate on the housing. | 09-11-2008 |
20080223847 | ELECTRIC GRILL AND METHOD OF USING SAME - An electric grill includes at least one grill pan having a first heating member, a second heating member, and a temperature sensing member for measuring the temperature of the grill pan; and the first heating member, the second heating member and the temperature sensing member connect with a control circuit. The temperature sensing member provides a temperature signal for the control circuit, and the control circuit controls the power on/off of the first heating member and the second heating member. | 09-18-2008 |
Po-Chun Kuo, Hsinchu Hsien TW
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20100265785 | Protection Circuit and Power Supply System for Flash Memory - A protection circuit, applied to a flash memory including a power supply pin, includes a capacitor and a switch. A power supply provides a reference voltage. The capacitor is electrically connected to the power supply pin and a ground point. The switch is electrically connected between the power supply pin and the power supply. When the reference voltage is higher than a threshold voltage, the switch is turned on, such that the reference voltage is inputted into the power pin via the switch. When the reference voltage is lower than the threshold voltage, the switch is turned off. | 10-21-2010 |
Po-Chun Lin, Taipei City TW
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20150304794 | MOBILE DEVICE, SERVICE DEVICE, AND METHODS THEREOF - A mobile Device, service device, and service request processing methods thereof are described. The service request processing method is adopted by a service device, includes: establishing, by a touch panel of the service device, a communication channel to a mobile device; receiving, by the touch panel, a service request sent from the mobile device via the communication channel; generating service information according to the service request; and transmitting the service information to the mobile device via the communication channel. | 10-22-2015 |
Po-Chun Liu, Hsin-Chu TW
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20140191240 | High Electron Mobility Transistor and Method of Forming the Same - A High Electron Mobility Transistor (HEMT) includes a first III-V compound layer having a first band gap, and a second III-V compound layer having a second band gap over the first III-V compound layer. The second band gap is smaller than the first band gap. The HEMT further includes a third III-V compound layer having a third band gap over the second III-V compound layer, wherein the third band gap is greater than the first band gap. A gate electrode is formed over the third III-V compound layer. A source region and a drain region are over the third III-V compound layer and on opposite sides of the gate electrode. | 07-10-2014 |
20140231816 | HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF FORMING THE SAME - A High Electron Mobility Transistor (HEMT) includes a first III-V compound layer having a first band gap, and a second III-V compound layer having a second band gap over the first III-V compound layer. The second band gap is greater than the first band gap. A crystalline interfacial layer is overlying and in contact with the second III-V compound layer. A gate dielectric is over the crystalline interfacial layer. A gate electrode is over the gate dielectric. A source region and a drain region are over the second III-V compound layer, and are on opposite sides of the gate electrode. | 08-21-2014 |
20150021667 | High Electron Mobility Transistor and Method of Forming the Same - A semiconductor structure includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. A source feature and a drain feature are disposed on the second III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A fluorine region is embedded in the second III-V compound layer under the gate electrode. A diffusion barrier layer is disposed on top of the second III-V compound layer. A gate dielectric layer is disposed over the second III-V compound layer. The gate dielectric layer has a fluorine segment on the fluorine region and under at least a portion of the gate electrode. | 01-22-2015 |
Po-Chun Liu, Hsinchu City TW
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20130099243 | SUBSTRATE BREAKDOWN VOLTAGE IMPROVEMENT FOR GROUP III-NITRIDE ON A SILICON SUBSTRATE - A circuit structure includes a substrate, a nucleation layer of undoped aluminum nitride, a graded buffer layer comprising aluminum, gallium, nitrogen, one of silicon and oxygen, and a p-type conductivity dopant, a ungraded buffer layer comprising gallium, nitrogen, one of silicon and oxygen, and a p-type conductivity dopant without aluminum, and a bulk layer of undoped gallium nitride over the ungraded buffer layer. The various dopants in the graded buffer layer and the ungraded buffer layer increases resistivity and results in layers having an intrinsically balanced conductivity. | 04-25-2013 |
20130112939 | NEW III-NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A circuit structure includes a substrate and a patterned dielectric layer over the substrate. The patterned dielectric layer includes a plurality of vias; and a number of group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layers include a first layer in the vias, a second layer over the first layer and the dielectric layer, and a bulk layer over the second layer. | 05-09-2013 |
20130140525 | GALLIUM NITRIDE GROWTH METHOD ON SILICON SUBSTRATE - A semiconductor structure includes a silicon substrate; more than one bulk layer of group-III/group-V (III-V) compound semiconductor atop the silicon substrate; and each bulk layer of the group III-V compound is separated by an interlayer. | 06-06-2013 |
20140001439 | Graded Aluminum-Gallium-Nitride and Superlattice Buffer Layer for III-V Nitride Layer on Silicon Substrate | 01-02-2014 |
20140197418 | SEMICONDUCTOR STRUCTURE HAVING SETS OF III-V COMPOUND LAYERS AND METHOD OF FORMING THE SAME - A semiconductor structure includes a substrate, a first III-V compound layer over the substrate, one or more sets of III-V compound layers over the first III-V compound layer, a second III-V compound layer over the one or more sets of III-V compound layers, and an active layer over the second III-V compound layer. The first III-V compound layer has a first type doping. Each of the one or more sets of III-V compound layers includes a lower III-V compound layer and an upper III-V compound layer over the lower III-V compound layer. The upper III-V compound layer having the first type doping, and the lower III-V compound layer is at least one of undoped, unintentionally doped having a second type doping, or doped having the second type doping. The second III-V compound layer is either undoped or unintentionally doped having the second type doping. | 07-17-2014 |
20140203289 | High Electron Mobility Transistors - The present disclosure relates to a donor layer of bi-layer AlGaN and associated method of fabrication within a high electron mobility transistor (HEMT) configured to provide low-resistance ohmic source and drain contacts to reduce power consumption, while maintaining a high-mobility of a two-dimensional electron gas (2DEG) within a channel of the HEMT. The donor layer of bi-layer AlGaN comprises a mobility-enhancing layer of Al | 07-24-2014 |
20140209918 | Thick ALN Inter-Layer for III-Nitride Layer on Silicon Substrate - The present disclosure relates to a gallium-nitride (GaN) transistor device having a composite gallium nitride layer with alternating layers of GaN and aluminum nitride (AlN). In some embodiments, the GaN transistor device has a first GaN layer disposed above a semiconductor substrate. An AlN inter-layer is disposed on the first GaN layer. A second GaN layer is disposed on the AlN inter-layer. The AlN inter-layer allows for the thickness of the GaN layer to be increased over continuous GaN layers, mitigating bowing and cracking of the GaN substrate, while improving the breakdown voltage of the disclosed GaN device. | 07-31-2014 |
20140209920 | High Electron Mobility Transistor Structure - The present disclosure relates to a channel layer of bi-layer of gallium nitride (GaN) within a HEMT. A first breakdown voltage layer of GaN is disposed beneath an active layer of the HEMT. A second breakdown voltage layer of GaN is disposed beneath the first breakdown voltage layer, wherein the first resistivity value is less than the second resistivity value. An increased resistivity of the second breakdown voltage layer results from an increased concentration of carbon dopants which increases the breakdown voltage in the second breakdown voltage layer, but can degrade the crystal structure. To alleviate this degradation, a crystal adaptation layer is disposed beneath the second breakdown voltage layer and configured to lattice-match to the second breakdown voltage layer of GaN. As a result, the HEMT achieves a high breakdown voltage without any associated degradation to the first breakdown voltage layer, wherein a channel of the HEMT resides. | 07-31-2014 |
20150021660 | TRANSISTOR HAVING A BACK-BARRIER LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate and a buffer layer on the substrate, wherein the buffer layer comprises p-type dopants. The transistor further includes a channel layer on the buffer layer and a back-barrier layer between a first portion of the channel layer and a second portion of the channel layer. The back-barrier layer has a band gap discontinuity with the channel layer. The transistor further includes an active layer on the second portion of the channel layer, wherein the active layer has a band gap discontinuity with the second portion of the channel layer. The transistor further includes a two dimensional electron gas (2-DEG) in the channel layer adjacent an interface between the channel layer and the active layer. | 01-22-2015 |
20150021661 | TRANSISTOR HAVING HIGH BREAKDOWN VOLTAGE AND METHOD OF MAKING THE SAME - A transistor includes a substrate and a graded layer on the substrate, wherein the graded layer is doped with p-type dopants. The transistor further includes a superlattice layer (SLS) on the graded layer, wherein the SLS has a p-type dopant concentration equal to or greater than 1×10 | 01-22-2015 |
20150021665 | TRANSISTOR HAVING BACK-BARRIER LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate, a back-barrier layer over the channel layer, and an active layer over the back-barrier layer. The back-barrier layer has a band gap discontinuity with the channel layer. The band gap of the active layer is less than the band gap of the back-barrier layer. A two dimensional electron gas (2-DEG) is formed in the channel layer adjacent an interface between the channel layer and the back-barrier layer. | 01-22-2015 |
20150021666 | TRANSISTOR HAVING PARTIALLY OR WHOLLY REPLACED SUBSTRATE AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate, an active structure over the channel layer, a gate electrode over the channel layer, and a drain electrode over the channel layer. The active structure is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active structure. The gate electrode and the drain electrode define a first space therebetween. The substrate has a first portion directly under the first space defined between the gate electrode and the drain electrode, and the first portion has a first electrical conductivity value less than that of intrinsic silicon and a thermal conductivity value greater than that of intrinsic silicon. | 01-22-2015 |
20150041825 | SEMICONDUCTOR DEVICE, HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND METHOD OF MANUFACTURING - A semiconductor device includes a substrate, a channel layer over the substrate, an active layer over the channel layer, and a barrier structure between the substrate and the channel layer. The active layer is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The barrier structure is configured to block diffusion of at least one of a material of the substrate or a dopant toward the channel layer. | 02-12-2015 |
20150053990 | TRANSISTOR HAVING AN OHMIC CONTACT BY SCREEN LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate and an active layer over the channel layer. The active layer includes a first portion and a screen layer over the first portion. The transistor includes a metal layer over the screen layer. | 02-26-2015 |
20150053991 | TRANSISTOR HAVING AN OHMIC CONTACT BY GRADIENT LAYER AND METHOD OF MAKING THE SAME - A transistor includes a substrate, a channel layer over the substrate and an active layer over the channel layer. The active layer includes a gradient having a first concentration of a first material at an interface with the channel layer and a second concentration of the first material at a surface opposite the channel layer, and the first concentration is higher than the second concentration. | 02-26-2015 |
20150053992 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING - A semiconductor device includes a substrate, a channel layer over the substrate, an active layer over the channel layer, a gate structure over the active layer, and a barrier layer between the gate structure and the active layer. The active layer is configured to cause a two dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer. The gate structure is configured to deplete the 2DEG under the gate structure. The gate structure includes a dopant. The barrier layer is configured to block diffusion of the dopant from the gate structure into the active layer. | 02-26-2015 |
20150206962 | SEMICONDUCTOR DEVICE, TRANSISTOR HAVING DOPED SEED LAYER AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a substrate, and a seed layer over the substrate, wherein the seed layer comprises carbon dopants. The semiconductor device further includes a channel layer over the seed layer, and an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer. A method of making a transistor includes forming a seed layer over a substrate, and doping the seed layer, wherein doping the seed layer comprises introducing carbon dopants into the seed layer. The method further includes forming a channel layer over the seed layer, and forming an active layer over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer. | 07-23-2015 |
20150236101 | HIGH ELECTRON MOBILITY TRANSISTOR WITH INDIUM NITRIDE LAYER - A method comprises depositing a first layer comprising aluminum nitride over a substrate. The method further comprises depositing a second layer comprising aluminum gallium nitride over the first layer. The method also comprises depositing a third layer comprising indium gallium nitride over the second layer. The method additionally comprises removing some of the third layer leaving a first portion of the third layer and a second portion of the third layer. The method further comprises reducing an aluminum content of at least the first layer by drawing aluminum atoms from the first layer into at least the second layer beneath the first portion and the second portion of the third layer. The method also comprises depositing a source contact over the first portion of the third layer and a drain contact over the second portion of the third layer. | 08-20-2015 |
20150236146 | HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) HAVING AN INDIUM-CONTAINING LAYER AND METHOD OF MANUFACTURING THE SAME - A high electron mobility transistor (HEMT) includes a substrate, and a channel layer over the substrate, wherein and at least one of the channel layer or the active layer comprises indium. The HEMT further includes an active layer over the channel layer. The active layer has a band gap discontinuity with the channel layer. | 08-20-2015 |
20150287806 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of making a semiconductor device includes epitaxially growing a channel layer over a substrate. The method further includes depositing an active layer over the channel layer. Additionally, the method includes forming a gate structure over the active layer, the gate structure configured to deplete a 2DEG under the gate structure, the gate structure including a dopant. Furthermore, the method includes forming a barrier layer between the gate structure and the active layer, the barrier layer configured to block diffusion of the dopant from the gate structure into the active layer. | 10-08-2015 |
20150349106 | SEMICONDUCTOR STRUCTURE HAVING SETS OF III-V COMPOUND LAYERS AND METHOD OF FORMING THE SAME - A semiconductor structure includes a substrate; and a graded III-V layer over the substrate. The semiconductor structure further includes a p-doped gallium nitride (GaN) layer over the graded III-V layer. The semiconductor structure further includes one or more sets of GaN layers over the p-doped GaN layer. Each set of the one or more sets of GaN layers includes a lower GaN layer, wherein the lower GaN layer is undoped, unintentionally doped having N-type doping, or N-type doped. Each set of the one or more sets of GaN layers includes an upper GaN layer on the lower GaN layer, wherein the upper GaN layer is P-type doped. The semiconductor structure includes a second GaN layer over the one or more sets of GaN layers, the second GaN layer being either undoped or unintentionally doped having the N-type doping. The semiconductor structure includes an active layer over the second GaN layer. | 12-03-2015 |
20160071969 | HIGH ELECTRON MOBILITY TRANSISTOR WITH INDIUM NITRIDE LAYER - A semiconductor device includes a substrate, a first layer over the substrate, a second layer over the first layer, and a third layer over the second layer. The third layer has a first portion and a second portion. The first portion of the third layer is separated from the second portion of the third layer. The semiconductor device also includes a first blended region beneath the first portion of the third layer. The first blended region includes aluminum atoms drawn from the first layer into at least the second layer. The semiconductor device further includes a second blended region beneath the second portion of the third layer. The second blended region includes aluminum atoms drawn from the first layer into at least the second layer. The semiconductor device also includes a source contact and a drain contact. | 03-10-2016 |
Po-Chun Yeh, Tainan County TW
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20100225686 | PRINT SIGNAL GENERATION SYSTEM - An embodiment of a print signal generation system is provided. The system comprises a sensor, a divisor processing unit, a reference signal generator, and a print trigger signal generator. The sensor detects a first offset of a first location of a medium being printed. The divisor processing unit generates a first divisor according to the first offset and a predetermined divisor. The reference signal generator generates a reference signal. The print trigger signal generator generates a print trigger signal according to the first divisor and the reference signal. | 09-09-2010 |
Po-Chun Yeh, Yangmei City TW
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20130258293 | Phase Modulation Module and Projector Comprising the Same - An optical phase modulation module and a projector comprising the same are provided. The optical phase modulation module comprises a transparent thin film with an electro-optic effect, a plurality of first upper electrodes, a plurality of second upper electrodes and a plurality of lower electrodes. The transparent thin film with the electro-optic effect has a top surface and a bottom surface. The first upper electrodes are formed on the top surface. The second upper electrodes are formed on the top surface and arranged alternately with the first upper electrodes. The lower electrodes are formed on the bottom surface. A first voltage difference exists between the first upper electrodes and the bottom electrodes, while a second voltage difference exists between the second upper electrodes and the bottom electrodes. Two different electric fields are produced within the transparent thin film with the electro-optic effect by the first voltage difference and the second voltage difference respectively. | 10-03-2013 |
Po-Chun Yeh, Hsinchu TW
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20120264246 | Method of Selective Photo-Enhanced Wet Oxidation for Nitride Layer Regrowth on Substrates - Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation. | 10-18-2012 |
20120264247 | Method of Separating Nitride Films from the Growth Substrates by Selective Photo-Enhanced Wet Oxidation - Various embodiments of the present disclosure pertain to separating nitride films from growth substrates by selective photo-enhanced wet oxidation. In one aspect, a method may transform a portion of a III-nitride structure that bonds with a first substrate structure into a III-oxide layer by selective photo-enhanced wet oxidation. The method may further separate the first substrate structure from the III-nitride structure. | 10-18-2012 |
20130228807 | METHOD OF SEPARATING NITRIDE FILMS FROM GROWTH SUBSTRATES BY SELECTIVE PHOTO-ENHANCED WET OXIDATION AND ASSOCIATED SEMICONDUCTOR STRUCTURE - Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a semiconductor structure may comprise: a first substrate structure; a III-nitride structure bonded with the first substrate structure; a plurality of air gaps formed between the first substrate structure and the III-nitride structure; and a III-oxide layer formed on surfaces around the air gaps, wherein a portion of the III-nitride structure including surfaces around the air gaps is transformed into the III-oxide layer by a selective photo-enhanced wet oxidation, and the III-oxide layer is formed between an untransformed portion of the III-nitride structure and the first substrate structure. | 09-05-2013 |
20140131750 | METHOD OF SELECTIVE PHOTO-ENHANCED WET OXIDATION FOR NITRIDE LAYER REGROWTH ON SUBSTRATES AND ASSOCIATED STRUCTURE - Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation. | 05-15-2014 |
20140252308 | METHOD OF SELECTIVE PHOTO-ENHANCED WET OXIDATION FOR NITRIDE LAYER REGROWTH ON SUBSTRATES AND ASSOCIATED STRUCTURE - Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation. | 09-11-2014 |