Patent application number | Description | Published |
20140135428 | Polymerizate Comprising a Macromonomer - The present invention relates to a polymerizate in the form of an aqueous polymer dispersion, the polymerizate being obtainable by radical polymerization of monomers in an aqueous medium in the presence of a free radical initiator and a protective colloid, wherein the monomers comprise a) 50-99.99 wt. % of at least one vinyl monomer chosen from the group of vinyl esters, (meth)acrylic esters, vinyl aromatic compounds, vinyl halides, and olefins, and b) 0.01-30 wt. % of at least one macromonomer M, the macromonomer M being a reaction product of components (i), (ii), and (iii), said —component (i) having at least one olefinically unsaturated group and at least one hydroxyl, amine and/or thiol group, —component (ii) being a di- or triisocyanate, and —component (iii) having at least two terminal groups selected from hydroxyl, amine and/or thiol groups, c) 0-20 wt % of at least one vinyl monomer with at least one functional group, wherein the monomers a), b), and c) sum up to 100 wt. % of total monomers employed. The invention further provides a process to prepare the polymerizate, water-redispersible polymer powders obtainable from the polymerizate, and building material compositions containing the polymerizate and/or the water-redispersible polymer powders. | 05-15-2014 |
20140245093 | MASTER BOOT RECORD PROTECTION IN A SOLID STATE DRIVE - A method for protecting a master boot record in a solid state drive, comprising the steps of (A) receiving a plurality of input/output requests from a host device, (B) determining whether one or more of the input/output requests is read/written to a first of a plurality of logical block addresses of the solid state drive and (C) writing an entry to a table for each of the input/output requests read/written to the first of the logical block addresses. The table (i) is separate from the first of the logical block addresses and (ii) is used to recover errors in the first of the logical block addresses. | 08-28-2014 |
20140284728 | Metal Silicide Thin Film, Ultra-Shallow Junctions, Semiconductor Device and Method of Making - A metal silicide thin film and ultra-shallow junctions and methods of making are disclosed. In the present disclosure, by using a metal and semiconductor dopant mixture as a target, a mixture film is formed on a semiconductor substrate using a physical vapor deposition (PVD) process. The mixture film is removed afterwards by wet etching, which is followed by annealing to form metal silicide thin film and ultra-shallow junctions. Because the metal and semiconductor dopant mixture is used as a target to deposit the mixture film, and the mixture film is removed by wet etching before annealing, self-limiting, ultra-thin, and uniform metal silicide film and ultra-shallow junctions are formed concurrently in semiconductor field-effect transistor fabrication processes, which are suitable for field-effect transistors at the 14 nm, 11 nm, or even further technology node. | 09-25-2014 |
20140306271 | Unltra-Shallow Junction Semiconductor Field-Effect Transistor and Method of Making - An ultra-shallow junction semiconductor field-effect transistor and its methods of making are disclosed. In the present disclosure, a mixture film is formed on a semiconductor substrate with a gate structure formed thereon using a physical vapor deposition (PVD) process, which employs a mixture of metal and semiconductor dopants as a target. The PVD process is followed by annealing, during which ultra-shallow junctions and ultra-thin metal silicide are formed. After removing the mixture film remaining on the semiconductor substrate, an ultra-shallow junction semiconductor field-effect transistor is formed. Because the mixture film comprises metal and semiconductor dopants, ultra-shallow junctions and ultra-thin metal silicide can be formed in a same annealing process. The ultra-shallow junction thus formed can be used in semiconductor field-effect transistors for the 14 nm, 11 nm, or even further technology node. | 10-16-2014 |
20150074327 | Active Recycling for Solid State Drive - A solid state drive and a method for providing active recycling for the solid state drive are disclosed. The solid state drive includes a plurality of blocks and each of the plurality of blocks includes a plurality of pages. The method steps include receiving a read request from a data requester; identifying at least one page containing data requested by the read request; determining whether the at least one page belongs to a block identified for active recycling; writing the at least one page to a different block when the at least one page belongs to the block identified for active recycling; and sending the at least one page to the data requester in response to the read request. | 03-12-2015 |
20150120989 | Tracking and Utilizing Second Level Map Index for Recycling of Solid State Drive Blocks - A recycling method for a solid state drive is disclosed. The method includes selecting a logical block for recycle wherein the logical block includes a plurality of pages across a plurality of flash dies. The method also includes retrieving an address map index record associated with the logical block selected for recycle. For each particular address map index stored in the address map index record, the recycling method retrieves a set of address map entries referenced by the particular address map index, determines whether any page in the logical block is referenced by the set of address map entries, and if at least one page in the logical block is referenced by the set of address map entries, the method writes the at least one page to a different logical block. The method further includes erasing the plurality of pages in the logical block. | 04-30-2015 |
20150148457 | PROCESS FOR PREPARING MULTI-COLOR DISPERSIONS AND MULTI-COLOR DISPERSIONS MADE THEREOF - This invention relates to a process for preparing multi-color dispersions and the multi-color dispersions made thereof. | 05-28-2015 |
20150268871 | READ DISTURB HANDLING IN NAND FLASH - An apparatus having a processor and an interface to a nonvolatile memory having a plurality of blocks is disclosed. The processor is configured to (i) monitor a number of reads since a respective erase in at least one of the blocks in the nonvolatile memory, (ii) move a page from a first block to a second block in response to the number of reads exceeding a first threshold where the first block is partially programmed and (iii) move the page from the first block to the second block in response to the number of reads exceeding a second threshold where the first block is fully programmed. The first threshold is less than the second threshold. | 09-24-2015 |