Patent application number | Description | Published |
20080235242 | Advanced Contact Management in Communications Networks - A system provided herein permits a communications network subscriber to establish a local contact database on at least one communications device. The local contact database can communicate with a global contact database to receive contact information updates for a group of subscribers stored within the local contact database. The contact information can include basic contact information, such as name, address, email address, and telephone number. The contact information can also include advanced contact information, such as registration and activity information for each communications device associated with the group of subscribers, location information, hotspot information, points of interest information, and social networking information. Methods are provided herein that permit subscribers to introduce each other and obtain contact information securely. Methods are also provided herein that permit subscribers to request further contact information after a communication session is terminated. | 09-25-2008 |
20090022285 | Dynamic Voicemail Receptionist System - A voicemail receptionist system includes a memory and a processor. The memory can store data relating to one or more users. An incoming communication can be handled by the voicemail receptionist system and provided with functionality based upon a user's preferences, for example. The data stored by the voicemail receptionist system can be updated at any time, or automatically updated upon updating of the data, or upon occurrence of a trigger event. Voicemail receptionist functionality can include standard voicemail system functionality as well as functionality relating to email, text messaging, MMS messaging, calendar features, schedule announcements, location data, as well as other features. | 01-22-2009 |
20090024633 | Systems and methods for remote deletion of contact information - An exemplary system for providing remote deletion of contact information includes a first device associated with a first user. The first device is configured to generate and send a delete request message to a second device. In some embodiments, the delete request message includes a request to delete contact information for the first user from the second device. The second device can be configured to receive the delete request message and delete the first user's contact information. A method for providing remote deletion of contact information includes a delete request message being generated at a first device, associated with a first user. The delete request message can include a request to delete contact information for the first user. The first device can send the delete request message to a second device. The delete request message can instruct the second device to delete the first user's contact information. | 01-22-2009 |
20090285129 | Systems and Methods for Delayed Message Delivery - A system for delayed message delivery can include an IP Multimedia Subsystem (IMS) network that is in communication with at least one of a first user equipment and a second user equipment, and a message application server. The message application server can be configured to receive a message sent from the first user equipment, store the message temporarily in accordance with a time parameter, and send the message to a gateway when the time parameter is satisfied. The gateway can be configured to receive a message formatted in accordance with a first protocol used by the IMS network and convert the message into a format in accordance with a second protocol used by a message center. The message center can be configured to receive the message formatted in accordance with the second protocol and forward the message to the second user equipment. Other systems for delayed message delivery and corresponding methods are disclosed. | 11-19-2009 |
20100287241 | Enhanced Messaging Feature - The present disclosure provides various systems and methods for providing enhanced messaging features. An exemplary method for providing a predictive response messaging feature includes receiving a message from a first device ( | 11-11-2010 |
20120066177 | Systems and Methods for Remote Deletion of Contact Information - An exemplary system for providing remote deletion of contact information includes a first device associated with a first user. The first device is configured to generate and send a delete request message to a second device. In some embodiments, the delete request message includes a request to delete contact information for the first user from the second device. The second device can be configured to receive the delete request message and delete the first user's contact information. A method for providing remote deletion of contact information includes a delete request message being generated at a first device, associated with a first user. The delete request message can include a request to delete contact information for the first user. The first device can send the delete request message to a second device. The delete request message can instruct the second device to delete the first user's contact information. | 03-15-2012 |
20150201074 | Dynamic Voicemail Receptionist System - A voicemail receptionist system includes a memory and a processor. The memory can store data relating to one or more users. An incoming communication can be handled by the voicemail receptionist system and provided with functionality based upon a user's preferences, for example. The data stored by the voicemail receptionist system can be updated at any time, or automatically updated upon updating of the data, or upon occurrence of a trigger event. Voicemail receptionist functionality can include standard voicemail system functionality as well as functionality relating to email, text messaging, MMS messaging, calendar features, schedule announcements, location data, as well as other features. | 07-16-2015 |
Patent application number | Description | Published |
20080296690 | Metal interconnect System and Method for Direct Die Attachment - Provided herein is an exemplary embodiment of a semiconductor chip for directly connecting to a carrier. The chip includes a metal layer applied to a top surface of the chip; a passivation layer applied over the metal layer such that portions of the passivation layer is selectively removed to create one or more openings (“bond pads”) exposing portions of the metal layer and one or more solderable metal contact regions formed on each of the one or more openings. The solderable metal contact regions electrically connect to the carrier when the chip is positioned face down on the carrier, supplied with a thin layer of solder and heated. | 12-04-2008 |
20090014791 | Lateral Power MOSFET With Integrated Schottky Diode - A semiconductor device includes a substrate. The substrate includes a semiconductor material. An electrically isolated region is formed over the substrate. A metal-oxide-semiconductor field-effect transistor (MOSFET) is formed over the substrate within the electrically isolated region. The electrically isolated region includes a trench formed around the electrically isolated region. An insulative material such as silicon dioxide (SiO2) may be deposited into the trench. A diode is formed over the substrate within the electrically isolated region. In one embodiment, the diode is a Schottky diode. A metal layer may be formed over a surface of the substrate to form an anode of the diode. A first electrical connection is formed between a source of the MOSFET and an anode of the diode. A second electrical connection is formed between a drain of the MOSFET and a cathode of the diode. | 01-15-2009 |
20090283826 | Semiconductor Device and Method of Forming High Voltage SOI Lateral Double Diffused MOSFET with Shallow Trench Insulator - A semiconductor device has a buried oxide layer formed over a substrate. An active silicon layer is formed over the buried oxide layer. A drain region is formed in the active silicon layer. An LDD drift region is formed in the active silicon layer adjacent to the drain region. The drift region has a graded doping distribution. A co-implant region is formed in the active silicon. A source region is formed in the co-implant region. A shallow trench insulator is formed along a top surface of the LDD drift region. The shallow trench isolator has a length less than the LDD drift region. The shallow trench insulator terminates under the polysilicon gate and within the LDD drift region. A polysilicon gate is formed above the active silicon layer between the source region and LDD drift region and at least partially overlapping the shallow trench insulator. | 11-19-2009 |
20090321784 | Semiconductor Device and Method of Forming Lateral Power MOSFET with Integrated Schottky Diode on Monolithic Substrate - A monolithic semiconductor device has an insulating layer formed over a first substrate. A second substrate is disposed over the first insulating layer. A power MOSFET with body diode is formed over the second substrate. A Schottky diode is formed over the second substrate in proximity to the MOSFET. An insulation trench is formed within the second substrate between the MOSFET and Schottky diode. The isolation trench surrounds the MOSFET and first Schottky diode. A first electrical connection is formed between a source of the MOSFET and an anode of the Schottky diode. A second electrical connection is formed between a drain of the MOSFET and a cathode of the Schottky diode. The Schottky diode reduces charge build-up within the body diode and reverse recovery time of the first power MOSFET. The power MOSFET and integrated Schottky can be used in power conversion or audio amplifier circuit. | 12-31-2009 |
20110140200 | Lateral Power MOSFET With Integrated Schottky Diode - A semiconductor device includes a substrate having a first region and a second region. The first region is electrically isolated from the second region. The semiconductor device further includes a lateral field-effect transistor (FET) disposed within the first region. The lateral FET includes a first terminal and a second terminal. The semiconductor device further includes a diode disposed within the second region, the diode including a plurality of anode regions and a plurality of cathode regions. The semiconductor device further includes a first electrical connection between the first terminal of the lateral FET and the anode regions of the diode, and a second electrical connection between the second terminal of the lateral FET and the cathode regions of the diode. The first and second electrical connections are disposed over a surface of the substrate. | 06-16-2011 |
20120205740 | Lateral Power MOSFET With Integrated Schottky Diode - A semiconductor device includes a substrate having a first region and a second region. The first region is electrically isolated from the second region. The semiconductor device further includes a lateral field-effect transistor (FET) disposed within the first region. The lateral FET includes a first terminal and a second terminal. The semiconductor device further includes a diode disposed within the second region, the diode including a plurality of anode regions and a plurality of cathode regions. The semiconductor device further includes a first electrical connection between the first terminal of the lateral FET and the anode regions of the diode, and a second electrical connection between the second terminal of the lateral FET and the cathode regions of the diode. The first and second electrical connections are disposed over a surface of the substrate. | 08-16-2012 |
20120248601 | Semiconductor Device and Method of Forming a Land Grid Array Flip Chip Bump System - A semiconductor device has a semiconductor wafer with a plurality of semiconductor die including a plurality of contact pads. An insulating layer is formed over the semiconductor wafer and contact pads. An under bump metallization (UBM) is formed over and electrically connected to the plurality of contact pads. A mask is disposed over the semiconductor wafer with a plurality of openings aligned over the plurality of contact pads. A conductive bump material is deposited within the plurality of openings in the mask and onto the UBM. The mask is removed. The conductive bump material is reflowed to form a plurality of bumps with a height less than a width. The plurality of semiconductor die is singulated. A singulated semiconductor die is mounted to a substrate with bumps oriented toward the substrate. Encapsulant is deposited over the substrate and around the singulated semiconductor die. | 10-04-2012 |
20120313147 | Semiconductor Device and Method of Forming a Power MOSFET With Interconnect Structure Silicide Layer and Low Profile Bump - A semiconductor device has a substrate with a source region and a drain region formed on the substrate. A silicide layer is disposed over the source region and drain region. A first interconnect layer is formed over the silicide layer and includes a first runner connected to the source region and second runner connected to the drain region. A second interconnect layer is formed over the first interconnect layer and includes a third runner connected to the first runner and a fourth runner connected to the second runner. An under bump metallization (UBM) is formed over and electrically connected to the second interconnect layer. A mask is disposed over the substrate with an opening in the mask aligned over the UBM. A conductive bump material is deposited within the opening in the mask. The mask is removed and the conductive bump material is reflowed to form a bump. | 12-13-2012 |
20130134598 | Semiconductor Device and Method of Forming a Power MOSFET With Interconnect Structure to Achieve Lower RDSON - A semiconductor device has a substrate and gate structure over the substrate. A source region is formed in the substrate adjacent to the gate structure. A drain region in the substrate adjacent to the gate structure opposite the source region. An interconnect structure is formed over the substrate by forming a conductive plane electrically connected to the source region, and forming a conductive layer within openings of the conductive plane and electrically connected to the drain region. The interconnect structure can be formed as stacked conductive layers laid out in alternating strips. The conductive plane extends under a gate terminal of the semiconductor device. An insulating layer is formed over the substrate and a field plate is formed in the insulating layer. The field plate is electrically connected the source terminal. A stress relief layer is formed over a surface of the substrate opposite the gate structure. | 05-30-2013 |
20130313633 | Semiconductor Device and Method of Forming Junction Enhanced Trench Power Mosfet having Gate Structure Embedded within Trench - A semiconductor device has a substrate and trench formed partially through the substrate. A drain region is formed in the substrate as a second surface of the substrate. An epitaxial region is formed in the substrate over the drain region. A vertical drift region is formed along a sidewall of the trench. An insulating material is deposited within the trench. A channel region is formed along the sidewall of the trench above the insulating material. The channel region is separated from the insulating material. A gate structure is formed within the trench adjacent to the channel region. The gate structure includes an insulating layer formed along the sidewall of the trench adjacent to the channel region and polysilicon layer formed within the trench over the insulating layer. A source region is formed in a first surface of the substrate contacting the channel region. | 11-28-2013 |
20130313640 | Semiconductor Device and Method of Forming Junction Enhanced Trench Power Mosfet - A semiconductor device has a substrate and first and second gate structures formed over a first surface of the substrate. A drain region is formed in the substrate as a second surface of the substrate. An epitaxial region is formed in the substrate over the drain region. A sidewall spacer is formed over the first and second gate structures. A lateral LDD region is formed between the first and second gate structures. A trench is formed through the lateral LDD region and partially through the substrate self-aligned to the sidewall spacer. A vertical drift region is formed along a sidewall of the trench. An insulating material is deposited in the trench. A first source region is formed adjacent to the first gate structure opposite the lateral LDD region. A second source region is formed adjacent to the second gate structure opposite the lateral LDD region. | 11-28-2013 |
20140231901 | Monolithic MOSFET and Schottky Diode for Mobile Phone Boost Converter - A cell phone has a plurality of interconnected electronic components for performing the electrical functions of the phone. A DC/DC converter provides an operating voltage which is applied to power supply terminals of the plurality of interconnected electronic components. The DC/DC converter uses a monolithic semiconductor device containing a power metal oxide semiconductor field effect transistor (MOSFET) and Schottky diode. The semiconductor device has the lateral diffused MOSFET formed on a surface of the semiconductor device. The MOSFET is formed with a plurality conduction fingers. The Schottky diode is also formed on the surface of the semiconductor device and integrated between the plurality of conduction fingers of the MOSFET. The drain of the MOSFET is connected to the anode of the diode on the surface of the monolithic semiconductor device. | 08-21-2014 |
20150021686 | Device Structure and Methods of Forming Superjunction Lateral Power MOSFET with Surrounding LDD - A semiconductor device has a substrate and a gate formed over the substrate. An LDD region is formed in the substrate adjacent to the gate. A superjunction is formed in the LDD region while a portion of the LDD region remains between the superjunction and gate. A mask is formed over the substrate. A first region is doped with a first type of dopant using the mask. A stripe is doped with a second type of dopant using a portion of the mask. A drain contact region is formed in the substrate. The first region extends to the drain contact region. The first region and stripe are formed using chain implants. A source field plate and drain field plate are formed over the substrate. A trench is formed in the substrate. A source contact region is formed in the trench. | 01-22-2015 |
Patent application number | Description | Published |
20090123441 | Engineered Dendritic Cells and Uses for the Treatment of Cancer - This invention provides the field of therapeutics. Most specifically present invention provides methods of generating in vitro engineered dendritic cells conditionally expressing interleukin-12 (IL-12) under the control of a gene expression modulation system in the presence of activating ligand and uses for therapeutic purposes in animals including human. | 05-14-2009 |
20100008940 | PEPTIDE ANALOGS CAPABLE OF ENHANCING STIMULATION OF A GLIOMA-SPECIFIC CTL RESPONSE - The invention provides a peptide derived from the interleukin-13 receptor α2, which serves as a HLA-A2-restricted cytotoxic T lymphocyte (CTL) epitope. The invention can be used as a vaccine for glioma and can be formulated into compositions for medical or veterinary use. In addition, the invention provides the use of a peptide derived from the Eph family of tyrosine kinase receptors which can be also used as a vaccine for glioma and can be formulated into compositions for medical or veterinary use. | 01-14-2010 |
20100322909 | TH1-ASSOCIATED MICRORNAS AND THEIR USE FOR TUMOR IMMUNOTHERAPY - Described herein is the identification of miRNAs (miRs) that are up-regulated in Th1 cells compared to Th2 cells (referred to herein as Th1-associated miRs). In particular, the miR-17-92 gene cluster was found to exhibit significantly greater expression in Th1 cells. Over-expression of miR-17-92 in T cells promotes the Th1 phenotype. Thus, the use of Th1-associated miRs for cancer immunotherapy is described. Provided herein are isolated T cells containing a heterologous nucleic acid molecule encoding a Th1-associated miR, such as the miR17-92 gene cluster, or a portion thereof. In some embodiments, the T cell is a tumor antigen (TA)-specific T cell, such as a TA-specific CTL. Further provided is a method of treating cancer in a subject by selecting a subject with cancer and administering to the subject an isolated T cell as disclosed herein. Also provided is a method of treating a subject with cancer by transfecting isolated T cells obtained from the subject with a heterologous nucleic acid molecule encoding a Th1-associated miR and administering the transfected T cells to the subject. In some embodiments of the method, the heterologous nucleic acid molecule encodes the miR-17-92 transcript or a portion thereof. In some embodiments, the isolated T cell is a TA-specific T cell, such as a CTL. | 12-23-2010 |
20120114620 | Engineered Dendritic Cells and Uses for the Treatment of Cancer - This invention provides the field of therapeutics. Most specifically present invention provides methods of generating in vitro engineered dendritic cells conditionally expressing interleukin-12 (IL-12) under the control of a gene expression modulation system in the presence of activating ligand and uses for therapeutic purposes in animals including human. | 05-10-2012 |
20120301448 | TH1-ASSOCIATED MICRORNAS AND THEIR USE FOR TUMOR IMMUNOTHERAPY - Described herein is the identification of miRNAs (miRs) that are up-regulated in Th1 cells compared to Th2 cells (referred to herein as Th1-associated miRs). In particular, the miR-17-92 gene cluster was found to exhibit significantly greater expression in Th1 cells. Over-expression of miR-17-92 in T cells promotes the Th1 phenotype. Thus, the use of Th1-associated miRs for cancer immunotherapy is described. Provided herein are isolated T cells containing a heterologous nucleic acid molecule encoding a Th1-associated miR, such as the miR17-92 gene cluster, or a portion thereof. Further provided is a method of treating cancer in a subject by administering to the subject an isolated T cell as disclosed herein. Also provided is a method of treating a subject with cancer by transfecting isolated T cells obtained from the subject with a heterologous nucleic acid molecule encoding a Th1-associated miR and administering the transfected T cells to the subject. | 11-29-2012 |
20130149290 | Engineered Dendritic Cells and Uses for the Treatment of Cancer - This invention provides the field of therapeutics. Most specifically present invention provides methods of generating in vitro engineered dendritic cells conditionally expressing interleukin-12 (IL-12) under the control of a gene expression modulation system in the presence of activating ligand and uses for therapeutic purposes in animals including human. | 06-13-2013 |
20130295046 | INTERLEUKIN-13 RECEPTOR ALPHA 2 PEPTIDE-BASED BRAIN CANCER VACCINES - Provided herein are interleukin-13 receptor α2 peptide-based brain cancer vaccines and methods for treating and vaccinating against brain cancer comprising administering to patients in need thereof interleukin-13 receptor α2 peptide-based brain cancer vaccines. Also provided herein are regimens comprising interleukin-13 receptor α2 peptides and at least one additional peptide and/or immunostimulant. | 11-07-2013 |
20130344039 | TH1-ASSOCIATED MICRORNAS AND THEIR USE FOR TUMOR IMMUNOTHERAPY - Described herein is the identification of miRNAs (miRs) that are up-regulated in Th1 cells compared to Th2 cells (referred to herein as Th1-associated miRs). In particular, the miR-17-92 gene cluster was found to exhibit significantly greater expression in Th1 cells. Over-expression of miR-17-92 in T cells promotes the Th1 phenotype. Thus, the use of Th1-associated miRs for cancer immunotherapy is described. Provided herein are isolated T cells containing a heterologous nucleic acid molecule encoding a Th1-associated miR, such as the miR17-92 gene cluster, or a portion thereof. Further provided is a method of treating cancer in a subject by administering to the subject an isolated T cell as disclosed herein. Also provided is a method of treating a subject with cancer by transfecting isolated T cells obtained from the subject with a heterologous nucleic acid molecule encoding a Th1-associated miR and administering the transfected T cells to the subject. | 12-26-2013 |
20140322275 | TREATMENT OF CANCER USING HUMANIZED ANTI-EGFRvIII CHIMERIC ANTIGEN RECEPTOR - The invention provides compositions and methods for treating diseases associated with expression of EGFRvIII. The invention also relates to chimeric antigen receptor (CAR) specific to EGFRvIII, vectors encoding the same, and recombinant T cells comprising the anti-EGFRvIII CAR. The invention also includes methods of administering a genetically modified T cell expressing a CAR that comprises an anti-EGFRvIII binding domain. | 10-30-2014 |
20150258185 | INTERLEUKIN-13 RECEPTOR ALPHA 2 PEPTIDE-BASED BRAIN CANCER VACCINES - Provided herein are interleukin-13 receptor α2 peptide-based brain cancer vaccines and methods for treating and vaccinating against brain cancer comprising administering to patients in need thereof interleukin-13 receptor α2 peptide-based brain cancer vaccines. Also provided herein are regimens comprising interleukin-13 receptor α2 peptides and at least one additional peptide and/or immunostimulant. | 09-17-2015 |
Patent application number | Description | Published |
20100028326 | DIAGNOSIS OF HYPERINSULINEMIA AND TYPE II DIABETES AND PROTECTION AGAINST SAME BASED ON PROTEINS DIFFERENTIALLY EXPRESSED IN SERUM - Mouse proteins differentially expressed in serum, in comparisons of normal vs. hyperinsulinemic, hyperinsulinemic vs. type 2 diabetic, and normal vs. type 2 diabetic white adipose tissue have been identified, as have corresponding human proteins. The human molecules, or antagonists thereof, may be used for protection against hyperinsulinemia or type 2 diabetes, or their sequalae. | 02-04-2010 |
20100029548 | GLYCOPROTEINS PRODUCED IN PLANTS AND METHODS OF THEIR USE - Methods of increasing the yield in plant expression of recombinant proteins comprising: engineering glycosylation sites into cloned genes or cDNAs for proteins using codons that drive post-translational modifications in plants; and engineering the cloned genes or cDNAs to contain a plant secretory signal sequence that targets the gene products (protein) for secretion. The methods result in increased recombinant glycosylated protein yields. Proteins produced according to these methods are disclosed. | 02-04-2010 |
20110230404 | Glycoproteins Produced in Plants and Methods of Their Use - Methods of increasing the yield in plant expression of recombinant proteins comprising engineering glycosylation sites into cloned genes or cDNAs for proteins using codons that drive post-translational modifications in plants; and engineering the cloned genes or cDNAs to contain a plant secretory signal sequence that targets the gene products (protein) for secretion. The methods result in increased recombinant glycosylated protein yields. Proteins produced according to these methods are disclosed. | 09-22-2011 |
20110300641 | PROTEIN ISOFORMS FOR DIAGNOSIS - Several aspects of this invention relate to diagnosis of diabetic states in a mammal using protein isoforms. In some aspects, it relates to a method for determining the diabetic state of a mammal. This method can include, for example, (a) measuring the serum concentration of one or more protein isoforms, (b) analyzing the serum concentration of the one or more protein isoforms, and (c) determining the diabetic state of the mammal. Other aspects include kits used to perform the method. Further aspects are the isolated protein isoforms themselves, and their methods of isolation. | 12-08-2011 |
20140024806 | Glycoproteins Produced in Plants and Methods of Their Use - Methods of increasing the yield in plant expression of recombinant proteins comprising engineering glycosylation sites into cloned genes or cDNAs for proteins using codons that drive post-translational modifications in plants; and engineering the cloned genes or cDNAs to contain a plant secretory signal sequence that targets the gene products (protein) for secretion. The methods result in increased recombinant glycosylated protein yields. Proteins produced according to these methods are disclosed. | 01-23-2014 |
Patent application number | Description | Published |
20150331059 | BATTERY MONITORING DEVICE, POWER STORAGE SYSTEM, AND CONTROL SYSTEM - A controller of a battery monitoring apparatus, said controller calculating the amount of heat generated inside a battery on the basis of information about the electric current which flows out of or flows into the battery. Furthermore, the controller calculates the amount of heat discharged from the surface of the battery, said amount being calculated on the basis of temperature information about at least one from among the surface of the battery and a substance in the vicinity of the battery. In addition, the controller calculates the temperature inside the battery on the basis of information about the amount of heat generated, and information about the amount of heat discharged. | 11-19-2015 |
20150369870 | APPARATUS AND METHOD FOR ESTIMATING POWER STORAGE DEVICE DEGRADATION - Switches change the resistance value of a charge/discharge circuit in a period from starting a discharging at an upper limit voltage until the voltage reaches a lower limit voltage. An electric charge estimator computes electric charge by time-integrating current from a start of the discharging to an arbitrarily determined time, and computes a relationship between electric charge and voltage of a power storage device. An internal resistance estimator computes internal resistance based on voltages and currents of the storage device at times when resistance values are different. An electric energy estimator computes a relationship between electric charge and open voltage based on electric charge, voltage, current and internal resistance of the storage device. During charging or discharging of the storage device, the electric energy estimator estimates the electric energy of the power storage device based on the electric charge, the open voltage, the internal resistance, and the charge/discharge current. | 12-24-2015 |