Patent application number | Description | Published |
20080216415 | POST-CMP TREATING LIQUID AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING THE SAME - Post-CMP treating liquids are provided, one of which includes water, an amphoteric surfactant, an anionic surfactant, a complexing agent, resin particles having carboxylic group and sulfonyl group on their surfaces, a primary particle diameter thereof ranging from 10 to 60 nm, and tetramethyl ammonium hydroxide. Another includes water, polyphenol, an anionic surfactant, ethylene diamine tetraacetic acid, resin particles having carboxylic group and sulfonyl group on their surfaces, a primary particle diameter thereof ranging from 10 to 60 nm, and tetramethyl ammonium hydroxide. Both of the treating liquids have a pH ranging from 4 to 9, and exhibit a polishing rate both of an insulating film and a conductive film at a rate of 10 nm/min or less. | 09-11-2008 |
20090061626 | Method of manunfacturing semiconductor device - Disclosed is a method for manufacturing a semiconductor device comprising forming a hydrophobic interlayer insulating film having a relative dielectric constant of 3.5 or less above a semiconductor substrate, forming a recess in the interlayer insulating film, depositing a conductive material above the interlayer insulating film having the recess to form a conductive layer, selectively removing the conductive material deposited above the interlayer insulating film by polishing to expose a surface of the interlayer insulating film while leaving the conductive material in the recess, and subjecting the surface of the interlayer insulating film having the recess filled with the conductive material to pressure washing using a resin member and an alkaline washing liquid containing an inorganic alkali and exhibiting a pH of more than 9. | 03-05-2009 |
20090068840 | POLISHING LIQUID AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A polishing liquid is provided, which includes abrasive grains and a surfactant. The abrasive grains contain a first colloidal silica having an average primary particle diameter of 45-80 nm and a second colloidal silica having an average primary particle diameter of 10-25 nm. The weight w | 03-12-2009 |
20090184415 | MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device comprises: providing a first insulating film whose relative dielectric constant is at most a predetermined value above a substrate; providing a second insulating film whose relative dielectric constant is greater than the predetermined value on a surface of the first insulating film; forming a recess for a wire through the second insulating film and extending into the first insulating film, and also forming a recess for a dummy wire through the second insulating film and extending into the first insulating film spaced from a formed area of the recess for the wire; providing a conductive material inside the recess for the wire and the recess for the dummy wire; and providing a wire inside the recess for the wire and providing a dummy wire inside the recess for the dummy wire by polishing and removing the conductive material. | 07-23-2009 |
20100093585 | POST-CMP TREATING LIQUID AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING THE SAME - A post CMP treating liquid is provided, which includes water, resin particles having, on their surfaces, carboxylic group and sulfonyl group, and a primary particle diameter ranging from 10 to 60 nm, a first surfactant having carboxylic group, a second surfactant having sulfonyl group, and tetramethyl ammonium hydroxide. The resin particles are incorporated at a concentration ranging from 0.01 to 1 wt %. The treating liquid has a pH ranging from 4 to 9, and exhibits a polishing rate both of an insulating film and a conductive film at a rate of 10 nm/min or less. | 04-15-2010 |
20110062374 | CMP slurry for metallic film, polishing method and method of manufacturing semiconductor device - A CMP slurry for metallic film is provided, which includes water, 0.01 to 0.3 wt %, based on a total quantity of the slurry, of polyvinylpyrrolidone having a weight average molecular weight of not less than 20,000, an oxidizing agent, a protective film-forming agent containing a first complexing agent for forming a water-insoluble complex and a second complexing agent for forming a water-soluble complex, and colloidal silica having a primary particle diameter ranging from 5 to 50 nm. | 03-17-2011 |
20110195888 | POST-CMP TREATING LIQUID AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING THE SAME - Post-CMP treating liquids are provided, one of which includes water, an amphoteric surfactant, an anionic surfactant, a complexing agent, resin particles having carboxylic group and sulfonyl group on their surfaces, a primary particle diameter thereof ranging from 10 to 60 nm, and tetramethyl ammonium hydroxide. Another includes water, polyphenol, an anionic surfactant, ethylene diamine tetraacetic acid, resin particles having carboxylic group and sulfonyl group on their surfaces, a primary particle diameter thereof ranging from 10 to 60 nm, and tetramethyl ammonium hydroxide. Both of the treating liquids have a pH ranging from 4 to 9, and exhibit a polishing rate both of an insulating film and a conductive film at a rate of 10 nm/min or less. | 08-11-2011 |
20120034846 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - According to one embodiment, a semiconductor device manufacturing method is disclosed. The method can include polishing a film on a semiconductor substrate by pressing the film against a polishing pad. Polishing the film comprises performing first polishing in which an entrance temperature of the polishing pad is adjusted to 40° C. (inclusive) to 50° C. (inclusive), and an exit temperature of the polishing pad is adjusted to be higher by 5° C. or more than the entrance temperature. Polishing the film comprises performing second polishing in which the entrance temperature is adjusted to 30° C. or less, and the exit temperature is adjusted to be higher by 5° C. or more than the entrance temperature. | 02-09-2012 |
Patent application number | Description | Published |
20080307642 | METHOD OF MANUFACTURING ELECTRONIC COMPONENT INTEGRATED SUBSTRATE - There are provided the steps of mounting a semiconductor chip on a first substrate, providing an underfill resin between the semiconductor chip and the first substrate, forming a through hole on a second substrate, providing an electrode on the second substrate, bonding the first and second substrates to include the semiconductor chip through the electrode, and filling a sealing resin between the first and second substrates at a filling pressure capable of correcting a warpage generated on the semiconductor chip and the first substrate while discharging air from the through hole. | 12-18-2008 |
20100155992 | MOLD RESIN MOLDING METHOD AND MOLD RESIN MOLDING APPARATUS - A mold resin molding method is provided with: providing a semiconductor device including a first wiring board and a second wiring board electrically connected to the first wiring board through a solder ball; providing a metal mold including a die plate which is independently provided to enable an approach/separation to/from the second wiring board; inserting the semiconductor device into a cavity of the metal mold; abutting the die plate on a surface side of the second wiring board through a release film; injecting a mold resin in a void between the first wiring board and the second wiring board while applying a first pressure from the die plate to the second wiring board; and further injecting the mold resin in the void while applying a second pressure which is higher than the first pressure from the die plate to the second wiring board. | 06-24-2010 |
20120319274 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE - A circuit substrate having a mounting surface on which a semiconductor chip is mounted and at least one connection pad formed on the mounting surface is connected to a support plate having at least one mounting portion with a diameter larger than a diameter of the connection pad, through a truncated-cone-shaped solder layer which is formed from at least one solder ball on the basis of a difference between the diameter of the mounting portion and the diameter of the connection pad. The resin layer is formed between the mounting surface of the circuit substrate and the support plate and the support plate is subsequently removed, whereby a truncated-cone-shaped via is formed in the resin layer along the truncated-cone-shaped solder layer. A reflow process is thereafter performed, whereby the truncated-cone-shaped solder layer is formed into a spherical solder layer within the truncated-cone-shaped via. | 12-20-2012 |
20140054773 | ELECTRONIC COMPONENT BUILT-IN SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - An electronic component built-in substrate, includes a lower wiring substrate, an electronic component mounted on the lower wiring substrate, an intermediate wiring substrate including an opening portion in which the electronic component is mounted, and arranged in a periphery of the electronic component, and connected to the lower wiring substrate via a first conductive ball, an upper wiring substrate arranged over the electronic component and the intermediate wiring substrate, and connected to the intermediate wiring substrate via a second conductive ball, and a resin filled into respective areas between the lower wiring substrate, the intermediate wiring substrate, and the upper wiring substrate, and sealing the electronic component, wherein the first conductive ball and the second conductive ball are arranged in displaced positions mutually. | 02-27-2014 |
20140063764 | ELECTRONIC COMPONENT INCORPORATED SUBSTRATE - An electronic component incorporated substrate includes a first substrate and a second substrate that are electrically connected to each other by a spacer unit. An electronic component is mounted on the first substrate and arranged between the first substrate and the second substrate. An encapsulating resin fills a space between the first substrate and the second substrate to encapsulate the electronic component. The spacer unit includes a stacked structure of a metal post and a solder ball stacked in a stacking direction of the first substrate and the second substrate. The spacer unit further includes an insulation layer that is formed on the second substrate and covers a side wall of the metal post. | 03-06-2014 |
20140063768 | ELECTRONIC COMPONENT INCORPORATED SUBSTRATE AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT INCORPORATED SUBSTRATE - An electronic component incorporated substrate includes a first substrate and a second substrate electrically connected to each other by a spacer unit. An electronic component is mounted on the first substrate and arranged between the first substrate and the second substrate. A first encapsulating resin is formed between the first substrate and the second substrate to encapsulate the electronic component. A second encapsulating resin is formed on a first surface of the first encapsulating resin to fill a space between the first encapsulating resin and the second substrate. The spacer unit includes a stacked structure of a first solder ball, a metal post, and a second solder ball stacked in a stacking direction of the first substrate and the second substrate. | 03-06-2014 |