Niset
Juilen Niset, Brussels BE
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20140219443 | GENERATION OF CRYPTOGRAPHIC KEYS - A method is provided of generating and distributing secret random data. The method requires a plurality of participating parties each to own an identical private-key generation device and to request a random signal over a shared publication communication network. At each iteration of the method, the parties process the public random signal with the internal states of their secret-key generation devices using two functions, the output of the first function being generated secret random data and the output of the second function being a new internal state. | 08-07-2014 |
Julien Niset, Ixelles BE
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20120221615 | NETWORK DISTRIBUTED QUANTUM RANDOM NUMBER GENERATION - A quantum random number generation system includes a source of light output as a plurality of coherent states such that each state has an indeterminate number of photons, a photodetector arranged to receive the light output from the light source and to generate a photocurrent dependent on the number of photons in each coherent state, and processing circuitry connected to receive the photocurrent and arranged to convert it to generate a sequence of random numbers. | 08-30-2012 |
Julien Niset, Brussels BE
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20150089230 | RANDOM NUMBER DISTRIBUTION - A computer device includes means for receiving a request for at least one random number; means for generating a message authentication code from the identifier and at least one random number to be transmitted; and means for creating a message for transmission, including the random number in plain text and the message authentication code. A random number distribution system includes the computer device; a communication network; and a receiver device connectable to the computer device via the network to transmit requests for random numbers to the computer device and to receive messages from the computer device. | 03-26-2015 |
Martin Niset, Seattle, WA US
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20130328117 | FLOATING GATE NON-VOLATILE MEMORY BIT CELL - A solid-state non-volatile memory (NVM) device includes a memory bit cell. The memory bit cell includes a field effect transistor (FET) fabricated on a substrate and having a floating gate. The floating gate includes a thick oxide layer. The FET includes drain and source, each fabricated within the substrate and coupled to the floating gate and a channel region with native doping. The drain is fabricated to have a halo region. A method for fabricating a solid-state NVM device includes fabricating solid state device including NVM bit cell which provides multiple storage and includes an FET on substrate. The method also includes fabricating floating gate of the FET including thick gate oxide layer, and fabricating drain and source of FET within the substrate, drain and source coupled to the floating gate and channel region with native doping. Further, the method includes fabricating halo region within the substrate at the drain. | 12-12-2013 |