Patent application number | Description | Published |
20090008706 | Power Semiconductor Devices with Shield and Gate Contacts and Methods of Manufacture - A semiconductor power device includes active trenches that define an active area and an edge area that is located outside of the active area. The active trenches include a lower shield poly, an upper gate poly, a first oxide layer and a second oxide layer wherein the first oxide layer separates the lower shield poly from the upper gate poly and the second oxide layer covers the upper gate poly. The lower shield poly, upper gate poly, first oxide layer and second oxide layer conform to the shape of the active trench and extend from the active trench to a surface of the edge area. The edge area includes a first opening that extends through the first oxide layer to the lower shield poly and a second opening that extends through the second oxide layer to the upper gate poly. The first opening is filled with a conductive material that makes electrical contact with the lower shield poly and the second opening is filled with conductive material that makes electrical contact with the upper gate poly. The lower shield poly is electrically insulated from the substrate. The second oxide layer can be directly over the upper gate poly, the upper gate poly can be directly over the first oxide layer, the first oxide layer can be directly over the lower shield poly, and the first opening can be lower than the second opening. The device can further include a perimeter trench with extensions in the longitudinal direction that are staggered with respect to the active trenches so that there can be offset between the extensions of the perimeter trench and the active trenches. | 01-08-2009 |
20090008709 | Power Semiconductor Devices with Trenched Shielded Split Gate Transistor and Methods of Manufacture - A semiconductor power device includes a drift region of a first conductivity type, a well region extending above the drift region and having a second conductivity type opposite the first conductivity type, active trenches extending through the well region and into the drift region where the active trenches define an active area. Inside each of the active trenches is formed a first conductive gate electrode disposed along and insulated from a first trench sidewall, a second conductive gate electrode disposed along and insulated from a second trench sidewall, and a conductive shield electrode disposed between the first and second conductive gate electrodes, wherein the shield electrode is insulated from and extends deeper inside the trench than the first and second conductive gate electrodes. The device also includes source regions having the first conductivity type formed inside the well region and adjacent the active trenches. Electrical contact to the conductive shield electrode can be made inside the active area. The device can also include a perimeter trench extending at least partially around the active trenches such that at least some of the active trenches are perpendicular to the perimeter trench, gate fingers extending from a perimeter gate poly runner located in said perimeter trench, and shield poly fingers extending from a perimeter shield poly runner located in the perimeter trench. The gate fingers are staggered with respect to the shield poly fingers. | 01-08-2009 |
20090230465 | Trench-Gate Field Effect Transistors and Methods of Forming the Same - A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region. | 09-17-2009 |
20100258862 | TRENCH-GATE FIELD EFFECT TRANSISTOR WITH CHANNEL ENHANCEMENT REGION AND METHODS OF FORMING THE SAME - A field effect transistor includes a body region of a first conductivity type in a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminating within the semiconductor region. A source region of the second conductivity type extends in the body region adjacent the gate trench. The source region and an interface between the body region and the semiconductor region define a channel region therebetween which extends along the gate trench sidewall. A channel enhancement region of the second conductivity type is formed adjacent the gate trench. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region. | 10-14-2010 |
20110177662 | Method of Forming Trench-Gate Field Effect Transistors - A method of forming a field effect transistor includes: forming a trench in a semiconductor region; forming a shield electrode in the trench; performing an angled sidewall implant of impurities of the first conductivity type to form a channel enhancement region adjacent the trench; forming a body region of a second conductivity type in the semiconductor region; and forming a source region of the first conductivity type in the body region, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the trench sidewall. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region. | 07-21-2011 |
20110312138 | Methods of Manufacturing Power Semiconductor Devices with Trenched Shielded Split Gate Transistor - Methods of manufacturing power semiconductor devices include forming trenches in a substrate, depositing a shield oxide layer that conforms to the trenches, depositing a gate polysilicon layer into the trenches, etching the gate polysilicon layer so that the gate polysilicon layer is recessed in the trench, etching the shield oxide layer so that the shield oxide layer is recessed in the trench and lower than the gate polysilicon layer, depositing a layer of gate oxide across the top of the substrate, sidewalls of the trenches and troughs inside the trenches leaving a recess, depositing shield polysilicon in the recess, etching the shield polysilicon layer so that the shield polysilicon layer is recessed in the trench and higher than the gate polysilicon layer, forming a well region, and forming a source region. The well region can be formed with a −p-well implant. The source region can be performed with an n+ source implant. | 12-22-2011 |
20110312166 | Methods of Manufacturing Power Semiconductor Devices with Shield and Gate Contacts - Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active trench, forming a second oxide layer and second conductive layer. The second conductive layer does not extend completely over the first conductive layer in a first region outside of the active trench. The methods further include forming a third oxide layer over the second conductive layer, etching a first opening through the third oxide layer exposing the second conductive layer outside the active trench, etching a second opening through the second oxide layer outside the active trench in the first region exposing the first conductive layer but not the second conductive layer, and filling the first and second openings with conductive material. | 12-22-2011 |
20120104490 | Trench-Gate Field Effect Transistors and Methods of Forming the Same - A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region. | 05-03-2012 |
20130248991 | STRUCTURE AND METHOD FOR FORMING TRENCH-GATE FIELD EFFECT TRANSISTOR - A field effect transistor (FET) includes a body region of a first conductivity type disposed within a semiconductor region of a second conductivity type and a gate trench extending through the body region and terminating within the semiconductor region. The FET also includes a flared shield dielectric layer disposed in a lower portion of the gate trench, the flared shield dielectric layer including a flared portion that extends under the body region. The FET further includes a conductive shield electrode disposed in the trench and disposed, at least partially, within the flared shield dielectric. | 09-26-2013 |