Patent application number | Description | Published |
20100265999 | COMMUNICATION SYSTEM INCORPORATING PHYSICAL LAYER WAVEFORM STRUCTURE - A wireless radio transceiver system configured to transmit and receive a communications signal waveform having a time division multiple access physical layer structure and which includes a sequence of orthogonal frequency division multiple access symbols. The transceiver provides transmit diversity through space-time coding and the use of orthogonal channel probes from each transmitter. The waveform is packet based and contains a packet header definition that supports local receiver synchronization. Examples of the waveform also incorporate transmission security features. | 10-21-2010 |
20100266062 | DISTRIBUTED MAXIMAL RATIO COMBINING RECEIVER ARCHITECTURE - A wireless communication system in which each receiver is configured synchronize to a received waveform using only its local received signal without requiring any information about other receivers in the system. The local receiver is configured to remove frequency and/or phase error based on information encoded in the received waveform. In some examples, the local receiver uses channel probe information embedded in the received waveform to provide channel estimates for each communication channel over which the signals are received and, based on the estimates, adjusts the received signals for phase shift and amplitude scaling caused by the channel. Signal acquisition (in time and frequency), as well as partial demodulation (for channel estimation), is done independently for each channel. Signals from each channel are combined using a maximal ratio combiner. | 10-21-2010 |
20130097663 | Integrated Circuit For Cyber Security Processing - In one aspect, an integrated circuit (IC) includes a secure router configured as a trust anchor, a non-volatile random access memory (RAM) direct memory access (DMA) channel coupled to the secure router, a first DMA coupled to the secure router and configured to receive data with a first classification and a second DMA coupled to the secure router and configured to receive data with a second classification. The IC also includes a secure boot/key controller coupled to the secure router and configured as a trust anchor to boot the IC securely and a processor coupled to the secure router and configured to encrypt data, to store protocols, to store instructions to detect malicious intrusions on the IC and to provide key management. | 04-18-2013 |