Patent application number | Description | Published |
20110062972 | METHOD OF DETERMINING A SENSITIVITY OF A BIOSENSOR ARRANGEMENT, AND BIOSENSOR SENSITIVITY DETERMINING SYSTEM - According to an embodiment of the present invention, a method of determining or adjusting the sensitivity of a biosensor arrangement comprising at least one field effect biosensor is provided, each of the at least one field effect biosensor comprising: a semiconductor substrate comprising a source region, a drain region and a channel region disposed between the source region and the drain region; a gate isolation layer covering the channel region; and a reference electrode disposed over the gate isolation layer such that a electrolytic solution to be sensed can be provided between the reference electrode and the gate isolation layer. The method comprises the following processes carried out for each field effect biosensor: providing an electrolytic solution between the reference electrode and the gate isolation layer; applying a source/drain voltage between the source region and the drain region; varying a reference voltage supplied to the reference electrode over a voltage range; measuring a resulting drain current while varying the reference voltage in order to obtain a corresponding drain current function; and determining the sensitivity of the field effect biosensor based on the reference voltage supplied to the reference electrode and the corresponding drain current function. | 03-17-2011 |
20110063012 | CIRCUIT ARRANGEMENT - A circuit arrangement is provided. The circuit arrangement includes a first transistor, a second transistor, a third transistor, and a fourth transistor respectively comprising a first terminal, a second terminal, and a control terminal, a first capacitor and a second capacitor respectively comprising a first terminal and a second terminal, an inverter comprising an input terminal and an output terminal, and a circuit arrangement input terminal and a first circuit arrangement output terminal, wherein the first terminals of the first transistor, the second transistor and the third transistor are connected with each other, wherein the second terminal of the first transistor is connected to the control terminal of the second transistor and to the first terminal of the first capacitor, and wherein the second terminal of the second transistor is connected to the control terminal of the first transistor, to the control terminal of the third transistor, and to the first terminal of the second capacitor, wherein the second terminal of the first capacitor is connected to the input terminal of the inverter, and wherein the second terminal of the second capacitor is connected to the output terminal of the inverter, wherein the output terminal of the inverter is connected to the control terminal of the fourth transistor, wherein the second terminal of the third transistor is coupled to the first terminal of the fourth transistor, wherein the circuit arrangement input terminal is connected to the input terminal of the inverter, wherein the first circuit arrangement output terminal is connected between the second terminal of the third transistor and the first terminal of the fourth transistor. | 03-17-2011 |
20120013351 | METHOD FOR CONVERTING A SENSOR CAPACITANCE UNDER PARASITIC CAPACITANCE CONDITIONS AND A CAPACITANCE-TO-VOLTAGE CONVERTER CIRCUIT - A method for converting a sensor capacitance under parasitic capacitance conditions and a capacitance-to-voltage (CV) converter circuit for converting a sensor capacitance under parasitic capacitance conditions are provided. The method comprises the step of using a two stage operational amplifier (op-amp) in non-unity-gain configuration, wherein the two stage op-amp is chosen to be unstable in unity-gain configuration for reducing power consumption. | 01-19-2012 |
20120126906 | Relaxation Oscillator - A relaxation oscillator and a method for offset cancellation in a relaxation oscillator. The relaxation oscillator comprises two comparator units, each comparator unit comprising a comparator element and a memory element; and a switch control generator coupled to each of the comparator units; wherein each comparator unit, in a reset state, stores an input-offset voltage on the memory element under the control of the switch control generator such that, in a comparison state, the input-offset voltage is applied to both inputs of the comparator for implementing an offset-free threshold. | 05-24-2012 |
20120249250 | Quadrature Voltage Controlled Oscillator - According to embodiments of the present invention, a quadrature voltage controlled oscillator is provided. The quadrature voltage controlled oscillator includes a first voltage controlled oscillator and a second voltage controlled oscillator respectively comprising an inductor having a first terminal and a second terminal, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor respectively comprising a first terminal and a second terminal, a first transistor, a second transistor, a third transistor and a fourth transistor respectively comprising a source terminal, a drain terminal and a gate terminal, wherein the first terminal of the inductor is coupled to the first terminal of the first capacitor, and the second terminal of the inductor is coupled to the second terminal of the first capacitor, wherein the drain terminal of the first transistor is coupled to the first terminal of the inductor, the first terminal of the first capacitor, the first terminal of the second capacitor, and the gate terminal of the fourth transistor, wherein the drain terminal of the second transistor is coupled to the second terminal of the inductor, the second terminal of the first capacitor, the first terminal of the third capacitor, and the gate terminal of the third transistor, wherein the source terminal of the first transistor is coupled to the second terminal of the second capacitor, the drain terminal of the third transistor, and the first terminal of the fourth capacitor, wherein the source terminal of the second transistor is coupled to the second terminal of the third capacitor, the drain terminal of the fourth transistor, and the second terminal of the fourth capacitor, wherein the gate terminal of the first transistor of the first voltage controlled oscillator is directly coupled to the first terminal of the inductor of the second voltage controlled oscillator, wherein the gate terminal of the second transistor of the first voltage controlled oscillator is directly coupled to the second terminal of the inductor of the second voltage controlled oscillator, wherein the gate terminal of the first transistor of the second voltage controlled oscillator is directly coupled to the second terminal of the inductor of the first voltage controlled oscillator, wherein the gate terminal of the second transistor of the second voltage controlled oscillator is directly coupled to the first terminal of the inductor of the first voltage controlled oscillator. | 10-04-2012 |
20130049839 | Circuit Arrangement and Receiver Including the Circuit Arrangement - According to embodiments of the present invention, a circuit arrangement is provided. The circuit arrangement includes a first input terminal and a second input terminal, a first transistor and a second transistor, each of the first transistor and the second transistor having a first controlled terminal, a second controlled terminal and a control terminal, the first controlled terminal of the first transistor being coupled to the first controlled terminal of the second transistor, the control terminal of the first transistor being coupled to the first input terminal, the control terminal of the second transistor being coupled to the second input terminal, and the second controlled terminal of the first transistor being coupled to the second controlled terminal of the second transistor, an input matching circuit coupled to the first input terminal, the second input terminal, the first transistor and the second transistor, a first resistive element coupled between the control terminal of the first transistor and the second controlled terminal of the first transistor, a second resistive element coupled between the control terminal of the second transistor and the second controlled terminal of the second transistor, and an output terminal coupled to the second controlled terminal of the first transistor and the second controlled terminal of the second transistor, wherein the input matching circuit includes a first inductor, a second inductor, a third inductor, a first capacitor and a second capacitor, wherein the first inductor is coupled between the first input terminal and the control terminal of the first transistor, wherein the second inductor is coupled between the first controlled terminal of the first transistor and the first controlled terminal of the second transistor, wherein the third inductor is coupled between the second input terminal and the control terminal of the second transistor, wherein the first capacitor is coupled between the control terminal of the first transistor and the first controlled terminal of the first transistor, and wherein the second capacitor is coupled between the control terminal of the second transistor and the first controlled terminal of the second transistor. According to further embodiments of the present invention, a receiver including the circuit arrangement is provided. | 02-28-2013 |
20130053711 | Implantable Device for Detecting Variation in Fluid Flow Rate - According to embodiments of the present invention, an implantable device for detecting variation in fluid flow rate is provided. The implantable device includes: a substrate having an active element arrangement; a sensor arrangement having a first portion that is mechanically secured and a second portion that is freely deflectable, the sensor arrangement in electrical communication with the active element arrangement, wherein the active element arrangement is configured to detect changes in deformation of the sensor arrangement and produce an output in response to the detected changes; and at least one inductive element mechanically coupled to the substrate and in electrical communication with the active element arrangement, wherein the inductive element is adapted to power the active element arrangement through inductive coupling to an excitation source, and wherein the inductive element is adapted to transmit the output associated with the detected changes in the sensor. | 02-28-2013 |
20130062962 | Power Transfer Device - A power transfer device is provided. The power transfer device includes a circuit arrangement including a primary side having a primary coil; a secondary side having a secondary coil inductively coupled to the primary coil and a load transformation unit; wherein the load transformation unit includes an inductor and a capacitor; wherein the secondary coil, the inductor and the capacitor respectively includes a first terminal and a second terminal; wherein the first terminal of the secondary coil is coupled to the first terminal of the capacitor, the second terminal of the capacitor is coupled to the first terminal of the inductor, and the second terminal of the inductor is coupled to the second terminal of the secondary coil. | 03-14-2013 |
20130063166 | LOW POWER HIGH RESOLUTION SENSOR INTERFACE - A sensor interface circuit is provided for resolving sensor signals from a plurality of sensors into a digital sensor signal, the sensor interface circuit comprising: a relaxation oscillator for receiving and pre-processing the sensor signals to generate an analog sensor signal, the relaxation oscillator comprising one or more dynamic circuits; and a monitoring module for receiving the analog sensor signal and generating the digital sensor signal in response thereto. There is also provided a sensor system front-end and a relaxation oscillator. | 03-14-2013 |
20130063290 | Recording Circuit and a Method of Controlling the Same - A recording circuit is provided. The recording circuit includes a multiplexing circuit configured to receive a plurality of input signals and to produce a multiplexed output signal including the plurality of input signals, and a plurality of sampling circuits electrically coupled in parallel to each other, each sampling circuit being configured to sample a portion of the multiplexed output signal corresponding to an input signal of the plurality of input signals and the sampling circuits configured to alternately produce an output signal corresponding to the sampled portion. | 03-14-2013 |
20130147649 | Analogue to Digital Converter, An Integrated Circuit and Medical Device - An analogue to digital converter comprises a first input connection to receive a first part of the analogue input signal; a second input connection to receive a second part of the analogue input signal; a first and second plurality of capacitors, each capacitor of the first plurality of capacitors forms a capacitor pair with a corresponding capacitor in the second plurality of capacitors; wherein, during a sampling period, the first input connection couples the first part of the analogue input signal to a first contact of each capacitor of the first plurality of capacitors, the second input connection couples the second part of the analogue input signal to a first contact of each capacitor of the second plurality of capacitors, and a switching array couples a second contact of each capacitor of the first and second plurality of capacitors to a common mode voltage to determine a first bit of the digital output signal. | 06-13-2013 |
20130314129 | STIMULATOR AND METHOD FOR PROCESSING A STIMULATION SIGNAL - Various embodiments provide a method for processing a stimulation signal. The method may include monitoring an output voltage on an electrode, the electrode being provided with the stimulation signal; determining whether the output voltage is lower than a threshold voltage; if it is determined that the output voltage is lower than the threshold voltage, modifying the waveform of the stimulation signal; and providing the modified stimulation signal to an object via the electrode. | 11-28-2013 |
20130329773 | RECEIVER AND METHOD OF CONTROLLING A RECEIVER - According to embodiments of the present invention, a receiver is provided. The receiver includes an envelope detector configured to generate a waveform corresponding to an envelope of a signal received by the receiver, a carrier recovery circuit configured to generate a carrier signal based on the waveform, wherein the carrier signal has a frequency corresponding to a center frequency of the received signal, and a template generator configured to generate a local template signal based on the waveform, the local template signal including a plurality of pulses. According to further embodiments of the present invention, a method of controlling a receiver is also provided. | 12-12-2013 |
20140071722 | ENERGY HARVESTING APPARATUS AND A METHOD FOR OPERATING AN ENERGY HARVESTING APPARATUS - In various embodiments of the present disclosure, there is provided an energy harvesting apparatus, including: an energy harvester for generating electric power from an ambient source; a power conditioning circuit coupled to the output of the energy harvester; including: a boost converter module; a buck-boost converter module; and a power modification control module; wherein the power modification control module is configured to initialize the energy harvesting apparatus from inactivity to a normal energy harvesting state by operating the boost converter module, and operating the buck-boost converter when an output voltage of the power conditioning circuit rises to a predetermined value. A corresponding method of operating an energy harvesting apparatus is provided. | 03-13-2014 |
20140071801 | METHOD AND SYSTEM FOR HIGH BANDWIDTH AND LOW POWER BODY CHANNEL COMMUNICATION - A system and method for body channel communication is provided. The system includes a transceiver which encodes multiple bits per symbol when operating in a high data rate mode by selecting a first Walsh code in response to a first set of multiple bits of data and selecting a second Walsh code in response to a second set of multiple bits of data, both Walsh codes selected from a multiple-bit Walsh code sequence. The transceiver also generates a multi-level transmission signal having a predetermined symbol frequency by stacking the first Walsh code onto the second Walsh code, and transmits the multi-level signal having the first predetermined symbol frequency through the body channel. The transceiver also has additional modes of operation which include a normal mode and a low power mode, the low power mode decoding the multiple bits from the signal in response to harmonic energy from a harmonic frequency generated by the multiple-bit Walsh code sequence. Also, the transceiver modulates an M-Sequence code with the multi-bit Walsh code sequence up to a desired frequency band associated with the predetermined frequency in order to improve auto-correlation after passing through the body channel. | 03-13-2014 |
20140080430 | RECEIVER FOR BODY CHANNEL COMMUNICATION AND A METHOD OF OPERATING A RECEIVER THEREFROM - In various embodiments of the present disclosure, there is provided a receiver for body channel communication. The receiver includes an electrode configured to receive an incoming signal transmitted as a multi-level transmission signal from a transmitter through a body channel, a differentiator configured to obtain a time derivative of the incoming signal indicating a plurality of data transitions, and an analog to digital converter configured to generate a multi-level output signal representing the multi-level transmission signal based on the plurality of data transitions. A corresponding method of controlling a receiver for body channel communications is provided. | 03-20-2014 |
20140104010 | Method and Apparatus for a Duty-Cycled Harmonic Injection Locked Oscillator - A method and an apparatus for a duty-cycled injection locked oscillator is provided for frequency shift keyed (FSK) signal transmissions. The oscillator includes a resonance LC tank and a first switching device. The first switching device is coupled to the resonance LC tank and injects an initial current pulse with a predetermined pulse magnitude into the resonance LC tank. The initial current pulse also fixes an initial phase of the duty-cycled injection locked free-running oscillator in response to the predetermined magnitude of the initial current pulse to enable fast settling of injection locking and high data rate operation of the duty-cycled injection locked oscillator. The oscillator also includes a second switching device, such as a differential pair of switching devices. The second switching device is coupled to the LC resonance tank for injecting a gated periodic reference signal having a duty cycle modified to reduce power of the reference signal by approximately seventy-five per cent. | 04-17-2014 |
20140148886 | NERVE STUMP INTERFACE AND AXONAL REGENERATION SYSTEM FOR GENERATING AN ELECTRIC FIELD FOR PROMOTING AND GUIDING AXONAL REGENERATION - The present invention provides a nerve stump interface for generating an electric field for promoting and guiding axonal regeneration and an electric field assisted axonal regeneration system. The nerve stump interface comprises a sieve having a plurality of holes. A strip is coupled to the sieve. A first electrode is provided at one of the plurality of holes and a second electrode is provided on the strip. The strip is arranged to space the second electrode from the first electrode. The first electrode and the second electrode are for generating the electric field. At least one securing element is provided on a side of the strip to allow that side of the strip to affix against an opposite side of the strip. The present invention also provides a method for assembling the electric field assisted axonal regeneration system. | 05-29-2014 |
20140163641 | MUSCLE STIMULATION SYSTEM - According to one aspect of the invention, there is provided a muscle stimulation system for effecting appendage movement, the muscle stimulation system comprising: first transceiver circuitry; at least one first implantable stimulation device for implantation adjacent to one or more first muscles responsible for the appendage movement, the first implantable stimulation device configured to be wirelessly activated by the first transceiver circuitry; second transceiver circuitry; at least one second implantable stimulation device for implantation adjacent to one or more second muscles responsible for the appendage movement, the second implantable stimulation device configured to be wirelessly activated by the second transceiver circuitry; and a base station configured to wirelessly communicate with both the first transceiver circuitry and the second transceiver circuitry to receive and transmit signals that causes coordinated activation of the first implantable stimulation device and/or the second implantable stimulation device to coordinate stimulation of the first muscles and/or the second muscles that are responsible for the appendage movement. | 06-12-2014 |
20140167995 | ANALOG-TO-DIGITAL CONVERTER - According to embodiments of the present invention, an analog-to-digital converter is provided. The analog-to-digital converter includes an input configured to receive an input signal, a feed-forward path connected to the input configured to feed forward the input signal, a processing path including a loop filter, wherein the loop filter includes at least one local feedback path configured to feed back an output signal of the loop filter to an input of the loop filter, a first combiner configured to combine the input signal fed forward by the feed-forward path with an output of the processing path, a quantizer configured to generate an output signal of the converter, a feed-back path configured to feed back the output signal, and a second combiner wherein the processing path is connected to the second combiner and the second combiner is configured to combine the input signal with the fed back output signal of the converter and supply the result of the combination to the processing path. | 06-19-2014 |